Patent Application
20080123552
The disclosed invention relates to a method and apparatus for a switchless backplane controller using existing or common standards-based backplanes. More particularly, it relates to a method and apparatus for a switchless backplane controller, which uniquely applies existing or common standard fabric backplanes to allow communication from a central control central processing unit (“CPU”) to slave CPUs alleviating the need for an intervening fabric switch and the signaling latencies associated with the fabric switch.
Typical systems using high-speed serial input/output (“I/O”) like Gigabit Ethernet and PCI-express make use of a central switch to allow boards in any slot to communicate with boards in any other slot. This approach is typical in standards like AdvancedTCA™ or PICMG 2.16.
AdvancedTCA™ is the name that the PCI Industrial Computer Manufacturers Group (“PICMG”) has chosen to describe the new architecture. It stands for Advanced Telecom Computing Architecture, and it is pronounced “Advanced Tee-See-Aye.” This is analogous to the term “CompactPCI” being used to describe the PICMG 2.x family of specifications.
The AdvancedTCA™ is the latest open industry specification for building high-performance telecommunications and data communications systems. Developed by the PICMG consortium, it is poised to answer the requirements of standardized building blocks for the next generation of carrier grade communications equipment. This series of specifications incorporates the latest trends in high speed interconnect technologies, next generation processors and improved reliability, manageability and serviceability to help decrease cost and offer time-to-market networking solutions.
The standard PICMG 3 backplane is a “full mesh”, wherein every slot has a dedicated link to every other slot. This provides the potential, in aggregate, for terabit/second data transfers within a single shelf, or chassis. Very high performance systems will use the full mesh for maximum throughput. The popular “dual star” and “single star” topologies are also supported in PICMG 3 on the same backplane, as a single or dual star is just a subset of a full mesh, with only a portion of the links used. Star topologies have a lower total bandwidth than a full mesh, but are less costly to implement.
Backplanes exist that conform to these standards and route the high-speed serial I/O signals from the central switch (known as the “Hub”) in slot X+1 to multiple other slots (known as “Nodes”) in slots 1 through X.
In some cases there is only a need to have a master controller single board computer (“SBC”) in the system, which must communicate with a multitude of input/output (“I/O”) or other computer boards, but it is not necessary that the I/O or other computer boards talk to each other. It is also necessary that the communication path from the SBC to the I/O board have as low a latency as possible. In such cases, the extra latency introduced by a fabric switch is undesirable.
For example, U.S. Pat. No. 5,983,260 describes an interconnect system utilizing serial fabrics and a fabric switch to connect all modules in the system together. As a result, this system incurs the latencies of the switch hardware, which for some applications might be undesirable or unnecessary. U.S. Pat. No. 6,728,807 and U.S. Patent Application No. 2002/0163910A1 describe similar interconnect systems as that in U.S. Pat. No. 5,983,260. The interconnection system in U.S. Pat. No. 5,983,260 is very common and typical of fabric backplane designs.
Accordingly there is a need in the art for a method and apparatus which applies existing standard fabric backplanes to allow communication from a central control CPU or SBC to slave CPUs or I/O boards in which a need for an intervening fabric switch and the signaling latencies associated therewith are alleviated.
Disclosed herein is an electronic system including a backplane having a circuit board and a plurality of slots, a plurality of nodes operably connected to a corresponding slot of the plurality of slots, and a central control system operably connected to a hub slot of the plurality of slots. Each node slot is required to be routed only to the hub slot providing point-to-point interconnect to each node and the central control system has a direct link without a switch to each node.
Further disclosed herein is an electronic system including: a backplane including a circuit board and a plurality of slots; a plurality of nodes operably connected to a corresponding slot of the plurality of slots; and a central control system operably connected to a hub slot of the plurality of slots, the central control system having separate dedicated controllers for each communication channel to communicate with a respective node. Each node slot is required to be routed only to the hub slot providing point-to-point interconnect to each node and the central control system has a direct link without a switch to each node.
Further disclosed herein is a method for a switchless backplane. The method includes: providing a backplane including a circuit board and a plurality of slots; operably connecting a plurality of nodes to a corresponding slot of the plurality of slots; and operably connecting a switchless central control system to a hub slot of the plurality of slots, wherein each node slot is required to be routed only to the hub slot providing point-to-point interconnect to each node and the central control system has a direct link without a switch to each node.
The following descriptions should not be considered limiting in any way. With reference to the accompanying drawings, like elements are numbered alike:
Several port blades 14 includes one or more media ports 24 for bi-directionally communicating via a corresponding external telecommunication link 26 to a network 28, which may be a wide area network (“WAN”), a local area network (“LAN”) or other digital network. Port blade 14B, also referred to as a processor blade or node, does not include a media port in this embodiment.
Each port blade 14 also includes an output connection 30 and an input connection 32 for communicating data with the SBC 16. In an exemplary embodiment, the SBC 16 includes a central processor unit (CPU) 34, which is operably connected to a respective controller 36 of a plurality of controllers 36A to 36X. Each controller 36 is operably connected to a respective port blade 14. (e.g., “controller 1” is connected to “slot 1” . . . and “controller X” is connected to “slot X”).
Accordingly, the above exemplary system and method exemplified in
Using this exemplary system and method, the switch hub device is replaced with an SBC hub device with a CPU 34 which has a direct link (e.g., without a switch as in
Referring to
By replacing the switch illustrated in
In other words, on some backplane standards (e.g., AdvancedTCA™), there are actually two channels connecting the hub board to the node boards. Therefore, the idea in the present disclosure may be applied to both channels 250 and 260 (or more if the backplane standard provided them) or it may be applied to only one channel, leaving the second channel available for the traditional “switched” method of interconnect as illustrated in
As discussed above, on “full mesh” systems, the backplane routes each slot to every other slot. In such a conventional system, every board must have a switching resource on it. Therefore, in such a full mesh system, any slot can be designated as the “central control system” and be used to communicate to all of the other slots. In exemplary embodiments of this invention as described above and implemented in a full mesh system would allow any slot (designated as the “central control system slot”) to communicate to any other set of slots in a point-to-point manner by removing the switching resources and placing dedicated controllers on the “central control system”.
For example, a full mesh chassis can support two central control systems 416 and 516 each with two associated node boards 414 and 514, respectively, in which they can communicate with. Because none of the boards of the backplane 300 have switching resources, the node boards 414 and 514 cannot communicate with each other, nor can the central control system 416 communicate with the node boards 514 directly connected to the central control system 516. However, the central control system 416 can communicate with to its set of node boards 414 without latencies of a switch, and the central control system 516 can communicate with its set of node boards 514 without latencies of a switch, all in the same chassis.
It should be appreciated by one skilled in the art that the potential benefits for parallel computing clusters may provide opportunities to create a product exploiting the present invention. In particular, parallel computing problems categorized in the industry as “Embarrassingly Parallel” are well suited to take advantage of exemplary embodiments of the system and method disclosed herein for problems including non-real-time rendering of computer graphics, brute force searches in cryptography, game tree traversal in artificial intelligence, ray tracing, image processing, and monte carlo calculations, for example, but is not limited thereto.
Advantages of exemplary embodiments of the present invention may include: avoiding unnecessary latencies in a novel way by placing the central control system in the hub slot (which would traditionally be occupied by the fabric switch), allowing for a direct point to point link from the central control system (the hub) to the I/O or compute devices (the nodes) using existing standards based fabric backplanes. The system and method described herein make use of the existing standards-based fabric backplane (like PICMG 2.16 or AdvancedTCA™) in a novel way by replacing the traditional switch in the hub slot with a control system like an SBC, providing direct point-to-point interconnect to the node devices. As discussed above, U.S. Pat. No. 5,983,260 suffers from latencies due to intervening switches, but also suffers from the complexity of placing the switching resources on each and every board in the system, and from the high cost of developing a fabric backplane that wires every slot to every other slot (known as a “full mesh”). The system and method of the present invention do not require any switching resources to be located on either the node boards or the hub board and avoids the higher cost of a full mesh backplane by requiring each slot to be routed only to the hub slot (as is traditionally the case in PICMG 2.16 or AdvancedTCA™ applications).
While the embodiments of the disclosed method and system have been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the embodiments of the disclosed method and system. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the embodiments of the disclosed method and system without departing from the essential scope thereof. Therefore, it is intended that the embodiments of the disclosed method and system not be limited to the particular embodiments disclosed as the best mode contemplated for carrying out the embodiments of the disclosed method and system, but that the embodiments of the disclosed method and system will include all embodiments falling within the scope of the appended claims.
