Patent Application
20060153322
This invention relates to the field of synchronization in a communication system, and, more particularly to a method and system for synchronization between a transmitter and a receiver in a GSM communication system.
Global System for Mobile communications (GSM) is a widely used telecommunications standard. According to it, a transmitter transmits a modulated signal at particular points in time. To communicate with the transmitter, a receiver interprets a received signal for establishing timing and frequency synchronization with the transmitter. For example, when a user switches on a mobile cellular phone to communicate with a base station, the mobile phone receiver has to synchronize the timing and the frequency with the base station transmitter. The GSM system defines two channels for this purpose: a frequency control channel (FCC H) that helps in identifying the frequency of the received signal, and a synchronization channel (SCH) that helps in identifying the system timing. The FCCH broadcasts a frequency burst (FB), while the SCH broadcasts a synchronization burst (SB). The FB is detected at the receiver for frequency synchronization with the transmitter, whereas the SB is detected at the receiver for time synchronization with the transmitter.
The FB is a pattern of 148 zeros, with a sampling rate of 271 kHz, modulated according to the Gaussian minimum shift keying (GMSK) scheme. The FB is transmitted by using a radio frequency (RF) carrier. This results in a pure sinusoid, whose frequency is equal to the carrier frequency offset by one-fourth the sampling rate, i.e., 67.7 kHz. In other words, after the base band conversion, the FCCH appears as a complex sinusoid of frequency 67.7 kHz at the receiver.
However, the frequency of the received FCCH can be offset from 67.7 kHz because of one or more of the following effects. There may be frequency offsets between the transmitter and the receiver, due to imperfections or variations in either of them. There can be a Doppler effect in the environment, due to the movement of the transmitter or the receiver or other disturbances resulting in a shift in the frequency of the received RF carrier. This also causes a frequency offset in the base band signal. The value of this offset is unknown, making the detection of the FCCH or FB a complex problem.
In one of the methods relating to the detection of the FB in a received signal, the received signal is derotated by 67.7 kHz and then low-pass filtering is carried out. Derotation is defined as a process for correction of the frequency by the offset. The ratio of the output power to the input power of the filter is then computed. If it is above a certain threshold, an FB is detected in the received signal.
Some methods for the detection of the FB make use of the cross correlation between the received signal and a reference pure sinusoid at 67.7 kHz. If the value of the correlation is above a preset threshold, the FB is detected in the received signal. In one of the methods, a block of 148 samples is selected and divided into a number of smaller blocks, such that the maximum difference in the phase offset between the received signal and the reference signal over each block is less than 180°. The received signal and the reference signal are correlated separately in each of these blocks, and the values of correlation are added non-coherently. However, this non-coherent addition results in degradation in performance. Alternatively, the received signal can be correlated with a number of reference signals, with frequencies in the expected range. This method, however, becomes computationally complex for high frequency offsets. Another group of FB detection methods makes use of variants of autocorrelation, such as complex autocorrelation and correlation between the real and imaginary components of the received signal. These methods are, however, less accurate in the absence of large frequency offsets.
The conventional methods described above suffer from one or more of the following limitations. Certain methods are sensitive to frequency offsets. These methods only describe the detection of the FB for synchronization purposes. However, the synchronization process involves detection of both the FB as well as the SB. The conventional methods perform detection of the SB at a later stage. This makes synchronization a two-stage process. In the first stage, the FB is detected at the receiver for frequency synchronization with the transmitter. In the second stage, the SB is detected at the receiver for time synchronization with the transmitter. The first stage of the method ensures that the initial frequency offset in the received signal is corrected before decoding the SB. However, the process of synchronization takes a longer time, using this two-stage method. In addition, there may be cases of false detection of the FB. If this occurs, the time to achieve the synchronization increases further.
Accordingly, there is a need for a method and system that reduces the time required for synchronization. The method should also ensure that there are minimal cases of false detection of the FB. In addition, the method should provide synchronization, even under large frequency offsets.
An object of the present invention is to provide a method and system for synchronization between a transmitter and a receiver in a communication system.
Another object of the present invention is to provide a method and system for achieving frequency and time synchronization simultaneously.
Another object of the present invention is to provide a method and system for achieving frequency and time synchronization simultaneously, in a short time.
Yet another object of the present invention is to provide a method and system for synchronization between a transmitter and a receiver in a communication system with large frequency offsets.
Yet another object of the present invention is to provide a method and system for synchronization between a transmitter and a receiver in a communication system with low computational complexity.
Still another object of the present invention is to provide a method and system that minimizes the false detection of frequency bursts while performing synchronization between a transmitter and a receiver in a communication system.
The objects mentioned above are achieved through the following embodiments of the invention. In an embodiment of the invention, a method for synchronization between a transmitter and a receiver in a communication system is provided, wherein the receiver receives a plurality of signals from the transmitter. The method comprises detecting a frequency burst at the receiver, validating the detected frequency burst based on a synchronization burst, and acquiring frequency and timing information based on the validated frequency burst for synchronization with the transmitter.
In another embodiment of the invention, a method for synchronization between a transmitter and a receiver in a communication system includes detecting a frequency burst at the receiver, and estimating the position of a synchronization burst based on the detected frequency burst. The synchronization burst is then validated by correlating the estimated synchronization burst with a predetermined signal. The detected frequency burst is validated, based on the validation of the synchronization burst. Finally, the frequency and timing information for synchronization with the transmitter is acquired, based on the validated frequency burst and the validated synchronization burst.
In another embodiment of the invention, a system for synchronization between a transmitter and a receiver in a communication system is provided. The system comprises means for detecting a frequency burst at the receiver, means for validating the detected frequency burst based on a synchronization burst, and means for acquiring frequency and timing information based on the validated frequency burst, for synchronization with the transmitter.
The method and system of the present invention have the advantage that both the frequency and timing information carried by the received signal are available simultaneously at the receiver. In an exemplary embodiment of the present invention, the maximum time taken to achieve frequency and time synchronization is approximately half the time required if the methods for FB detection, frequency correction and SB detection are used separately. The derotation of SB samples may also be carried out in the digital domain. This reduces the need to adjust the system timing or clock before validating the FB.
The preferred embodiments of the invention will hereinafter be described in conjunction with the appended drawings provided to illustrate and not to limit the invention, wherein like designations denote like elements, and in which:
The present invention provides a method, system and computer program product for synchronization between a transmitter and a receiver in a communication system, such as a GSM system.
A signal is received at an antenna 102 of receiver 100. An amplifier 104 amplifies the received signal to a predetermined limit. A frequency processor 106 processes the received signal. In the received signal, there is a base band signal modulated on a carrier signal. In an exemplary embodiment of the present invention, this modulation is based on the Gaussian minimum shift-keying (GMSK) scheme that is well known in the art. The base band signal has two components: an in-phase (I) or real component, and a phase quadrature (Q) or complex component.
Frequency processor 106 digitizes the I-component and Q-component of the demodulated signal. The digitized samples of I- and Q-components are processed by system 108, to obtain frequency and timing information for synchronization purposes. This enables communication between the transmitter and receiver 100. Receiver 100 may include other devices 110 for further processing of the received signal. For the sake of simplicity, other devices 110 have not been explicitly depicted in
A control circuit 112 controls the functions of the various components of receiver 100. These components include, but are not limited to, antenna 102, amplifier 104, frequency processor 106, and system 108. Control circuit 112 also controls the functions of an I/O device 114. I/O device 114 may include an input device, such as a key input device, and an output device such as a display device. The key input device is used to send a request to the transmitter through control circuit 112. The transmitter then sends a signal, to be received by receiver 100 for synchronization.
Receiver 100 also includes a memory/storage 116. Memory/storage 116 may include read only memory (RAM) and random access memory (ROM). Memory/storage 116 may be connected to control unit 112 for storing and executing instructions of control unit 112. Memory/storage 116 includes one or more storage devices for storing data. A communication bus 118 connects control circuit 112 to antenna 102, amplifier 104, frequency processor 106, system 108, and other devices 110. Communication buses 120 and 122 connect control unit 112 to I/O device 114 and memory/storage 116 respectively.
The FB is broadcast on a frequency control channel (FCCH) of the received signal. In the base band, the FB is a complex sinusoid.
Mathematically, I-component 302, corresponding to an nth sample, may be represented as:
yi(n)=cos (ωn), (1)
where ω is the frequency in radians per sample.
Similarly, Q-component 304, corresponding to an n th sample, may be represented as:
yq(n)=sin (ωn)=cos (ωn−π/2) (2)
From (1) and (2), it may be concluded that Q-component 304 is a delayed version of I-component 302. In an exemplary embodiment of the present invention, the rate at which I-component 302 and Q-component 304 are sampled is 271 kHz. In the absence of a frequency offset, the frequency of the complex sinusoid is one-fourth the sampling rate, i.e., 67.75 kHz. Hence, ω in (1) is equal to π/2 radians per sample, and one sample in time corresponds to a phase shift of π/2 radians. In the absence of frequency offset and noise, (1) and (2) above may be related to each other as:
yi(n)=yq(n+1) (3)
Therefore, I-component 302, delayed by one sample, may be highly correlated to the Q-component 304.
Also, both I-component 302 and Q-component 304 repeat themselves with a negative sign after every two samples. In the absence of frequency offset and noise:
yi(n)=−cos (ωn+π)=−yi(n+2), (4)
Hence, I-component 302 has high correlation with itself, shifted by two samples, but with negative amplitude; and I-component 302 has high correlation with itself, shifted by four samples.
Similarly, Q-component 304 has high correlation with itself, shifted by two samples, but with negative amplitude; and Q-component 304 has high correlation with itself, shifted by four samples.
yq(n)=−sin (ωn+π)=−yq(n+2) (5)
Equations (3), (4) and (5), may result in the following correlations. The correlation Riq(1) between I-component 302 and Q-component 304, with a shift of one sample, is provided by the following equation:
The correlation Rii(2) between I-component 302 and I-component 302, with a shift of two samples, is provided by the following equation:
The correlation Rqq(2) between Q-component 304 and Q-component 304 with a shift of two samples is provided by the following equation:
These correlations, as represented by equations (6), (7) and (8), may have high values when the received signal is a complex sinusoid. In the base band, the FB is a complex sinusoid. The high correlations of the complex sinusoid can be used to distinguish between the FB and other signals. However, in the presence of a frequency offset, the value of the autocorrelation peak is reduced. In general, an nth sample of the received signal may be represented as:
z(n)=ys(n)+w(n) (9)
where ys(n) is a complex sinusoid sample, including both I-component 302 and Q-component 304, while w(n) is the additive white Gaussian noise (AWGN) component of the received signal. Also,
z(n+k)=ys(n+k)+w(n+k) (10)
where z(n+k) represents the nth sample of the received signal shifted k times, where k is an integer. If k is a positive integer, the shift results in the received signal delayed by k samples of the same.
The above equations (6), (7) and (8) are modified in the presence of a frequency offset due to the fact that a shift of one sample no longer corresponds to π/2 radians. The effect of the frequency offset reduces the magnitude of correlation.
Referring back to
At step 402 in
R=Riq(1)−Rii(2)−Rqq(2). (11)
At step 408, the total signal power of z(n) is computed as follows:
Pz(n)=S(n)+W(n) (12)
where S(n) is the power of ys(n) and W(n) is the power of w(n), as provided in equation (9).
The autocorrelation R(n) is normalized at step 410. The normalized autocorrelation is a ratio provided by
Q(n)=|R(n)|2 /(S(n)+W(n))2 (13)
The normalized autocorrelation Q(n) is compared with a predetermined threshold T1 at step 412. In an exemplary embodiment of the present invention, the value of the predetermined threshold T1 may be 0.5 in the absence of the AWGN component in the received signal. However, Q(n) decreases as the noise power increases. Hence, a sufficiently low threshold T1 (<0.5) is considered, to allow the detection of the signal with a low signal to noise ratio (SNR). The FB is detected at step 414 if Q(n) is greater than or equal to T1. However, if Q(n) is less than T1, the FB is not detected and a next sample is considered by incrementing n by 1 in step 416 and repeating steps 404 to 412 over the sliding window at step 404. The process described above is repeated till the FB is detected.
Referring back to
The method described above may detect any received signal that is periodic, such as the FB. However, other periodic signals may also be falsely detected in the detection method described above. To eliminate such falsely detected FBs, and to reduce false detection at low SNRs, the detected FB is validated. The detected FB is validated by using the synchronization burst (SB). The validation of the detected FB comprises estimating an SB on the basis of the detected FB and validating the estimated SB. The transmitter broadcasts the SB periodically, together with the FB. In a GSM system, the SB carries information in the form of encoded bits related to system timing and transmitter identity, and a training sequence of 64 bits. The training sequence carries the information needed to demodulate the information transmitted by the transmitter to receiver 100, shown in
The position of the SB may be estimated by using the position of the FB determined by the method described in conjunction with
Cross-correlations with the known training sequence are used to get the precise position of the SB. Complex correlations are computed over a window of suitable size, and the position at which the correlation is maximum is considered to be the precise position of the SB. At step 606, a correlation Smax is initialized at zero. The correlation of the SB begins at r0−11. r0 is the position at which the estimated SB training sequence begins. In an exemplary embodiment, the position of r0 is given by r0=nmax+1292 bits, where nmax is the position of the detected FB. At step 608, a cross-correlation S(r) corresponding to an rth window of the derotated SB with a predetermined signal, is computed. The cross-correlation S(r) is computed in a manner, which is similar to the computation of the autocorrelation R(n), described earlier. In an embodiment of the present invention, the 64 bits corresponding to a training sequence for the SB are cross-correlated with the predetermined signal over a window of size 64, sliding over a length of, for example, 23 samples.
In an exemplary embodiment of the present invention, the predetermined signal is the previously known 64-bit training sequence. The position, at which S(r) is maximum, is obtained as follows. S(r) is compared with Smax at step 610. In case, S(r) is greater than or equal to Smax, the value of S(r) is stored as Smax and r is stored as rmax at step 612. Subsequently, r is compared with r0+11 at step 614. In case, r is found to be greater than or equal to r0+11 (i.e., when all the 23 samples mentioned above have been considered), the estimated SB is further processed in steps 618-622 for validation. In other words, the estimated SB is validated for a sample for which the correlation with the predetermined signal is the maximum. The validation of the SB implies the validation of the FB, since the SB is validated based on the estimated frequency and position corresponding to the estimated FB. However, if r is found to be less than r0+11, r is incremented by unity at 616, and steps 608-614 are repeated.
Referring back to
The decoded bits of estimated SB are checked for correctness using a cyclic redundancy check (CRC) at step 620. The estimated SB includes 10 CRC bits. If the estimated SB is decoded correctly, the CRC yields the 10 bits correctly. However, if the bits are found to be incorrect, the estimated SB is not validated. If the result of the CRC is correct, then the timing and frequency synchronization is established at step 622. However, if the result of the CRC is not correct, a new FB is detected at step 624 by using the process described in conjunction with
The method described above may be implemented by system 108, depicted in
System 108 further includes means for acquiring frequency and timing information for synchronization with the transmitter, based on the validated FB. Means for acquiring frequency and timing information may include an equalizer 716 for equalizing the validated SB, a channel estimation (CE) block 517 for providing the channel estimates to equalizer 716, and a decoder 718 for decoding the equalized SB to acquire the timing information corresponding to the transmitter. Additionally, there may be a CRC block 719 for checking the correctness of the decoded bits of the SB and a storage device 720 for storing the frequency of the validated FB and the timing information of the decoded SB. Equalizer 716 can be either a non-adaptive or an adaptive equalization circuit in various embodiments of the invention.
Each of the system elements such as comparator 710, equalizer 716, CE block 717, decoder 718, and CRC block 719 may be implemented on an integrated circuit, such as field programmable gate arrays, and application specific integrated circuits. Storage devices may be implemented by using FIFO.
The method and system of the present invention have the advantage that both the frequency and timing information carried by the received signal are available simultaneously at receiver 100. In an exemplary embodiment of the present invention, the maximum time taken to achieve frequency and time synchronization may be about 55 ms, which is approximately half the time required if the methods for FB detection, frequency correction and SB detection are used separately. The derotation of SB samples may also be carried out in the digital domain. This reduces the need to adjust the system timing or clock before validating the FB.
The method of the present invention makes use of one or more correlations provided in equations (6), (7), (8), and (11). In an embodiment of the present invention, different combinations of equations (6), (7), (8) may be used depending on the computational complexity of the method. In an embodiment of the present invention, using equation (11) for determining correlations provides better results than using equations (6), (7), or (8) individually. This is because using equation (11) may result in a higher averaging of noise than using equations (6), (7), or (8) individually.
In one embodiment of the present invention, the range of frequencies the method can detect in the absence of noise may be in the range of ω±ω/4 Hz. In an exemplary embodiment of the present invention, frequencies may be detected in the range of 67.75±16.8 kHz.
In one embodiment of the present invention, the detection process may begin after reducing the frequency offsets to a predetermined limit. In such a case, the range of frequencies for detection may be wider than the range of ω±ω/4 Hz. Such a case may occur for devices capable of operating in multiple technologies. In an exemplary embodiment of the present invention, the range of frequencies that may be detected may be wider than the range of ω±ω/4 Hz when a device operating in a different radio technology synchronizes with a GSM system.
The method of the present invention may be implemented by using simple hardware components. In an embodiment of the present invention, the hardware may be a part of a device supporting multiple technologies. The hardware implementation allows independent running of the algorithm corresponding to the method of the present invention. This helps the device in identifying the GSM system while it may operate in a technology other than GSM.
The present invention may also be implemented in software. Any suitable programming language or other tools may be utilized, such as variants of JAVA, C variants (for example, C++, C#) or other programming languages, in accordance with the requirements of a particular application.
The system, as described in the present invention or any of its components, may be embodied in the form of a computing system. Typical examples of a computing system includes a programmed microprocessor, a micro-controller, a peripheral integrated circuit element, and other devices or arrangements of devices that are capable of implementing the steps constituting the method of the present invention.
The computing system comprises a processing system, an input device, a display unit and a communication interface. The processing system comprises a microprocessor. The microprocessor is connected to a communication bus. The computing system also includes a memory. The memory may include Random Access Memory (RAM) and Read Only Memory (ROM). The computing system further comprises a storage device, which can be a FIFO, LIFO or other storage devices. The storage device can also include other means of loading programs or other instructions into the computing system.
The computing system executes a set of instructions that are stored in one or more storage elements, in order to process input data. The storage elements may also hold data or other information, as desired, and may be in the form of an information source or a physical memory element present in the processing system.
The set of instructions may include various commands that instruct the processing system to perform specific tasks such as the steps that constitute the method of the present invention. The set of instructions may be in the form of a software program. The software may be in various forms such as system software or application software. Further, the software may be in the form of a collection of separate programs, a program module with a larger program or a portion of a program module. The software might also include modular programming in the form of object-oriented programming. The processing of input data by the processing machine may be in response to user commands, or results of previous processing, or in response to a request made by another processing machine.
While the preferred embodiments of the invention have been illustrated and described, it will be clear that the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the invention, as described in the claims.
