Not Applicable.
Certain embodiments of the invention relate to signal processing. More specifically, certain embodiments of the invention relate to a method and system for transmit path filter and mixer co-design.
The number and types of wireless and wireline communication standards and corresponding communication devices continues to grow each year. Although, these devices and standards may differ greatly from one standard to the next, a large percentage of communication standards/protocols do not utilize baseband communications. Accordingly, many communication devices are required to perform frequency conversion in order to communicate with remote devices. In this regard, baseband signals are typically up-converted in an RF front end prior to transmission.
Up-conversion typically involves mixing a baseband signal with a local oscillator signal in order to generate inter-modulation products at a desired transmit frequency. In this regard, a mixer may be a critical element of an RF front end due to the fact that frequency conversion may consume significant amounts of power and/or introduce large amounts of noise. Additionally, mixer design may be complex and costly when, for example, high linearity is required in order to process wideband signals. Also, an RF front end typically needs to perform some filtering/conditioning of baseband signals prior to up-conversion. In this regard, filtering may remove extraneous signals and noise in order to improve transmitter performance.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.
A system and/or method is provided for transmit path filter and mixer co-design, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.
These and other advantages, aspects and novel features of the present invention, as well as details of an illustrated embodiment thereof, will be more fully understood from the following description and drawings.
Certain embodiments of the invention may be found in a method and system for transmit path filter and mixer co-design. In this regard, a filter may generate an output current based on a voltage applied to the filter and based on a feedback current produced by the filter, and a current mirror may mirror the generated output current into a mixer. Additionally, the output current may be filtered by a transconductance and a capacitance at an input of the current mirror. A gain of an output of the mixer may be controlled by varying a width of one or more transistors of the current mirror and/or by varying a resistance coupled to the current mirror input. A frequency response of the filter may be controlled by varying the gate width and the capacitance at the input of the current mirror, and/or the resistances and/or capacitors of the filter. A baseband signal input to the filter may be filtered to generate the output current and the output current may be up-converted to RF by the mixer. In various embodiments of the invention, a filter circuit may generate a feedback current via a transconductance, and the transconductance may convert a voltage output of said filter to a current input of a mixer.
The RF receiver 23a may comprise suitable logic, circuitry, and/or code that may enable processing of received RF signals. In this regard, the receiver may be enabled to generate signals, such as local oscillator signals, for the reception and processing of RF signals. The RF receiver 23a may down-convert received RF signals to a baseband frequency signal. The RF receiver 23a may perform direct down-conversion of the received RF signal to a baseband frequency signal, for example. In some instances, the RF receiver 23a may enable analog-to-digital conversion of the baseband signal components before transferring the components to the digital baseband processor 29. In other instances, the RF receiver 23a may transfer the baseband signal components in analog form.
The digital baseband processor 29 may comprise suitable logic, circuitry, and/or code that may enable processing and/or handling of baseband frequency signals. In this regard, the digital baseband processor 29 may process or handle signals received from the RF receiver 23a and/or signals to be transferred to the RF transmitter 23b. The digital baseband processor 29 may also provide control and/or feedback information to the RF receiver 23a and to the RF transmitter 23b based on information from the processed signals. In this regard, the baseband processor 29 may provide one or more control signals to a co-designed filter and mixer in the RF transmitter 23b to configure a gain and/or frequency response of the filter/mixer. The digital baseband processor 29 may communicate information and/or data from the processed signals to the processor 25 and/or to the memory 27. Moreover, the digital baseband processor 29 may receive information from the processor 25 and/or to the memory 27, which may be processed and transferred to the RF transmitter 23b for transmission to the network.
The RF transmitter 23b may comprise suitable logic, circuitry, and/or code that may enable processing of RF signals for transmission. In this regard, the transmitter may be enabled to generate signals, such as local oscillator signals, for the transmission and processing of RF signals. The RF transmitter 23b may up-convert the baseband frequency signal to an RF signal. Accordingly, the RF transmitter 23b may comprise a co-designed filter and mixer system, such as the system 100 of
The processor 25 may comprise suitable logic, circuitry, and/or code that may enable control and/or data processing operations for the RF communication device 20. The processor 25 may be utilized to control at least a portion of the RF receiver 23a, the RF transmitter 23b, the digital baseband processor 29, and/or the memory 27. In this regard, the processor 25 may generate at least one signal for controlling operations within the RF communication device 20. The processor 25 may also enable executing of applications that may be utilized by the RF communication device 20. For example, the processor 25 may execute applications that may enable displaying and/or interacting with content received via RF signals in the RF communication device 20.
The memory 27 may comprise suitable logic, circuitry, and/or code that may enable storage of data and/or other information utilized by the RF communication device 20. For example, the memory 27 may be utilized for storing processed data generated by the digital baseband processor 29 and/or the processor 25. The memory 27 may also be utilized to store information, such as configuration information, that may be utilized to control the operation of at least one block in the RF communication device 20. For example, the memory 27 may comprise information necessary to configure a co-designed filter and mixer system (e.g., the system 100) within the RF transmitter 23b to enable up-converting baseband signals to an appropriate frequency band for transmission.
The filter 104 may comprise suitable logic, circuitry, and/or code that may enable filtering a baseband signal to pass desired frequencies and block undesired frequencies such that, at the filter output, desired frequencies may be stronger than undesired frequencies. In this regard, one or more components of the filter 104 may be configurable such that a frequency response and/or a gain of the filter 104 may be controlled. Additionally, the filter 104 may perform voltage to current conversion such that a signal input to the filter 104 may be a voltage and a signal output of the filter 104 may be a current. Voltage to current conversion may occur in a feedback loop of the filter 104, which may improve the linearity of the filter 104.
The mixer 106 may comprise suitable logic, circuitry, and/or code that may enable generation of inter-modulation products of a local oscillator (LO) signal and a baseband signal. The mixer 106 may be a current input mixer and generate an output current by mixing a LO current and a baseband signal current. In this regard, a current input mixer may provide improved linearity over a voltage input mixer.
In operation, a baseband voltage signal VBB may be applied to the filter 104. The filter 104 may be enabled to filter the signal and output a corresponding filtered baseband current signal IBB. The frequency response of the filter 104 may be configurable and may be determined based on, for example, a communication standard and/or frequency band. In this regard, the mixer 106 may be coupled to the current output of the filter 104 and the loading of the mixer 106 on the filter 104 may thus impact the frequency response of the overall circuit. Accordingly, various aspects of the invention may enable compensation or accounting for the mixer input in determining the frequency characteristics of the signal IBB. For example, one or more capacitances may be coupled to the common node coupling the filter 104 and the mixer 106, such that an additional pole is added to the overall frequency response of the filter/mixer co-design. In this manner, rather than designing filter 104 and mixer 106 separately and then simply combining them, aspects of the invention may utilize the interrelationship between the filter 104 and the mixer 106 to design the filter 104 and mixer 106 in parallel. The interrelated filter 104 and mixer 106 may achieve greater overall performance in terms of, for example, filter response, linearity, and noise.
The portion 100a of the co-designed filter and mixer is communicatively coupled to form a filtering circuit with voltage to current conversion in a feedback path.
A negative input of the co-designed filter and mixer may be coupled to a first terminal of resistor Rin1 and a positive input of the co-designed filter and mixer may be communicatively coupled to a first terminal of resistor Rin2. A second terminal of Rin1 may be communicatively coupled to a first terminal of resistor R21, R11, C11, and a positive input of amplifier O1. A second terminal of Rin2 may be communicatively coupled to a first terminal of resistor R22, R12, C12, and a negative input of amplifier O1. A negative output of O1 may be communicatively coupled to a second terminal of R11 and C11, and to a first terminal of R32. A positive output of O1 may be communicatively coupled to a second terminal of R12 and C12 and to a first terminal of R31. A second terminal of R31 may be communicatively coupled to a first terminal of C21 and to a negative input of amplifier O2. A second terminal of R32 may be communicatively coupled to a first terminal of C22 and to a positive input of amplifier O2. A second terminal of C21 may be communicatively coupled to a second terminal of R21, the drain of transistor M3, the source of transistor M1, and a first terminal of Rout. A second terminal of C22 may be communicatively coupled to a second terminal of R22, the drain of transistor M4, the source of transistor M2, and a second terminal of Rout. A positive output of O2 may be communicatively coupled to a gate of M1. A negative output of O2 may be communicatively coupled to the gate of M2. The drain of M1 may be communicatively coupled to a first terminal of Cmx and may be a negative current output of the portion 100a. The drain of M2 may be communicatively coupled to a second terminal of Cmx and may be a positive current output of the portion 100a.
The differential amplifiers O1 and O2 may comprise suitable logic, circuitry, and/or code that may enable buffering and/or amplification of differential signals. In this regard, an output of the amplifiers O1 and O2 may depend on a voltage applied to the input terminal of the amplifiers O1 and O2. Although a fully differential implementation is depicted, a single ended topology with single ended amplifiers may be implemented without deviating from the scope of the invention.
The various passive elements comprising resistors Rin, R1, R2 and R3, and capacitors Cmx, C1 and C2 may enable controlling, at least in part, a gain and/or a frequency response of the system 100 illustrated in
In an exemplary embodiment of the invention, the transistors M1-M4 may be active devices such as PMOS transistors. The transistors M1 and M2 may provide feedback signals to the resistors R2 and also may function to convert a voltage output of the amplifier O2 to current output IBB. In this regard, voltage to current conversion may be embedded in a feedback loop which may result in improved linearity over conventional methods.
Although the schematic depicted in
The transistors MX5-MX8 are coupled so as to form a mixing circuit. The transistors MX1-MX4 are configured as a current mirror, which mirrors the output current IBB into the mixing circuit comprising transistors MX5-MX8.
A differential current input from the portion 100a of
In an exemplary embodiment of the invention, the effective width of transistors MX1-MX4 may be variable. For example, the width may be controlled via one or more digital signals. Accordingly, the current mirror ratios MX1/MX4 and MX1/MX2 may be varied to control the signal current mirrored into the mixing circuit (transistors MX5-MX8). In this regard, the transistors MX1-MX4 may, for example, each comprise a number of unit sized transistors coupled in parallel via one or more switching elements. Thus, by programmatically controlling the switching elements, the number of unit sized transistors coupled in parallel may be adjusted to control the effective width of the transistors MX1 and MX2, for example. In this manner, gain of the system 100 may be adjusted without altering the DC current in the mixing circuit. This may be advantageous in that altering the DC current in the mixing circuit may introduce undesirable effects.
Although, altering the current mirror transistors MX1 and MX2 may provide desirable gain control characteristics, it may also alter the frequency response of the system 100. In this regard, although the capacitor Cmx may be introduce a desirable pole frequency (e.g., to filter out of band noise) that pole frequency may depend on the transconductance seen at the node to which Cmx is coupled. For example, the pole frequency may be given by the following equation:
where fp is the pole frequency, gm is the equivalent transconductance of the input device of the current mirror, and Cp is any stray capacitance at the input to the current mirror. In this regard, gm may depend on MX1, MX2, M1, and/or M2. Accordingly, in instances where MX1 and MX2 may be adjusted to vary a gain of the system 100, then the value of Cmx may be adjusted by a corresponding amount such that the pole frequency, fp, remains within determined limits. In this regard, the pole at fp may be determined and/or controlled to filter noise generated by transistors M1, M2, MX1, MX2, MX3, and/or MX4. Thus, the extra pole, fp, introduced in the co-designed filter and mixer 100 may enable a reduction in out-of-band noise in the output of the mixer.
In an exemplary embodiment of the invention, a combination of a variable resistance Rout, a variable capacitance Cmx, and variable width transistors MX1 and MX2 may provide a highly flexible and accurate means to control gain in the system 100.
Aspects of a method and system for transmit path filter and mixer co-design are provided. In this regard, a filter, such as a portion of the co-designed filter and mixer 100, may generate an output current, IBB of
Another embodiment of the invention may provide a machine-readable storage, having stored thereon, a computer program having at least one code section executable by a machine, thereby causing the machine to perform the steps as described herein for transmit path filter and mixer co-design.
Accordingly, the present invention may be realized in hardware, software, or a combination of hardware and software. The present invention may be realized in a centralized fashion in at least one computer system, or in a distributed fashion where different elements are spread across several interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware and software may be a general-purpose computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein.
The present invention may also be embedded in a computer program product, which comprises all the features enabling the implementation of the methods described herein, and which when loaded in a computer system is able to carry out these methods. Computer program in the present context means any expression, in any language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following: a) conversion to another language, code or notation; b) reproduction in a different material form.
While the present invention has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the present invention without departing from its scope. Therefore, it is intended that the present invention not be limited to the particular embodiment disclosed, but that the present invention will include all embodiments falling within the scope of the appended claims.