The present disclosure relates generally to inductor-inductor-capacitor (LLC) type power converters, and more specifically to control of synchronous rectifiers in a LLC power converter.
Switching power supplies are commonly used to achieve high efficiency and high power-density. Resonant dc-dc converters are a popular type of switching power supply. A type of resonant converter, the LLC DC-DC converter is used widely in power supply applications. This circuit benefits from simplicity, low cost, high efficiency and soft-switching. Such LLC DC-DC converters include a rectifier to convert alternating current (AC) power to direct current (DC). Such rectifiers may include one or more rectifier diodes and/or one or more switches, such as switching transistors, also called synchronous rectifiers (SRs), to convert the AC power to DC. Due to the forward voltage drop of rectifier diodes, there is significant loss on rectifier diodes in some applications, particularly those with a low output voltage and high load current. Therefore, SRs are typically utilized for high load current LLC dc-dc converters to reduce the secondary losses.
Field effect transistors (FETs), such as metal-oxide-semiconductor field-effect transistor (MOSFET) devices are commonly used as switches in SR applications. One design feature of MOSFET devices is that their construction defines a body diode that functions to allow current flow in one direction and to block current flow in an opposite direction. In high load current applications, the loss of body diodes of SRs is much higher than conduction loss of SRs, thus the optimal efficiency of the converter depends on the well adjustment of SRs gate driving signals. Generally, when the voltage across SRs are detected to reach to a forward drop voltage (VF) for several nanosecond continuously, SRs are turned on; and when the voltage across SRs are detected to reach to zero, SRs are turned off. However, real-world SR devices also have a parasitic inductance that is modeled as an inductor in series with SRs, and the parasitic inductance can lead to SR turn-off too early.
Compensator circuits have been proposed to address the issue of premature SR turn-on, some of which use digital detecting methods to turn on SRs by detecting turn-on of the body diodes of SRs. However, there still may be ringing voltage across SRs at high load current when the current flowing through SRs decreases to zero. When minimum of ringing voltage reaches close to zero, the body diodes of SRs become turned on. This causes early turn-on of the SRs and results in undesired and inefficient operation.
The present disclosure provides an LLC power converter comprising a switching stage and a resonant tank, the switching stage configured to switch an input power at a switching frequency to apply a switched power to the resonant tank, and the resonant tank including a resonant inductor, a resonant capacitor, and a parallel inductance. The LLC power converter also comprises a transformer having a primary winding connected to the resonant tank and a secondary winding. A synchronous rectifier (SR) switch is configured to selectively switch current from the secondary winding to supply a rectified current to a load. The LLC power converter also comprises a filter including a filter capacitor and a filter resistor connected across the SR switch, with the filter capacitor defining a filter capacitor voltage thereacross. A rectifier driver is configured to drive the SR switch to a conductive state in response to the filter capacitor voltage being less than a threshold value.
The present disclosure also provides a method of operating an LLC power converter. The method comprises sensing a filter capacitor voltage across a filter capacitor of a resistor-capacitor (RC) filter connected across a synchronous rectifier (SR) switch of the LLC power converter; comparing the filter capacitor voltage with a threshold voltage; and driving the SR switch to a conductive state in response to the filter capacitor voltage being less than the threshold voltage.
Further details, features and advantages of designs of the invention result from the following description of embodiment examples in reference to the associated drawings.
Referring to the drawings, the present invention will be described in detail in view of following embodiments. In this disclosure, the ringing voltage across SRs is analyzed, and a zero-crossing filter for LLC dc-dc converter is proposed. By using the filter, LLC dc-dc converter can work well and keep high efficiency at high load current.
In some embodiments, the multi-phase LLC power converter 100 may be used as a low-voltage DC-DC converter (LDC) configured to supply an output voltage of 9.0 to 16.0 VDC from an input having a voltage of 250-430 VDC. In some embodiments, the multi-phase LLC power converter 100 may have a peak efficiency of at least 96.7%. In some embodiments, the multi-phase LLC power converter 100 may have a full-load efficiency of at least 96.2%. In some embodiments, the multi-phase LLC power converter 100 may have a power density of at least about 3 kW/L.
The example LLC phase 102, 104, 106 shown in
Each of the four high-speed switches Q1, Q2, Q3, Q4 is configured to switch current from a corresponding one of a positive conductor 110+ or a negative conductor 110− of the input bus 110+, 110− to a corresponding one of a positive conductor 140+ or a negative conductor 140− of the switched power bus 140+, 140−. The switching stage 130 may have a different arrangement which may include fewer than or greater than the four high-speed switches Q1, Q2, Q3, Q4, shown in the example LLC phase 102 shown in
The resonant tank 132 includes a resonant inductor Lr, a resonant capacitor Cr, and a parallel inductance Lp all connected in series with one another between the switched power bus 140+, 140−. The transformers Tx1, Tx2 each include a primary winding 142, with the primary windings 142 of the transformers Tx1, Tx2 connected in series with one-another, and with the series combination of the primary windings 142 connected in parallel with the parallel inductance Lp. The parallel inductance Lp may include a stand-alone inductor device. Alternatively or additionally, the parallel inductance Lp may include inductance effects, such as a magnetizing inductance, of the primary windings 142 of the transformers Tx1, Tx2. Each of the transformers Tx1, Tx2 has a secondary winding 144 with a center tap connected directly to the positive terminal 120+ of the output bus 120+, 120−. The ends of the secondary windings 144 of the transformers Tx1, Tx2 are each connected to the negative terminal 120− of the output bus 120+, 120− via a rectifier SR1, SR2, SR3, SR4 in the rectification stage 134. One or more of the rectifiers SR1, SR2, SR3, SR4 may take the form of a switch, such as a field effect transistor (FET), operated as a synchronous rectifier, as shown in
For high load current applications, the conduction loss of the rectifiers SR1, SR2, SR3, SR4 is proportional to the square of load current in synchronous rectification LLC dc-dc converter. Therefore, two transformers Tx1, Tx2 with series-connected input (primary) windings 142 and parallel-connected output (secondary) windings 144 are adopted to reduce current stress of the rectifiers SR1, SR2, SR3, SR4, which is shown in
As shown in
The equivalent circuit in
The initial value of the voltage across capacitor uc and the current flowing through inductor iL are given in equations (6). Substituting (6) into (5) gives equation (7). And thus uc is given by equation (8). Setting parameters in accordance with equation (9) provides equations (10).
Substituting equations (9) and (10) into (8) gives equation (11).
If
the circuit operates at underdamped, thus there is voltage ringing across the SRs. And according to equation (11), when the voltage across capacitor uc is lower than zero, the SRs are turned on early. In order to address this issue, an RC equivalent 150 is connected in parallel with the parasitic capacitance of the SRs 2Coss,SR/n2, as shown in
To avoid bias current from the SR driver circuit 162, 166 offsetting the filter capacitor voltage Vcf1, Vcf2, the value of filter resistors Rf1, Rf2 should be less than 1 kΩ. Besides, the RC time constant should be around 100 ns. Each of the SR switches SR1, SR2, SR3, SR4 may an RC filter 160, 164 connected thereacross, but
It can be seen from equation (12), the amplitude of voltage across filter capacitor uc,filter is divided by filter capacitor Cfilter and filter resistor Rfilter. If the voltage across the filter capacitor uc, filter is detected to create turn-on signal for SRs, the minimum of detected voltage less than zero problem can be solved.
Specifications of a single-phase converter in accordance with the present disclosure are shown in Table. I.
Table II presents a summary comparison of a proposed LDC in accordance with the present disclosure compared with eight different other reference DC-DC converter designs. As shown in Table. I, the proposed LDC achieves high efficiency and high power-density compared with other LDCs.
94%
93%
93%
To verify the analysis, a 1.26 kW prototype is designed. The series resonant inductor is 25 μH, the parallel inductor is 125 μH, the resonant capacitor is 3.3 nF and transformer ratio is np:ns1:ns2=22:1:1. Input voltage range is 250V-430V and output voltage range is 9V-16V. 90 A load current at 14V output voltage is achieved, and SRs are turned on properly.
As shown in
A method 400 of operating an LLC power converter 100 is shown in the flow chart of
The method 400 also includes comparing the filter capacitor voltage VCf with a threshold voltage VTH_ON at step 404. Step 404 may be performed by a comparator, which may include hardware, software, or a combination of hardware and software. The threshold voltage threshold voltage VTH_ON may be 0.0 V, although the threshold voltage VTH_ON may be higher or lower than 0.0 V. The threshold voltage VTH_ON may be fixed or variable.
The method 400 also includes driving the SR switch SR1, SR2, SR3, SR4 to a conductive state in response to the filter capacitor voltage VCf being less than the threshold voltage threshold voltage VTH_ON at step 406. Driving the SR switch to the conductive state may include asserting or de-asserting a control signal coupled to a gate of the SR switch SR1, SR2, SR3, SR4.
Steps 402-406 may each be performed for each of two SR switches SR1, SR2, SR3, SR4 connected to a single secondary winding 144 of a transformer Tx1, Tx2. For example, as shown in
The method 400 may also include enabling a number of LLC phases 102, 104, 106 of the LLC power converter 100 less than all of the LLC phases 102, 104, 106 at step 408. This may be called phase shedding. A controller may enable only as many of the LLC phases enabled 102, 104, 106 as are needed to satisfy an output current requirement of the multi-phase LLC power converter 100. Satisfying the output current requirement may include generating an output current that meets the demand of a load 122. Alternatively or additionally, satisfying the output current requirement may include operating the LLC power converter 100 with number of LLC phases 102, 104, 106 causing the LLC power converter 100 to operate with a highest efficiency. For example, and with reference to
The method 400 may also include switching one or more high-speed switches Q1, Q2, Q3, Q4 of a switching stage 130 at a switching frequency fsw exceeding 300 kHz at step 410 to apply a switched power to a resonant tank 132 of the LLC power converter 100. The high-speed switches Q1, Q2, Q3, Q4 may be Gallium Nitride (GaN) high-electron-mobility transistors (HEMTs). In some embodiments, the switching frequency fsw may be varied between 260 and 400 kHz. In some other embodiments, the switching frequency fsw may be varied between 260 and 380 kHz. In some embodiments, the high-speed switches Q1, Q2, Q3, Q4, may be switched at an operating frequency range of between 260 and 380 kHz.
The method 400 may also include supplying an output voltage Vo of 9.0 to 16.0 VDC from an input power having an input voltage Vin of 250 to 430 VDC at step 412.
This disclosure presents a zero-crossing filter for driving synchronous rectifiers of LLC DC-DC converters to reduce or eliminate the effect of voltage ringing across SRs in high load current applications. In the proposed LLC DC-DC converter, GaN HEMTs are used in the switching stage 130, thus switching frequency is greater than in conventional DC-DC converters, and the volume of the circuit is reduced. Zero voltage switching (ZVS) turn-on of the high-speed switches Q1, Q2, Q3, Q4 and secondary SRs is achieved, zero current switching (ZCS) turn-off of secondary SRs is also realized. By detecting the voltage across the filter capacitor to create the turn-on signal for SRs, the problem of early SR turn-on is reduced or eliminated. In the proposed LLC DC-DC converter, wide input and output voltage ranges are realized. Peak efficiency of 96.99% at 55A load current is achieved.
The system, methods and/or processes described above, and steps thereof, may be realized in hardware, software or any combination of hardware and software suitable for a particular application. The hardware may include a general purpose computer and/or dedicated computing device or specific computing device or particular aspect or component of a specific computing device. The processes may be realized in one or more microprocessors, microcontrollers, embedded microcontrollers, programmable digital signal processors or other programmable device, along with internal and/or external memory. The processes may also, or alternatively, be embodied in an application specific integrated circuit, a programmable gate array, programmable array logic, or any other device or combination of devices that may be configured to process electronic signals. It will further be appreciated that one or more of the processes may be realized as a computer executable code capable of being executed on a machine readable medium.
The computer executable code may be created using a structured programming language such as C, an object oriented programming language such as C++, or any other high-level or low-level programming language (including assembly languages, hardware description languages, and database programming languages and technologies) that may be stored, compiled or interpreted to run on one of the above devices as well as heterogeneous combinations of processors processor architectures, or combinations of different hardware and software, or any other machine capable of executing program instructions.
Thus, in one aspect, each method described above and combinations thereof may be embodied in computer executable code that, when executing on one or more computing devices performs the steps thereof. In another aspect, the methods may be embodied in systems that perform the steps thereof, and may be distributed across devices in a number of ways, or all of the functionality may be integrated into a dedicated, standalone device or other hardware. In another aspect, the means for performing the steps associated with the processes described above may include any of the hardware and/or software described above. All such permutations and combinations are intended to fall within the scope of the present disclosure.
The foregoing description is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same may also be varied in many ways. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.
This PCT International Patent Application claims the benefit of U.S. Provisional Patent Application No. 62/796,536, filed Jan. 24, 2019, and U.S. Provisional Patent Application No. 62/796,547, filed Jan. 24, 2019, the contents of which are incorporated herein by reference in their entirety.
Filing Document | Filing Date | Country | Kind |
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PCT/US2020/014911 | 1/24/2020 | WO | 00 |
Number | Date | Country | |
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62796536 | Jan 2019 | US | |
62796547 | Jan 2019 | US |