This disclosure relates to direct current (DC) power sources and in particular to variable output DC power sources.
A variety of electronic devices such as cell phones, laptop computers, and personal digital assistants to name only a few, may be powered by one or more variable output DC power sources. A variable output DC power source may accept an unregulated input voltage and provide a variable output DC voltage and output current to a load of the electronic device. The unregulated input voltage may be an alternating current (AC) or DC input voltage.
Like other power supply sources, the variable output DC power source may be capable of providing a maximum output power to the load. At any time, the actual output power can be expressed as the product of the output voltage and output current. The instantaneous values of the output voltage/current of the variable output DC power source may be controlled by one or more control signals. These control signals may be provided according to a power management algorithm and may be the result of a set of sensing signal processing performed by power control circuitry. Other limitations may be imposed on the instantaneous output voltage/current of the variable output DC power source, but for clarity and simplicity, analysis herein is directed to the output power limiting features of the power control circuitry. Hence, if other limitations are not imposed, as the output voltage is reduced the output current can be increased as long as the product of the output voltage and output current is less than the maximum output power. Similarly, as the output current is reduced the output voltage can be increased as long as the product of the output current and output voltage is less than the maximum output power.
However, since power control circuits are relatively complicated and expensive, a conventional power control circuit limits the output current to a fixed maximum current level and limits the output voltage to a fixed maximum voltage level. The fixed maximum current and voltage levels are designed so that the product of each is at most equal to the maximum output power. Although a simple approach, this conventional power control circuit significantly reduces the safe operation region of the variable output DC power source.
Features and advantages of embodiments of the claimed subject matter will become apparent as the following Detailed Description proceeds, and upon reference to the Drawings, where like numerals depict like parts, and in which:
Although the following Detailed Description will proceed with reference being made to illustrative embodiments, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art. Accordingly, it is intended that the claimed subject matter be viewed broadly.
The variable output DC power source 102 may accept the unregulated input voltage and provide a variable output DC voltage (Vout) and output current (Iout) to the load 108. The variable output DC power source 102 may provide varying Vout and Iout levels in response to one or more control signals (CS) from the power control circuitry 104. As used herein, “circuitry” may comprise, for example, singly or in any combination, hardwired circuitry, programmable circuitry, state machine circuitry, and/or firmware that stores instructions executed by programmable circuitry. The power control circuitry 104 may accept one or more input signals via path 114. The input signals may be representative of Iout and/or Vout provided by the variable output DC power source 102 to the load 108. The power control circuitry 104 may provide one or more output control signals (CS) via path 106 to the VOPS 102.
The power control circuitry 104 consistent with an embodiment may monitor Iout and Vout and compare a signal representative of Iout to a particular threshold value depending on the value of Vout. The threshold value may be a fixed threshold value for an initial range of voltage levels, e.g., from about 0 volts to Vo, and the threshold value may be a variable threshold value for another range of voltage levels, e.g., from Vo to Vm. If the monitored output current is equal to or greater than the appropriate threshold level for an associated voltage level, the power control circuitry 104 may provide a control signal to the variable output DC power source 102.
In response, the variable output DC power source 102 may drive the output current to the appropriate maximum current level for an associated output voltage.
Ideally, the maximum output current Im of the variable output DC power source 102 may be as detailed in equations (1) and (2):
Im=Io, when Vout≦Vo (1)
Im=Pm/Vout, when Vo<Vout≦Vm (2)
where Io is a fixed current level and Vo is a fixed voltage level of a conventional system such that Vo×Io=Pm, where Vout is the output voltage level of the variable output DC power source 102, and Pm is the maximum output power of the variable output DC power source 102. Plot 202 represents the plot of Im values over the initial voltage range specified in equation (1) and plot 204 represents the plot of Im values over the first voltage range specified in equation (2). However, circuitry to limit the output current of the variable output DC power source 102 to the variable maximum output current Im as expressed by equation (2) may be complicated and expensive.
Accordingly, a method and circuitry consistent with an embodiment may establish another plurality of output current levels Ima in response to the current levels Im defined by equation (2). The plurality of output current levels Ima may approximate the plurality of output current levels Im as defined by equation (2) and may be given by equation (3):
Ima=Io−k(Vout−Vo), for Vo<Vout≦Vm (3)
where k is a constant representing the slope of the line 207 defined by equation (3). The constant k represents conductance and may be expressed in units of siemens. The constant k may also be expressed as the tangent(x) where the angle x is detailed in
A plot 207 defined by equation (3) for a selected k that provides a linear approximation for the plot 204 over the first voltage range, Vo<Vout≦Vm is illustrated in
As detailed herein, the difference between plots 207 and 204 can be minimized to yield approximation errors of 1.0% or less. Error e1 represents the maximum positive error between one of the output current levels defined by plot 204 and one of the output current levels defined by plot 207 which may occur at voltage V1. Error e2 represents the maximum corresponding negative error over the same voltage range which occurs at the voltage Vm. Both errors e1 and e2 are dependent on the value of k and may be evaluated by analytical mathematical means.
Since errors e1 and e2 are dependent on the value of k, k may be selected to result in errors e1 and e2 such that the absolute value of each error e1 and e2 divided by the respective ideal current limit at associated voltage levels V1 and Vm are equal as detailed in equation (4).
Choosing k to result in errors e1 and e2 that satisfy equation (4) is one method of achieving a minimum overall relative approximation error for the linear plot 207 compared to the plot 204 over the same voltage range. Other approaches based on different conditions imposed to e1, e2, or both may be chosen to result in different values of k. In one example, the maximum output power Pm of the variable output DC power source 102 may be 64 watts. The voltage Vo may be 12 volts, the current Io may be 5.33 amps, and the maximum voltage Vm may be 16 volts. In this example, the value of k may be chosen to be 0.348 siemens to result in an error e2 of only 0.04 A compared to ideal current of 4.0 A or only a 1.0% error at this voltage level.
Other types of current sensors may also be utilized. The value of the voltage drop across the sense resistor 303 may provide a signal representative of the output current Iout. The current sense amplifier 302 may then amplify this signal and provide an output voltage signal Vs to the comparator 304.
The output voltage signal Vs from the sense amplifier 302 may be defined by equation (5):
Vs=RS×A×Iout, (5)
where RS is the resistance value of the sense resistor 303, A is the gain of the sense amplifier 302 and Iout is the output current of the variable output DC power source 102. The comparator 304 may compare the signal (Vs) representative of the output current (Iout) to a threshold level. The threshold level (Vcl) may be a fixed threshold (Vcl=Vclo) or a variable threshold (Vcl=Vcl) depending on the value of Vout. The fixed threshold may be provided by the threshold input circuitry 310 to the comparator 304 if the output voltage Vout is less than or equal to the fixed voltage level Vo during the initial voltage range as illustrated in
The fixed threshold (Vclo) may be defined by equation (6):
Vclo=RS×A×Io (6)
where RS is the resistance value of the sense resistor 303, A is the gain of the sense amplifier 302 and Io is the selected fixed maximum current level over the initial range of output voltages less than or equal to Vo. Whenever the actual output current Iout equals Io, the voltage level Vs of equation (5) becomes equal to the voltage level Vclo of equation (6) and the comparator 304 provide an output voltage signal (CL) to the power limiting control circuitry 308 representative of this condition. In response, the power limiting control circuitry 308 may provide a control signal via path 106 to the variable output DC power source 102 to instruct the variable output DC power source 102 to drive its output current to Io.
The comparator 306 may receive a signal representative of the output voltage Vout. The comparator 306 may also receive a signal representative of a maximum voltage level Vm. The comparator 306 may compare such signals and output a voltage signal (VL) to the power limiting control circuitry 308 in response to this comparison. If the output voltage level is equal to or greater than Vm, the output voltage signal (VL) from the comparator 306 may be representative of this condition. In response, the power limiting control circuitry 308 may provide a control signal via path 106 to the variable output DC power source 102 to instruct the variable output DC power source 102 to drive its output voltage to Vm.
Vcl=RS×A×Ima, (7)
where Vcl is the variable voltage threshold input to comparator 304, RS is the resistance value of sense resistor 303, A is the gain of the sense amplifier 302, and Ima is the maximum output current of the variable output DC power source 102 for a particular output voltage level in the first range of voltages where Vo<Vout≦Vm. Given Ima as detailed in equation (3), equation (7) can be rewritten as detailed in equation (8).
Vcl=RS×A×[Io−k×(Vout−Vo)] (8)
Since RS×A×Io may be expressed as Vclo as detailed in equation (6), equation (8) may further be simplified to equation (9).
Vcl=Vclo−k1(Vout−Vo), where k1 is a constant equal to RS×A×k. (9)
The threshold input circuitry 310a may include operational amplifiers 402, 404, transistors Q1, Q2, and resistors R1, R2, R3, and R4. Transistors Q1 and Q2 may be any variety of transistors. In one embodiment, transistor Q1 may be a p-type metal oxide semiconductor field effect transistor (MOSFET) or PMOS MP1. Transistor Q2 may be an n-type MOSFET or NMOS MN1. The first resistor R1 may be disposed between a terminal 414 accepting the output voltage Vout and a source terminal of the transistor MP1. Node 406 may be connected to the inverting input of the operation amplifier 402. The noninverting input of the operational amplifier 402 may be connected to the input terminal accepting the fixed voltage Vo. The transistor MP1 may have its control or gate terminal coupled to the output of the operational amplifier 402.
The second resistor R2 may be connected between the drain of transistor MP1, the node 416, and ground. The transistor MN1 may have its control or gate terminal coupled to the output of the operational amplifier 404 to accept an output signal from the operational amplifier 404. A third resistor R3 may be coupled to an output node 420 and a terminal providing the fixed threshold level Vclo. The third resistor R3 may also be coupled to the drain terminal of transistor MN1. The output node 420 may provide the output threshold level signal Vcl from the threshold input circuitry 310a. The fourth transistor R4 may be connected between the source terminal of transistor MN1, the node 418, and ground. The inverting input terminal of the operational amplifier 404 may be coupled to node 418, while its noninverting input may be coupled to node 416.
In operation, operational amplifier 402 may drive the gate of MP1 to conduct a current in order to permanently maintain the voltage level on its inverting input (node 406) at the same level with its noniverting input, the fixed voltage Vo. This is possible whenever the output voltage Vout is higher than Vo, the resulting current through both resistors R1 and R2 being I1=(Vout-Vo)/R1. When Vout<Vo the current through transistor MP1 cannot be further reduced, the gate of transistor MP1 is driven to the maximum available voltage, transistor MP1 is OFF and the current through resistors R1 and R2 becomes zero. Consequently the voltage on the resistor R2, i.e. between node 416 and the ground, is Vr2=0 when Vout<Vo and Vr2=R2 I1=(R2/R1)×(Vout−Vo) when Vout>Vo. For reasons known to those skilled in the art through a feedback mechanism Vr2 will be repeated on the resistor R4, namely between the node 418 and the ground, generating the current I2=Vr2/R4 when Vout>Vo and I2=0 when Vout<Vo. Since the same current I2 flows through the resistor R3 it becomes evident that the output threshold voltage Vcl on the node 420 may be expressed as in equation (10) for Vout>Vo and is constant Vcl=Vclo when the output voltage of the DC source Vout is less than Vo.
In equation (10), Vcl is the variable threshold level provided at the output node 420, Vclo is the fixed threshold level, R1, R2, R3, and R4 are the resistance values of resistors R1, R2, R3, and R4, Vout is the output voltage, and Vo is the fixed voltage level defining the boundary between the initial and first range of output voltages as illustrated in
By comparing equation (9) and (10), it becomes evident that the value of the resistors R1, R2, R3, and R4 could be chosen such that equation (11) is true.
Operation 504 may include establishing a second plurality of output current levels over the first range of output voltage levels in response to the first plurality of output current levels, the second plurality of output current levels decreasing with increasing voltage levels over the first range. For instance, in one embodiment the second plurality of output current levels (Ima) may be those defined by plot 207 in
In summary, there is also provided power control circuitry for controlling a variable output DC power source. The power control circuitry may comprise a first comparator to compare a signal representative of an output current level of the variable output DC power source with a threshold level and provide a first output signal in response to the comparison. The power control circuitry may further comprise threshold input circuitry to provide the threshold level to the first comparator, the threshold level being a fixed threshold level if an output voltage of the variable output DC power source is less than or equal to a first fixed voltage level, the threshold level being a variable threshold level if the output voltage is greater than the first fixed voltage level. The power control circuitry may further comprise power limiting control circuitry to provide a control signal to the variable output DC power source in response to the first output signal from the first comparator.
In one embodiment the variable threshold may be representative of a second plurality of output current levels (Ima) of the variable output DC power source over the first range, the second plurality of output current levels (Ima) may approximate a first plurality of output current levels (Im) where each one of the first plurality of output current levels equals a maximum output power level of the variable output DC power source divided by an output voltage of the variable output DC power source over the first range. The first plurality of output current levels (In) hyperbolically decreases with increasing voltage levels over the first range and the second plurality of output current levels (Ina) may linearly decrease with increasing voltage levels over the first range.
There is also provided an electronic system. The system may comprise a variable output DC power source to provide power to a load, and power control circuitry to provide a control signal to the variable output DC power source. The variable output DC power source may be responsive to the control signal to adjust the output power level of the DC power source. The power control circuitry may comprise a first comparator to compare a signal representative of an output current level of the variable output DC power source with a threshold level and provide a first output signal in response to the comparison. The power control circuitry may further comprise threshold input circuitry to provide the threshold level to the first comparator, the threshold level being a fixed threshold level if an output voltage of the variable output DC power source is less than or equal to a first fixed voltage level, the threshold level being a variable threshold level if the output voltage is greater than the first fixed voltage level. The power control circuitry may further comprise power limiting control circuitry to provide a control signal to the variable output DC power source in response to the first output signal from the first comparator.
Advantageously, in these embodiments the output voltage of the variable output DC power source can be extended to operate in the Vo<Vout≦Vm range. By approximating the hyperbolically decreasing plot of output current values, e.g., plot 204, simplified power control circuitry can be more readily developed compared to other circuitry that may attempt to limit the output current to the hyperbolic plot. A linear plot of output current levels, e.g., plot 207, may be developed to approximate the hyperbolically decreasing plot. Errors between the linear plot and hyperbolic plot can be minimized by mathematical and analytical means.
The terms and expressions which have been employed herein are used as terms of description and not of limitation, and there is no intention, in the use of such terms and expressions, of excluding any equivalents of the features shown and described (or portions thereof), and it is recognized that various modifications are possible within the scope of the claims. Other modifications, variations, and alternatives are also possible. Accordingly, the claims are intended to cover all such equivalents.
This application is a continuation of U.S. application Ser. No. 11/094,983, filed Mar. 31, 2005, now U.S. Pat. No. 7,095,217, the teachings of which are fully incorporated herein by reference.
Number | Date | Country | |
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Parent | 11094983 | Mar 2005 | US |
Child | 11466291 | Aug 2006 | US |