Claims
- 1. A process for fabricating a device comprising the steps of:
- selecting a first single crystal substrate having a first crystal lattice and a second single crystal substrate having a second crystal lattice different from the first crystal lattice wherein the second substrate has at least one single crystal device layer formed thereon;
- cleaning the first surface of the first single crystal substrate and the single crystal device layer,
- placing the cleaned first surface in physical contact with the cleaned single crystal device layer for a duration sufficient to obtain a bond of an attractive force between the cleaned first surface and the cleaned single crystal device layer;
- first heating at a low temperature of about 30.degree. C. to about 90.degree. C. for a duration of about 10 minutes to about 30 minutes the bonded first surface and single crystal device layer to release gas entrapped by the first single crystal substrate or the single crystal device layer;
- removing the second substrate, leaving the single crystal device layer bonded to the first single crystal substrate; and
- heating at a high temperature the first single crystal substrate to increase the strength of the bond between the first single crystal substrate and the single crystal device layer bonded thereto.
- 2. The process of claim 1 further comprising the step of:
- second heating at a low temperature of the first single crystal substrate bonded to the first single crystal device layer to release gas entrapped by the first single crystal substrate or the single crystal device layer after the step of removing the second substrate.
- 3. The process of claim 1 further comprising the step of: patterning either the first single crystal substrate or the second single crystal substrate before the step of cleaning the first surface, the pattern providing an irregular surface for allowing gas to escape when the substrates are pressed together.
- 4. The process of claim 1 wherein the high temperature heating is performed at a temperature of about 630.degree. C. to about 650.degree. C. for a duration of about 15 minutes to about 30 minutes.
- 5. The process of claim 1 wherein the first single crystal substrate is a silicon substrate and the second single crystal substrate is a III-V single crystal substrate with at least one III-V device layer formed thereon.
- 6. The process of claim 5 wherein the III-V single crystal substrate is an indium phosphide substrate and the at least one III-V device layer is selected from the group consisting of indium gallium arsenide and indium phosphide.
- 7. The process of claim 2 wherein the second heating at a low temperature is performed at a temperature of about 30.degree. C. to about 90.degree. C. for a duration of about 15 minutes to about 30 minutes.
CROSS-REFERENCE TO RELATED APPLICATION
This application is a continuation in part of U.S. Ser. No. 09/204,047, filed Dec. 2, 1998 and entitled "Process for Bonding Crystalline Substrates With Different Crystal Lattices" which is a continuation in part of U.S. Ser. No. 08/947,175, filed Oct. 8, 1997 now U.S. Pat. No. 5,966,622, and entitled "Process for Bonding Crystalline Substrates With Different Crystal Lattices."
US Referenced Citations (7)
Non-Patent Literature Citations (4)
Entry |
Chung et al. "Wafer Direct Bonding of Compound Semiconductors . . . Bonding Method", Applied Surface Science 117/118 (1997),p.808-812. |
Kagawa, T. et al., "In Situ Wafer Bonding of an InP/InGaAs Epitaxial Wafer . . . Chamber", App. Phys. Let., 69 (20), p. 3057-59. |
Hawkins et al., "Silicon Heterointerface Photodetector", App. Phys., Lett., 68 (26), p. 3692. |
Hawkins et al., "High Gain-Bandwidth-Product Silicon Heterointeface Photodetector", App. Phys. Lett., 70 (03), p. 303. |
Continuation in Parts (2)
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Number |
Date |
Country |
Parent |
204047 |
Dec 1998 |
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Parent |
947175 |
Oct 1997 |
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