Patent Application
20190121763
In the byte striping rule of the Peripheral Component Interconnect express (PCIe) specification, a packet is transmitted over x1, x2, x4, x16 or x32 lanes of a link. For a multi-lanes application, because a symbol is divided into several parts for transmission, each channel between two chips must have the same lane number for every chip to make sure the receiver side can process the data correctly. Taking a four-lane application as an example, input/output (I/O) terminals having a lane number “0” within a first chip must be connected to I/O terminals having the lane number “0” within a second chip, I/O terminals having a lane number “1” within the first chip must be connected to I/O terminals having the lane number “1” within the second chip, I/O terminals having a lane number “2” within the first chip must be connected to I/O terminals having the lane number “2” within the second chip, and I/O terminals having a lane number “3” within the first chip must be connected to I/O terminals having the lane number “3” within the second chip. However, because the pins/balls arrangements may be different for different chip designs, the aforementioned lane number rule may cause difficult or complicated routings on a printed circuit board (PCB).
It is therefore an object of the present invention to provide a multi-lane sequence auto-tuning method, which can function properly even if two chips have different lane numbers for the same channel to make the PCB routing be flexible, to solve the above-mentioned problems.
According to one embodiment of the present invention, an electronic device comprises an upstream port and a control circuit. The upstream port comprises a plurality of lanes, wherein the plurality of lanes are used to couple to a plurality of lanes of a downstream port of another electronic device, respectively. The control circuit is coupled to the upstream port, and is arranged for controlling a data transmission and data reception of the upstream port. When the lanes of the upstream port receive training sequences having a plurality of lane numbers from the lanes of the downstream port, respectively, to initiate a lane number negotiation, the lanes of the upstream port send back the received lane numbers to the downstream port, without considering default lane numbers of the lanes of the upstream port.
According to another embodiment of the present invention, a method for communicating with another electronic device is provided, which comprises: providing an upstream port comprising a plurality of lanes, wherein the plurality of lanes are used to couple to a plurality of lanes of a downstream port of the another electronic device, respectively; receiving training sequences having a plurality of lane numbers from the lanes of the downstream port to initiate a lane number negotiation; and sending back the received lane numbers to the downstream port, without considering default lane numbers of the lanes of the upstream port.
According to another embodiment of the present invention, an electronic device comprises a downstream port and a control circuit. The downstream port comprises a plurality of lanes, wherein the plurality of lanes are used to couple to a plurality of lanes of an upstream port of another electronic device, respectively. The control circuit is coupled to the downstream port, and is arranged for controlling a data transmission and data reception of the upstream port. When the lanes of the downstream port receive training sequences having a plurality of lane numbers from the lanes of the upstream port, respectively, the lanes of the downstream port send back the received lane numbers to the upstream port, without considering default lane numbers of the lanes of the downstream port.
According to another embodiment of the present invention, a method for communicating with another electronic device is provided, which comprises: providing a downstream port comprising a plurality of lanes, wherein the plurality of lanes are used to couple to a plurality of lanes of an upstream port of another electronic device, respectively; receiving training sequences having a plurality of lane numbers from the lanes of the upstream port, respectively; and sending back the received lane numbers to the upstream port, without considering default lane numbers of the lanes of the downstream port.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
Certain terms are used throughout the following description and claims to refer to particular system components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to . . . ”. The terms “couple” and “couples” are intended to mean either an indirect or a direct electrical connection. Thus, if a first device couples to a second device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
The electronic device 110 comprises a downstream port 112 and a control circuit 114, wherein the downstream port 112 serves as an interface circuit complied with the PCIe standard, and the downstream port 112 comprises at least a transaction layer, data link layer and physical layer, and a plurality of I/O terminals 116_1-116_4; and the control circuit 114 is arranged to control data transmission and data reception of the downstream port 112. In addition, the control circuit 114 may be implemented with or without the auto-tuning mechanism of the present invention.
In this embodiment, the electronic device 110 is communicated with the electronic device 120 via four lanes, wherein each lane represents a dual channel for a differential signal pair, and one pair for transmission and one pair for reception. Specifically, the channels between the I/O terminals 116_1 and 126_1 represents a first lane, the channels between the I/O terminals 116_2 and 1262 represents a second lane, the channels between the I/O terminals 116_3 and 126_3 represents a third lane, and the channels between the I/O terminals 116_4 and 126_4 represents a fourth lane. In this embodiment, the electronic device 110 and the electronic device 120 provide different default lane numbers for each lane, for example, the electronic device 110 sets the first lane, the second lane, the third lane and the fourth lane to have default lane numbers “0”, “1”, “2”, “3”, respectively; and the electronic device 120 sets the first lane, the second lane, the third lane and the fourth lane to have default lane numbers “2”, “0”, “1”, “3”, respectively.
Before the electronic device 110 builds a link with the electronic device 120, the electronic device 110 needs to initiate a link number negotiation and a lane number negotiation to confirm the link number and the lane numbers.
In Step 204, after receiving the link number “N” from the downstream port 112, the control circuit 124 controls the upstream port 122 to transmit the training sequence TS1 having the link number “N” and the lane number “PAD” to the downstream port 112, as shown in
In Step 206, the electronic device 110 starts the lane number negotiation with the electronic device 120. As shown in
In Step 208, after receiving the lane numbers from the downstream port 112, each lane of the upstream port 122 directly sends back the received lane number to the downstream port 112, without considering its default lane number. As shown in
In Step 210, each lane of the downstream port 112 and the upstream port 122 repeatedly transmits a training sequence TS2 having the link number “N” and its lane number as shown in
In addition, because the actual lane number sequence of the upstream port 122 is different from the default lane number sequence, the control circuit 124 needs to use the confirmed lane number sequence, instead of the default lane number sequence, to organize/process data received from the downstream port 112.
In the aforementioned embodiment, because the electronic device 120 has the auto-tuning mechanism of the present invention, the actual lane number of each lane of the upstream port 122 can be determined according to the received lane number, without being limited by the default lane number. Therefore, the PCB routing between the electronic devices 110 and 120 can be flexible.
The electronic device 420 comprises an upstream port 422 and a control circuit 424, wherein the upstream port 422 serves as an interface circuit complied with the PCIe standard, and the upstream port 422 comprises at least a transaction layer, data link layer and physical layer, and a plurality of I/O terminals 426_1-426_4; and the control circuit 424 is arranged to control data transmission and data reception of the upstream port 422. In this embodiment, the control circuit 424 does not have the auto-tuning mechanism of the present invention.
In this embodiment, the electronic device 410 is communicated with the electronic device 420 via four lanes, wherein each lane represents a dual channel for a differential signal pair, and one pair for transmission and one pair for reception. Specifically, the channels between the I/O terminals 416_1 and 426_1 represents a first lane, the channels between the I/O terminals 416_2 and 426_2 represents a second lane, the channels between the I/O terminals 416_3 and 426_3 represents a third lane, and the channels between the I/O terminals 416_4 and 426_4 represents a fourth lane. In this embodiment, the electronic device 410 and the electronic device 420 provides different default lane numbers for each lane, for example, the electronic device 410 sets the first lane, the second lane, the third lane and the fourth lane to have default lane numbers “2”, “0”, “1”, “3”, respectively; and the electronic device 420 sets the first lane, the second lane, the third lane and the fourth lane to have default lane numbers “0”, “1”, “2”, “3”, respectively.
Before the electronic device 110 builds a link with the electronic device 120, the electronic device 110 needs to initiate a link number negotiation and a lane number negotiation to confirm the link number and the lane numbers. The flow of confirming the link and lane numbers can refer to
In
In
In
In
In addition, because the actual lane number sequence of the downstream port 412 is different from the default lane number sequence, the control circuit 414 needs to use the confirmed lane number sequence, instead of the default lane number sequence, to organize/process data received from the upstream port 422.
In the aforementioned embodiment, because the electronic device 410 has the auto-tuning mechanism of the present invention, the actual lane number of each lane of the downstream port 412 can be determined according to the received lane number, without being limited by the default lane number. Therefore, the PCB routing between the electronic devices 410 and 420 can be flexible.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
