The present invention relates to a circuit arrangement for operation of lamps. The invention relates mainly to the operation of low-pressure gas discharge lamps. Except for aspects which relate to the preheating, the invention can also be used for equipment for LEDs.
A circuit arrangement and a method for operation of lamps are known from the document DE 10 2005 007 346 which forms this genus. The circuit arrangement contains a stop device which can prevent the electronic switches in the half-bridge inverter from being switched on, and enables them only during an on-time. The on-time is dependent on a lamp parameter, by which means a control loop can be closed. This circuit has the disadvantage that the start burst for the lamp depends on the tolerances of the load circuit components. Furthermore, problems occur when a lamp inductor which magnetically saturates is used, because the effective resonant frequency is then also shifted.
The object of the present invention is therefore to provide a method for controlling a half-bridge circuit, in which a start burst for the discharge lamp is relatively independent of the tolerances of the load circuit components. It should also be possible to generate the start burst using a lamp inductor which saturates severely relatively magnetically. A further aim is to provide a corresponding half-bridge circuit.
According to the invention, this object is achieved by a circuit arrangement for operation of lamps having the following features:
This advantageously allows stable production of quasi-resonant start bursts with little dependency on tolerances and without special timing for a lamp inductor which is magnetically saturated. Thermal optimization of the overall circuit can also be achieved.
According to one particular embodiment, an active on-time of the switches of the half-bridge circuit is predetermined to be fixed at the operating frequency during an operating phase. There is therefore no need for any regulation of the lamp current or the lamp power during operation.
The preheating frequency is preferably sufficiently high that the active on-time of the switches in the half-bridge circuit in the preheating phase is less than one quarter of the resonant period, while the operating frequency is sufficiently low that the active on-time is greater than one quarter of the resonant period minus a storage time of the half-bridge switches. It is therefore possible to preset a minimum frequency range or time period during which effective preheating and reliable starting are possible.
The defined period during which the frequency is continuously reduced should be between 1 ms and 100 ms. This time is sufficient to ensure reliable starting.
According to a further preferred embodiment, symmetrical starting no-load current limiting is used. This allows the start frequency to be automatically matched to load circuit tolerances and a saturating lamp inductor. In particular, it is advantageous to limit the load circuit current to a temperature-dependent limit value. This makes it possible to also take account of the temperature dependency of the saturation induction of the lamp inductor.
Furthermore, it is advantageous for the half-bridge circuit to have bipolar half-bridge switches with base series capacitors in the control loops. This makes it possible to further reduce the storage time of the bipolar transistors.
The present invention will now be explained in more detail with reference to the attached drawings, in which:
The exemplary embodiment described in more detail in the following text represents one preferred embodiment of the present invention.
As mentioned initially, the aim is to improve the half-bridge circuit such that a defined start burst is always possible, independently of the tolerances of the load circuit components. In this case, it is also always the aim to achieve losses which are as low as possible in order that no cooling measures, or only minor cooling measures, are required.
In the preheating phase, which is typically between 0.4 s and 2 s, the lamp is heated at a preheating frequency fpreheat which is considerably higher than the start frequency fstart. At this preheating frequency fpreheat, the voltage on the lamp is considerably lower than the start voltage Uz.
During operation of the lamp, the voltage on the load circuit capacitor is UCB. Its profile is shown by a dashed line in
After preheating, the lamp can ideally be started by reducing the frequency from the preheating frequency fpreheat to a fixed start frequency fstart. However, tolerances of the load circuit components can result in the profile of the load circuit capacitor voltage changing, such that the start voltage UZ is not reached at the fixed predetermined frequency, or it is unnecessarily high. In this case, the lamp would not start and this would result in an excessively high component load, with an excessively high voltage.
The invention therefore provides for the load circuit frequency to be reduced continuously from the preheating frequency fpreheat through the resonant frequency fres (typically 50 to 60 kHz) to the operating frequency foperation (typically 40 to 50 kHz). In this case, the no-load voltage (the lamp has not yet been started) rises as shown by the arrow P1. It reaches the start voltage UZ at a frequency which is not known in advance or is not defined. The voltage on the load circuit capacitor now falls to the operating voltage UCB, and the load circuit frequency is reduced further until, finally, the operating point AP is reached at the operating frequency foperation, as is indicated by the arrow P2 in
In order to ensure that the lamp is initially effectively preheated, then starts and is finally operated as desired, the preheating frequency fpreheat is chosen such that the active switch-on-time ton-preheat is <¼ Tres, where Tres represents the no-load resonant period. A sequence control unit then increases the active switch-on-time ton-operation to >¼ Tres−ts, as a result of which the frequency falls to the operating frequency foperation. In this case, ts corresponds to the storage time of the collector current when using bipolar transistors. An on-time ton is illustrated in
A half-bridge circuit for implementation of an example of the invention is illustrated in
A diode D9 is connected in the forward-biased direction in parallel with the emitter-collector path through the switch Q1, and a diode D10 is likewise connected in parallel with the emitter-collector path through the switch Q2. These diodes D9 and D10 are used as freewheeling diodes for the switches Q1 and Q2. A capacitor C8 is connected in parallel with the diode D9, and acts as a trapezoidal capacitor.
In addition to the two windings that have already been described, the transformer TR1 has a third winding, via which a stop function is controlled. This third winding is coupled to the AC voltage connections of a full-bridge rectifier, which is formed by the diodes D1, D2, D3 and D4. The DC voltage connections of this rectifier are connected in parallel with an electronic switch V2. The third winding, the rectifier and the switch V2 form a stop device. The switch V2 is a MOSFET transistor, whose source connection is connected to the reference potential VCC_MINUS. As soon as a stop signal, which corresponds to an off state, appears at the gate of the switch V2, the switch V2 short-circuits the third winding of the transformer TR1 via the rectifier. The control inputs of the electronic switches Q1 and Q2 are therefore also short-circuited via the transformer TR1, as a result of which the two switches are switched off.
The switch V2 is controlled by a timer U1. In the example shown in
The supply terminals VCC_PLUS and VCC_MINUS are provided in order to supply power to the circuit U1, and are connected to PIN8 and PIN1 in the circuit.
The series circuit comprising a resistor R1 and a capacitor C1, which is connected between the two supply terminals VCC_PLUS and VCC_MINUS, leads to a time constant which governs the on-time ton. The connecting point between the resistor R1 and the capacitor C1 is connected both to PIN6 and to PIN7 in the circuit U1, in order to preset the appropriate time constant for the timer. PIN4 in the circuit U1 forms a reset input, and must be connected to the positive operating voltage with a high impedance via R2 in order to ensure the desired functionality of the circuit U1.
PIN2 in the circuit U1 forms a trigger input and is initially connected via a resistor R25 to the positive supply terminal VCC_PLUS. A negative pulse is required at PIN2 in order to initiate the timer. This negative pulse is produced by a comparator U3-A which, for example, may be formed by the component LM293. The trigger pulse is supplied directly to PIN2 in the circuit U1. The inverting input of the comparator U3-A is connected to VCC_PLUS via a resistor R28, and to VCC_MINUS via a resistor R29.
The non-inverting input of the comparator U3-A is fed from the DC voltage output of a full-bridge rectifier GL1. The secondary winding of a current transformer or transformer TR3 is connected to the AC voltage input of this full-bridge rectifier GL1. The primary winding of the transformer TR3 is connected between the load circuit and the terminal Il1 (cf. also
Furthermore, the DC voltage output of the full-bridge rectifier Gl1 is terminated with a low impedance by a series circuit comprising the resistors R30 and R31. A voltage which is proportional to the rectified load current is therefore applied to the non-inverting input of the comparator U3-A. At the load current zero crossing, the voltage at the inverting input of the comparator U3-A is briefly higher than the voltage at the non-inverting input. This results in a negative trigger pulse as the comparator signal. The components U3-A, R28, R29,
R30, R31, GL and TR3 therefore form a trigger device based on current zero-crossing detection. As soon as a load current zero crossing occurs, the timer is triggered and switches the transistor V2 off for the on-time, thus allowing the switches Q1 and Q2 to be operated.
In order to reset the timer, the output signal from a further comparator U3-B is applied to PIN4 of the circuit U1. Its inverting input is connected between the resistors R30 and R31. The non-inverting input is connected between a series circuit comprising resistors R26 and R27, which is itself connected between the supply terminals VCC_PLUS and VCC_MINUS. The timer is reset, and the respective half-bridge switch is therefore actively switched off, when the rectified load current exceeds a certain value.
The duration of the preheating time (typically 0.4 to 2 s) and the duration of the transient time from the preheating frequency fpreheat to the operating frequency foperation (preferably 1 ms to 100 ms in order charge carriers can build up in the lamp for starting) are set via PIN5 in the circuit U1. The switching time from the preheating phase to the operating phase is governed by an RC element comprising a series circuit of a resistor R24 with a capacitor C2. The capacitor C2 is connected between PIN5 and the negative supply terminal VCC_MINUS. In contrast, the duration of the preheating time is governed by the RC series circuit R23, C3 which is connected between the two supply terminals VCC_MINUS and VCC_PLUS. A node N2 between the two components R23 and C3 is connected to the input of the inverter U2-B, and a diode D6 is connected to the resistor R24 and therefore to PIN5 in the circuit U1. The diode D6 dynamically connects the resistor R24 in parallel with C2 only during the preheating phase, in order to ensure the desired timing.
The half-bridge circuit illustrated in
f
L
=R27/(R26+R27)*(VCC-PLUS-VCC-MINUS)*w1TR3/(w2TR3*R31),ps
where w1TR3 and w2TR3 represent the number of turns on the transformer TR3.
The comparator can be formed from a current mirror in the trigger circuit of the timer. This is also known by the expression “emitter-controlled differential comparator”.
As mentioned, one aim is to operate the lamp with losses that are as low as possible. This also includes achievement of switching with losses that are as low as possible. This can be done in inductive operation of the lamp. For this purpose, the voltage is reduced to zero, and the current is switched in this state. At the same time, the current should be as low as possible during switching. The respective bipolar transistor Q1, Q2 is therefore switched on at the current zero crossing, as is indicated by the base current IB in
In order to shorten this storage time, a base series capacitor C29 is, as mentioned, connected to the base of the bipolar transistor Q1, and a base series capacitor C30 is connected to the base of the bipolar transistor Q2. In consequence, the base current rises more rapidly after switching on, as is indicated by the dashed-dotted line IB′ in
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/EP07/50576 | 1/22/2007 | WO | 00 | 7/22/2009 |