Patent Application
20230169911
The application claims the benefit of Chinese Patent Application No. 202111435843.0 filed on Nov. 29, 2021 in the China National Intellectual Property Administration, the disclosure of which is incorporated herein by reference in its entirety.
The present application relates to the technical field of display, and in particular to a method for controlling an offset voltage in a display device, a display device and a storage medium.
At present, the picture quality of the screen display is highly related to the offset voltage of the operational amplifier. The size of the transistor in the operational amplifier can affect the size of the offset voltage of the operational amplifier. For example, the offset voltage of the operational amplifier can be reduced by increasing the size of the transistor.
In the prior art, the operational amplifier in the display device adopts a large-size transistor to reduce the offset voltage of the operational amplifier; however, the large-size transistor will increase the size of the whole operational amplifier, so that both the size of the source driver and the size of the display device are increased.
Therefore, how to provide a control method which can eliminate the offset voltage of the operational amplifier without using large-size transistors is a problem to be solved by those skilled in the art.
In a first aspect, an embodiment of the present application provides a method for controlling an offset voltage in a display device, including:
In a second aspect, an embodiment of the present application provides a display device, including a source driver and a display panel;
In a third aspect, an embodiment of the present application provides a non-transitory computer-readable storage medium having computer programs stored thereon that are executed by a computer to implement the method for controlling an offset voltage in a display device provided in the first aspect.
Additional aspects and advantages of the present application will be partially appreciated and become apparent from the following description, or will be well learned from the practices of the present application.
The above and/or additional aspects and advantageous of the present application will become apparent and be more readily appreciated from the following description of embodiments with reference to the accompanying drawings, in which:
The present application will be described in detail below, and the examples in the embodiments the present application are illustrated in the accompanying drawings throughout which the same or similar reference numerals refer to the same or similar components or components having the same or similar functions. In addition, if the detailed description of the well-known technologies is unnecessary for the illustrated features of the present application, it will be omitted. The embodiments to be described below with reference to the accompanying drawings are exemplary, and are only used for explaining the present application, rather than being construed as limiting the present application.
It should be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present application belongs. It should be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meanings in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
It should be understood by those skilled in the art that singular forms “a”, “an”, “the” and “said” used herein may include plural forms as well, unless otherwise stated. It should be further understood that the terms “comprise/comprising” used in the specification of the present application specify the presence of the stated features, integers, steps, operations, elements and/or components, but is not exclusive of the presence or addition of one or more other features, integers, steps, operations, elements, components and/or combinations thereof. It should be understood that, when an element is referred to as being “connected to” or “coupled to” another element, this element can be directly connected or coupled to other elements or provided with intervening elements therebetween. In addition, “connection” or “coupling” as used herein may include wireless connection or coupling. As used herein, the term “and/or” includes all or any of one or more associated listed items or all combinations thereof.
The inventor of the present application has found through researches that, in addition to using large-size transistors to reduce the offset voltage of the operational amplifier, the offset voltage of the operational amplifier may also be compensated by a chopper method, so that the equivalent offset voltage can be further reduced without additionally increasing the size of transistors. However, if the chopper method is employed in the source driving integrated circuit (IC) of the display device, it is required that the display device can correspondingly provide more line signals and frames, e.g., TP (data output control signals), GSP (frame start signals), etc.
At present, in some interface systems, line signals and frame signals cannot be simultaneously provided for the source driving IC for use. For example, a mini low voltage differential signal (i.e., mini-LVDS, mLVDS) interfaces can only provide two signals, i.e., POL (polarity inversion control signal) and TP (data output control signal). So, in the line inversion system, that is, when the pixel driving mode is line inversion driving, the frame signal cannot be extracted. Therefore, in the absence of the frame signal, the offset voltage cannot be completely compensated by the chopper operation, resulting in noise on the screen.
The method for controlling an offset voltage in a display device, the display device and the storage medium provided by the present application are intended to solve the above technical problems in the prior art.
The technical solutions of the present application and how to solve the above technical problems by the technical solutions of the present application will be described below in detail by specific embodiments. The following specific embodiments may be combined with each other, and the same or similar concepts or processes will not be repeated in some embodiments. The embodiments of the present application will be described below with reference to the accompanying drawings.
An embodiment of the present application provides a method for controlling an offset voltage in a display device, which is applied to a display device. The display device may be a mobile phone, a tablet computer, a TV set, a display, a notebook computer, a digital photo frame, a navigator or any other products or components with a display function. As shown in
At S1, a chopper signal is generated based on at least one of a data output control signal and a polarity inversion control signal.
At S2, the polarity of an offset voltage of an operational amplifier in the display device is controlled according to the chopper signal, so that the offset voltage is equivalently eliminated within at least one of a design space range and a design time range.
In the method for controlling an offset voltage in a display device provided in the embodiment of the present application, the polarity of the offset voltage of the operational amplifier in the display device is controlled by using the chopper signal generated based on at least one of the data output control signal and the polarity inversion control signal, so that the offset voltage can be equivalently eliminated within at least one of the design space range and the design time range, without using large-size transistors and providing more signals. Accordingly, the display effect can be ensured, and the size of the chip can also be reduced. Thus, the source driver in the display device can be suitable for various interfaces, e.g., mLVDS interfaces.
In some embodiments, the generating a chopper signal based on at least one of a data output control signal and a polarity inversion control signal includes:
The control method provided in this embodiment can adapt to different pixel driving modes (e.g., frame inversion driving or line inversion driving), and can equivalently eliminate the offset voltage within at least one of the design space scope and the design time scope in different pixel driving modes, thereby ensuring the display effect.
Optionally, the first potential may be a high potential or a low potential; and correspondingly, the second potential may be a low potential or a high potential. For example, the first potential may be a digital potential of 1; and correspondingly, the second potential may be a digital potential of 0. Of course, the first potential may also be 0.8 or 0.7; and correspondingly, the second potential may also be 0.2 or 0.1. This will not be specifically limited in the present application.
Optionally, when the pixel driving mode signal is the first potential, the pixel driving mode is frame inversion driving; and, when the pixel driving mode signal is the second potential, the pixel driving mode is line inversion driving.
In some embodiments, the generating a chopper signal based on at least one of a data output control signal and a polarity inversion control signal further includes:
determining the frequency of the polarity inversion control signal based on the data output control signal and the polarity inversion control signal.
In accordance with this embodiment of the present application, the frequency of the polarity inversion control signal can be determined. When the pixel driving mode signal is frame inversion driving, the frequency of the polarity inversion control signal can be used as GSP (frame start signal), so that the frame-to-frame frequency is obtained, and chopper control is realized according to the frame-to-frame frequency. Accordingly, the offset voltage in the display device is equivalently eliminated within at least one of the design space range and the design time range, and the display effect is ensured.
In some embodiments, when the pixel driving mode signal is the first potential, the polarity of the offset voltage of the operational amplifier in the display device is controlled based on a frame chopper signal triggered to be generated by the polarity inversion control signal, and the polarity of the offset voltage of the operational amplifier in the display device is controlled based on a line chopper signal triggered to be generated by the data output control signal.
When the pixel driving mode signal is the second potential, the polarity of the offset voltage of the operational amplifier in the display device is controlled based on a line chopper signal triggered to be generated by the polarity inversion control signal.
When the pixel driving mode signal is the first potential, the pixel driving mode is frame inversion driving. By controlling the polarity of the offset voltage of the operational amplifier in the display device according to the frame chopper signal triggered to be generated by the polarity inversion control signal, the offset voltage is equivalently eliminated within the design time range. By controlling the polarity of the offset voltage of the operational amplifier in the display device according to the line chopper signal triggered to be generated by the data output control signal, the offset voltage is equivalently eliminated within the design space range.
Optionally, the equivalent elimination of the offset voltage within the design time range and the equivalent elimination of the offset voltage within the design space range may be performed simultaneously to further ensure the display effect.
When the pixel driving mode signal is the second potential, the pixel driving mode is line inversion driving. By controlling the polarity of the offset voltage of the operational amplifier in the display device according to the line chopper signal triggered to be generated by the polarity inversion control signal, the offset voltage is equivalently eliminated within both the design time range and the design time range, thereby ensuring the display effect.
In some embodiments, the controlling, based on a frame chopper signal triggered to be generated by the polarity inversion control signal, the polarity of the offset voltage of the operational amplifier in the display device when the pixel driving mode signal is the first potential includes:
when the pixel driving mode signal is the first potential, controlling, based on the frame chopper signal triggered to be generated by the polarity inversion control signal and according to the frequency of the polarity inversion control signal, the polarity of the offset voltage of the operational amplifier in the display device, so that the polarity of the offset voltage of the operational amplifier is opposite when data signals of pixels at the same position in different frames have the same polarity.
When the pixel driving mode signal is the first potential, the pixel driving mode is frame inversion driving. In the frame inversion driving system, if the polarity inversion control signal POL may be used as GSP (frame start signal), the frequency of the polarity inversion control signal is the frequency of the GSP (frame start signal), i.e., the frame frequency. The frame frequency, also known as frame rate, is the frequency (rate) at which the bitmap image continuously appears on the display in unit of frames and is represented by Hertz (Hz).
In this embodiment, when the pixel driving mode is frame inversion driving, the polarity of the offset voltage of the operational amplifier in the display device is controlled by using the polarity inversion control signal as the GSP (frame start signal) and the frequency of the polarity inversion control signal as the frame frequency. Thus, without using large-size transistors and providing more signals, the offset voltage in the display device is equivalently eliminated, and the display effect is ensured.
In some embodiments, the controlling, based on a frame chopper signal triggered to be generated by the polarity inversion control signal, the polarity of the offset voltage of the operational amplifier in the display device when the pixel driving mode signal is the first potential includes:
when the pixel driving mode signal is the first potential, changing, based on the frame chopper signal triggered to be generated by the polarity inversion control signal and according to the frequency of the polarity inversion control signal, the polarity of the offset voltage of the operational amplifier in the display device in unit of two frames.
As shown in
In
In
With reference to
It can be seen from
Of course, in some other embodiments, when the pixel driving mode signal is the first potential, that is, when the pixel driving mode is frame inversion driving, the polarity of the offset voltage of the operational amplifier in the display device is changed in unit of another number of frames (e.g., one frame, three frames, four frames, five frames, six frames, etc.) based on the frame chopper signal triggered to be generated by the polarity inversion control signal and according to the frame-to-frame frequency, as long as the polarity of the offset voltage of the operational amplifier is opposite when the data signals of pixels at the same position in different frames have the same polarity. This will not be limited in the present application.
In some embodiments, the controlling, based on a line chopper signal triggered to be generated by the data output control signal, the polarity of the offset voltage of the operational amplifier in the display device when the pixel driving mode signal is the first potential includes:
when the pixel driving mode signal is the first potential, controlling, based on the line chopper signal triggered to be generated by the data output control signal, the polarity of the offset voltage of the operational amplifier in the display device, so that the polarity of the offset voltage of the operational amplifier is opposite when the data signals of pixels in different rows in the same frame have the same polarity.
In this embodiment, when the pixel driving mode is frame inversion driving, the polarity of the offset voltage of the operational amplifier in the display device is controlled according to the line chopper signal triggered to be generated by the data output control signal. Thus, without using large-size transistors and providing more signals, the offset voltage in the display device is equivalently eliminated, and the display effect is ensured.
In some embodiments, the controlling, based on a line chopper signal triggered to be generated by the data output control signal, the polarity of the offset voltage of the operational amplifier in the display device when the pixel driving mode signal is the first potential includes:
when the pixel driving mode signal is the first potential, changing, based on the line chopper signal triggered to be generated by the data output control signal, the polarity of the offset voltage of the operational amplifier in the display device in unit of two rows.
As shown in
In
With reference to
It can be seen from
Of course, in some other embodiments, when the pixel driving mode signal is the first potential, that is, when the pixel driving mode is frame inversion driving, the polarity of the offset voltage of the operational amplifier in the display device is changed in unit of another number of rows (e.g., one row, three rows, four rows, five rows, six rows, etc.) based on the line chopper signal triggered to be generated by the data output control signal, as long as the polarity of the offset voltage of the operational amplifier is opposite when the data signals of pixels in different rows in the same frame have the same polarity. This will not be limited in the present application.
In some embodiments, when the pixel driving mode signal is the second potential, the polarity of the offset voltage of the operational amplifier in the display device is controlled based on the line chopper signal triggered to be generated by the polarity inversion control signal, so that the polarity of the offset voltage of the operational amplifier is opposite when the data signals of pixels at the same position in different frames have the same polarity, and the polarity of the offset voltage of the operational amplifier is opposite when the data signals of pixels in different rows in the same frame have the same polarity.
As shown in
As shown in
In
In
It can be seen from
Meanwhile, with reference to
In this embodiment, when the pixel driving mode is line inversion driving, the polarity of the offset voltage of the operational amplifier in the display device is controlled according to the line chopper signal triggered to be generated by the polarity inversion control signal, without using large-size transistors and providing more signals. By chopper control, the offset voltage is equivalently eliminated within both the design time range and the design space range, that is, the offset voltage is balanced in both the design time range and the design space range. Accordingly, the temporal and spatial balancing effects can be achieved, the display effect can be ensured, and the size of the chip can be reduced.
In some embodiments, the controlling, based on a line chopper signal triggered to be generated by the polarity inversion control signal, the polarity of the offset voltage of the operational amplifier in the display device when the pixel driving mode signal is the second potential includes:
in a line inversion system, changing, based on a line chopper signal triggered to be generated by a rising edge of the polarity inversion control signal, the polarity of the offset voltage of the operational amplifier in the display device.
With reference to
It can be seen from
In this embodiment, the polarity of the offset voltage of the operational amplifier in the display device can be changed based on only the line chopper signal triggered to be generated by the rising edge of the polarity inversion control signal POL, so that the offset voltage can be balanced in both the design time range and the design space range, without using large-size transistors and providing more signals. Accordingly, the temporal and spatial balancing effects can be achieved, the display effect can be ensured, and the size of the chip can be reduced.
Based on the same inventive concept, as shown in
The source driver 100 includes an output buffer unit 10, which is electrically connected to the display panel 400.
The output buffer unit 10 includes a control unit 1 and an operational amplifier 2. The control unit 1 is electrically connected to the operational amplifier 2, and the control unit 1 is configured to execute the method for controlling an offset voltage in a display device provided in any one of the above embodiments.
Optionally, the output buffer unit 10 includes a plurality of operational amplifiers 2 (not shown) to output data signals.
In the display device provided in this embodiment of the present application, by proving the control unit 1, the polarity of the offset voltage of the operational amplifier 2 in the display device is controlled by using the chopper signal generated based on at least one of the data output control signal and the polarity inversion control signal, so that the offset voltage can be equivalently eliminated within at least one of the design space range and the design time range, without using large-size transistors and providing more signals. Accordingly, the display effect can be ensured, and the cost can also be reduced. Thus, the source driver 100 in the display device can be suitable for various interfaces, e.g., mLVDS interfaces.
Optionally, as shown in
The timing sequence controller 200 is configured to output a display signal and a source control signal to the source driver 100 and output a gate control signal to the gate driver 300.
The source control signal includes a data output control signal TP and a polarity inversion control signal POL.
The source driver 100 receives the display signal and the source control signal output from the timing sequence controller 200, and outputs a data signal corresponding to the display signal to the display panel 400 through a plurality of data lines. The display signal includes RGB data, and the data signal includes a gray-scale voltage signal.
In some embodiments, as shown in
The determination unit 11 is configured to determine, based on the data output control signal and the polarity inversion control signal, a pixel driving mode signal in the display device, the pixel driving mode signal including a first potential and a second potential.
The logic unit 12 is electrically connected to the determination unit 11 and the operational amplifier and configured to: generate a chopper signal based on the pixel driving mode signal and at least one of the data output control signal and the polarity inversion control signal; and, control, according to the chopper signal, the polarity of the offset voltage of the operational amplifier in the display device, so that the offset voltage is equivalently eliminated within at least one of a design space range and a design time range.
Optionally, the determination unit 11 is further configured to determine the frequency of the polarity inversion control signal based on the data output control signal and the polarity inversion control signal.
Optionally, the determination unit 11 determines the pixel driving mode signal based on the data output control signal and the polarity inversion control signal and according to the result of determination whether it is single-line inversion driving, two-line inversion driving or four-line inversion driving.
Optionally, when the pixel driving mode signal is the first potential, the pixel driving mode is frame inversion driving; and, when the pixel driving mode signal is the second potential, the pixel driving mode is line inversion driving.
Optionally, the first potential may be a high potential or a low potential; and correspondingly, the second potential may be a low potential or a high potential. For example, the first potential may be a digital potential of 1; and correspondingly, the second potential may be a digital potential of 0. Of course, the first potential may also be 0.8 or 0.7; and correspondingly, the second potential may also be 0.2 or 0.1. This will not be specifically limited in the present application.
In this embodiment of the present application, by providing the determination unit 11 and the logic unit 12, different pixel driving modes (e.g., frame inversion driving or line inversion driving) are adapted, and different methods are adopted in different pixel driving modes to control the polarity of the offset voltage of the operational amplifier 2 in the display device, so that the offset voltage is equivalently eliminated within at least one of the design space range and the design time range, and the display effect is ensured.
In some embodiments, as shown in
The logic unit 12 includes a selector 121, a first trigger 122 and a second trigger 123.
The selector 121 is electrically connected to the determination unit 11 and configured to receive the data output control signal and the polarity inversion control signal and selectively output the data output control signal or the polarity inversion control signal based on the pixel driving mode signal.
The first trigger 122 is electrically connected to the selector 121 and configured to trigger to generate a line chopper signal based on the data output control signal or polarity inversion control signal output by the selector.
The second trigger 123 is electrically connected to the determination unit 11 and configured to receive the polarity inversion control signal and trigger to generate a frame chopper signal based on the pixel driving mode signal.
In one example, as shown in
Specifically, in
In
Both the trigger T1 and the trigger T2 are D triggers.
The selector M1 is electrically connected to the block terminal CLK of the trigger T1.
The reverse output terminal Q of the trigger T1 is electrically connected to the input terminal D, and the output terminal Q of the trigger T1 is configured to output the line chopper signal LINE_CHOP.
The reverse output terminal Q of the trigger T2 is electrically connected to the input terminal D, and the output terminal Q of the trigger T2 is configured to output the frame chopper signal FRAME_CHOP.
As shown in
When the pixel driving mode is frame inversion driving, the frequency of the polarity inversion control signal POL is determined by the POL sensing block U1, the frequency of the polarity inversion control signal POL is used as the frame-to-frame frequency, and the polarity of the offset voltage of the operational amplifier 2 in the display device is controlled based on the frame chopper signal FRAME_CHOP triggered to be generated by the polarity inversion control signal POL and according to the frame-to-frame frequency, so that the polarity of the offset voltage of the operational amplifier 2 is opposite when the data signals of pixels at the same position in different frames have the same polarity. Thus, the offset voltage is equivalently eliminated within the design time range, the temporal balancing effect is realized, and the display effect is ensured.
When the pixel driving mode is frame inversion driving, the polarity of the offset voltage of the operational amplifier 2 in the display device is controlled based on the line chopper signal LINE_CHOP triggered to be generated by the data output control signal TP, so that the polarity of the offset voltage of the operational amplifier 2 is opposite when the data signals of pixels in different rows in the same frame have the same polarity. Thus, the offset voltage is equivalently eliminated within the design space range, the spatial balancing effect is realized, and the display effect is ensured.
As shown in
When the pixel driving mode is line inversion driving, the polarity of the offset voltage of the operational amplifier 2 in the display device is controlled based on the line chopper signal LINE_CHOP (for example, the LINE_CHOP is the P signal in
The display device provided in this embodiment of the present application can adapt to different pixel driving modes (e.g., frame inversion driving or line inversion driving), and different chopper control methods are adopted in different pixel driving modes to control the polarity of the offset voltage of the operational amplifier 2 in the display device. Thus, without using large-size transistors and proving more signals, the offset voltage can be equivalently eliminated within at least one of the design space range and the design time range, and the display effect is ensured.
Based on the same inventive concept, an embodiment of the present application provides a computer-readable storage medium having computer programs stored thereon that are executed by a computer to implement the method for controlling an offset voltage in a display device provided in any one of the above embodiments.
The computer-readable storage medium provided in this embodiment of the present application has the same inventive concept and the same beneficial effects as the above embodiments, and the content not detailed in the computer-readable storage medium can refer to the above embodiments and will not be repeated here.
The computer-readable medium of the present application may be a computer-readable signal medium, a computer-readable storage medium or any combination of the both. For example, the computer-readable storage medium may be, but not be limited to: electrical, magnetic, optical, electromagnetic, infrared or semiconductor systems, apparatuses or devices, or any combination thereof. More specific examples of the computer-readable storage medium may include, but not limited to: electrical connections having one or more leads, portable computer disks, hard disks, random access memories (RAMs), read only memories (ROMs), erasable programmable read only memories (EPROMs), optical fibers, portable compact disc read only memories (CD-ROMs), optical storage devices, magnetic storage devices or any suitable combinations thereof.
In the present application, the computer-readable storage medium may be any tangible medium containing or storing computer programs. The compute programs may be used by or with an instruction execution system, apparatus or device. In the present application, the computer-readable signal medium may include data signals propagated in basebands or as part of carriers, in which computer-readable computer program codes are carried. The propagated data signals may be in various forms, including but not limited to electromagnetic signals, optical signals or any suitable combination thereof. The computer-readable signal medium may also be any computer-readable medium except for computer-readable storage mediums. The computer-readable signal medium may send, propagate or transmit computer programs for use by or with an instruction execution system, apparatus or device. The computer program codes contained in the computer-readable medium may be transmitted by any suitable medium, including but not limited to: wires, optical cables, RF, or any suitable combination thereof.
By applying the embodiments of the present application, at least the following beneficial effects can be achieved.
(1) In the method for controlling an offset voltage in a display device and the display device provided in the embodiments of the present application, the polarity of the offset voltage of the operational amplifier in the display device is controlled by using the chopper signal generated based on at least one of the data output control signal and the polarity inversion control signal, so that the offset voltage can be equivalently eliminated within at least one of the design space range and the design time range, without using large-size transistors and providing more signals. Accordingly, the display effect can be ensured, and the size of the chip can also be reduced. Thus, the source driver in the display device can be suitable for various interfaces, e.g., mLVDS interfaces.
(2) The control method and the display device provided in the embodiments of the present application can adapt to different pixel driving modes (e.g., frame inversion driving or line inversion driving), and different chopper control methods are adopted in different pixel driving modes to control the polarity of the offset voltage of the operational amplifier 2 in the display device. Thus, without using large-size transistors and proving more signals, the offset voltage can be equivalently eliminated within at least one of the design space range and the design time range, and the display effect is ensured.
It should be understood by those skilled in the art that the steps, measures and solutions in the operations, methods and flows already discussed in the present application can be alternated, changed, combined or deleted. Further, other steps, measures and solutions in the operations, methods and flows already discussed in the present application can also be alternated, changed, rearranged, decomposed, combined or deleted. Further, the steps, measures and solutions of the prior art in the operations, methods and operations disclosed in the present application can also be alternated, changed, rearranged, decomposed, combined or deleted.
The terms “first” and “second” are merely for illustrative purpose, and should not be interpreted as indicating or implying the relative importance or implicitly indicating the number of the specified technical features. Therefore, the features defined by the terms “first” and “second” can explicitly or implicitly include one or more features. Unless otherwise stated, in the description of the present invention, “a plurality of” means two or more.
It should be understood that, although the steps in the flowcharts in the accompanying drawings are shown sequentially as indicated by arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless otherwise clearly stated herein, the execution of these steps is not limited to a strict order and these steps may be executed in other orders. Furthermore, at least some of the steps in the flowcharts of the accompanying drawings may include a plurality of sub-steps or a plurality of sub-stages. These sub-steps or sub-stages may be executed at different moments rather than at a same moment.
These sub-steps or sub-stages are not necessarily executed sequentially, and instead, they may be executed in turn or alternately with other steps or with at least some of sub-steps or sub-stages of other steps.
The foregoing description merely shows some implementations of the present application. It should be pointed out that, to those skilled in the art, various improvements and modifications can be made without departing from the principle of the present application, and these improvements and modifications shall be deemed as falling into the protection scope of the present application.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202111435843.0 | Nov 2021 | CN | national |
