Patent Application
20240259331
The present disclosure claims priority to Chinese application Ser. No. 202310104331.9 filed on Jan. 30, 2023, and entitled “METHOD AND APPARATUS FOR CROSS-CARD LINK AGGREGATION OF VIRTUAL FUNCTION PORTS OF DPUs, DEVICE, AND MEDIUM,” all of which is incorporated herein by reference in its entirety.
The present disclosure relates to the technical field of computers, and particularly relates to a method and an apparatus for cross-card link aggregation of virtual function ports of DPUs, a device, and a medium.
A Data Processing Unit (DPU) is a new generation of a data-centered, I/O intensive computing chip, which supports infrastructure resource layer virtualization using a software-defined technical route, and functions to improve computing system efficiency, reduce total ownership costs of the whole system, improve data processing efficiency, and reduce performance losses of other computing chips.
At present, DPU cards divide a physical port (a MAC port) into several virtual function ports (Virtual Functions, VFs) for use by a virtual machine (VM) running on a host. Each of the VFs has a corresponding virtual function port representor (Virtual Function representor, VF rep), forming a combination of (VF, VF rep), where the VF rep is configured to transmit a message to a virtual switch (Open vSwitch OVS). The MAC port also has a corresponding uplink, forming a combination of (MAC, uplink), where the uplink is also configured to transmit a message to the OVS. The OVS processes and distributes messages passing through the OVS.
In existing technologies, there is only one DPU card, and VFs in each VM belongs to one DPU card. The traffic of all VFs needs to pass through the DPU card, thus resulting in a problem of single point of failure. Once the DPU card has hardware failure, network interruption will be caused, thus failing to ensure high availability.
In order to solve the above technical problems, the present disclosure provides a method for cross-card link aggregation of virtual function ports of DPUs, a device, and a medium, thereby avoiding a problem of network interruption caused by single point of failure, and ensuring high availability.
One or more embodiments of the present disclosure provide a method for cross-card link aggregation of virtual function ports of DPUs, each of which is communicatively connected to a virtual machine and a switch respectively, the method including:
In some embodiments, the performing link negotiation for the virtual machine and the switch respectively includes:
In some embodiments, the providing the first response protocol message to the virtual machine, and providing the second response protocol message to the switch includes:
In some embodiments, the to-be-communicated data message includes at least one of:
In some embodiments, the acquiring the to-be-communicated data message includes:
In some embodiments, the determining the communication link for the to-be-communicated data message includes:
In some embodiments, the performing communication for the to-be-communicated data message based on the communication link includes:
One or more embodiments of the present disclosure provide an apparatus for cross-card link aggregation of virtual function ports of DPUs, each of which is communicatively connected to a virtual machine and a switch respectively. The apparatus includes:
One or more embodiments of the present disclosure provide an electronic device, including: a memory, a processor, and a computer program. The computer program is stored in the memory, and is configured to be executed by the processor to implement the method in the first aspect.
One or more embodiments of the present disclosure provide a computer-readable storage medium storing a computer program thereon, where the computer program is executed by a processor to implement the method in the first aspect.
One or more embodiments of the present disclosure further provide a computer program product including a computer program or instruction, where the computer program or instruction, when executed by a processor, implements the method in the first aspect.
The method and the apparatus for cross-card link aggregation of virtual function ports of DPUs, the device, and the medium provided in embodiments of the present disclosure provide a plurality of data processing units, each of which is communicatively connected to a virtual machine and a switch respectively, perform link negotiation for the virtual machine and the switch respectively, acquire a to-be-communicated data message, which includes a destination identifier, a source identifier, and a message type, determine a communication link for the to-be-communicated data message, where the communication link is a message channel between a virtual function port in the virtual machine, a virtual function port representor corresponding to the virtual function port in the virtual machine, an uplink corresponding to a physical port in the data processing unit, the physical port in the data processing unit, and the switch, and perform communication for the to-be-communicated data message based on the communication link. Because the plurality of data processing units is provided, and each of the data processing units is communicatively connected to the virtual machine and the switch respectively, the message can be communicated through a plurality of communication links, thereby avoiding a problem of network interruption caused by single point of failure, and ensuring high availability.
The drawings here are incorporated into the description, form a part of the description, show embodiments in accordance with the present disclosure, and are used together with the description to explain the principles of the present disclosure.
To more clearly describe technical solutions of embodiments of the present disclosure or existing technologies, drawings to be used in the description of the embodiments or the existing technologies will be briefly introduced below. Apparently, for those of ordinary skills in the art, other drawings may also be obtained based on these drawings without making creative work.
In order to make the above objectives, features, and advantages of the present disclosure clearer, solutions of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features in the embodiments may be combined with each other on a non-conflict basis.
Many specific details are elaborated in the description below to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; and obviously, the embodiments in the description are only a part of embodiments, rather than all embodiments, of the present disclosure.
A data processing unit is a new generation of a data-centered, I/O intensive computing chip, which supports infrastructure resource layer virtualization using a software-defined technical route, and functions to improve computing system efficiency, reduce total ownership costs of the whole system, improve data processing efficiency, and reduce performance losses of other computing chips.
At present, DPU cards divide a physical port (MAC port) into several virtual function ports (Virtual Functions, VFs) for use by a virtual machine (VM) running on a host. Each of the VFs has a corresponding virtual function port representor (Virtual Function representor, VF rep), forming a combination of (VF, VF rep), where the VF rep is configured to transmit a message to a virtual switch (Open vSwitch, OVS). The MAC port also has a corresponding uplink, forming a combination of (MAC, uplink), where the uplink is also configured to transmit a message to the OVS. The OVS processes and distributes messages passing through the OVS.
In existing technologies, there is only one DPU card, and VFs in each VM belongs to one DPU card. The traffic of all VFs needs to pass through the DPU card, thus resulting in a problem of single point of failure. Once the DPU card has hardware failure, network interruption will be caused, thus failing to ensure high availability. In response to this problem, an embodiment of the present disclosure provides a method for cross-card link aggregation of virtual function ports of DPUs. The method will be introduced below with reference to specific embodiments.
The method for cross-card link aggregation of virtual function ports of DPUs shown in
In some optional embodiments, an electronic device is provided with at least two data processing units, each of which is communicatively connected to a virtual machine and a switch respectively. An upper VF of two DPU cards is directly connected to a VM, a logical (bond) port is formed inside the VM, and the physical ports links in the two DPU cards are aggregated to jointly transceive network traffic. In this step, as shown in
Link Aggregation means that a plurality of network interfaces is aggregated, thus forming a logical port (bond port), to achieve load balancing of outcoming/incoming traffic throughput at each member port. When a link failure is detected at one of the member ports, messages are stopped from being transmitted at this port, and a transmitting port for the messages is recomputed from the remaining links based on a load balancing strategy. After the faulty port is restored, the port serves as a transceiving port again. The link aggregation can increase link bandwidth, link redundancy, and the like.
The electronic device acquires the to-be-communicated data message, which includes the destination identifier, the source identifier, and the message type. The to-be-communicated data message may be transmitted from the switch to the virtual machine; or may be transmitted from the virtual machine to the switch. The to-be-communicated data message includes the destination identifier, the source identifier, and the message type. The message type includes a negotiation message, a data message, etc. The source identifier represents an identifier of a transmitting terminal of the to-be-communicated data message, while the destination identifier represents an identifier of a receiving terminal of the to-be-communicated data message.
Because the electronic device is provided with at least two data processing units, each of which is communicatively connected to a virtual machine and a switch respectively, routes for transceiving messages from a plurality of VFs in the VM belong to different DPU cards, and form a plurality of links. In the present embodiment, the electronic device determines the communication link for the to-be-communicated data message. The communication link is a message channel between a virtual function port in the virtual machine, a virtual function port representor corresponding to the virtual function port in the virtual machine, an uplink corresponding to a physical port in the data processing unit, the physical port in the data processing unit, and the switch. As shown in
In the present embodiment, the electronic device performs communication for the to-be-communicated data message based on the communication link. Because the electronic device is provided with at least two data processing units, each of which is communicatively connected to a virtual machine and a switch respectively, routes for transceiving messages from a plurality of VFs in the VM belong to different DPU cards, and form a plurality of links. The message can be communicated through a plurality of communication links, thus solving the problem of single point of failure in existing technologies.
In some embodiments, a user can perform load balancing configuration on the virtual function ports in the virtual machine, so that the virtual machine balances loads to be transmitted through the plurality of VFs based on the load balancing configuration. In some embodiments, the user can perform configuration on traffic of the virtual function ports on the virtual machine, so that the virtual machine balances traffic to be transmitted through the plurality of VFs based on the traffic configuration.
In some embodiments, the user can perform load balancing configuration on the network interfaces on the switch, so that the switch balance loads to be transmitted through the plurality of VFs based on the load balancing configuration. In some embodiments, the user can perform configuration on traffic of the network interfaces on the switch, so that the switch balances traffic to be transmitted through the plurality of VFs based on the traffic configuration.
In embodiments of the present disclosure, a plurality of data processing units is provided, each of the data processing units is communicatively connected to a virtual machine and a switch respectively, link negotiation is performed for the virtual machine and the switch respectively, a to-be-communicated data message is acquired, the to-be-communicated data message includes a destination identifier, a source identifier, and a message type, a communication link for the to-be-communicated data message is determined, where the communication link is a message channel between a virtual function port in the virtual machine, a virtual function port representor corresponding to the virtual function port in the virtual machine, an uplink corresponding to a physical port in the data processing unit, the physical port in the data processing unit, and the switch, and communication is performed for the to-be-communicated data message based on the communication link. Because the plurality of data processing units is provided, and each of the data processing units is communicatively connected to the virtual machine and the switch respectively, the message can be communicated through a plurality of communication links, thereby avoiding a problem of network interruption caused by single point of failure, and ensuring high availability.
An electronic device acquires the first negotiation message transmitted from the virtual machine and the second negotiation message transmitted from the switch. As shown in
After acquiring the first negotiation message transmitted from the virtual machine and the second negotiation message transmitted from the switch, the electronic device forwards the first negotiation message and the second negotiation message to the link aggregation controller based on the virtual switch.
Further, the electronic device processes the first negotiation message and the second negotiation message based on the link aggregation controller, provides the first response protocol message to the virtual machine, and provides the second response protocol message to the switch. As shown in
In some embodiments, the providing the first response protocol message to the virtual machine, and providing the second response protocol message to the switch in S303 include, but are not limited to, S3031, S3032, and S3033:
As shown in
After receiving the first response protocol message, the virtual switch in the electronic device forwards the first response protocol message to the virtual machine.
After receiving the second response protocol message, the virtual switch in the electronic device forwards the second response protocol message to the virtual machine.
Specifically, the implementation process and principle of S304 are same as those of S102, and will not be repeated here.
In some embodiments, the to-be-communicated data message includes at least one of: a first data message transmitted from the virtual machine or a second data message transmitted from the switch. That is, the to-be-communicated data message may be the first data message transmitted from the virtual machine, or may be the second data message transmitted from the switch.
In some embodiments, the electronic device stores the correspondence between the preset destination identifier and the preset communication link. The electronic device acquires the correspondence between the preset destination identifier and the preset communication link, the destination identifier corresponding to one or more communication links, that is, the message can be communicated through a plurality of communication links, thus solving the problem of single point of failure in existing technologies.
After acquiring the correspondence between the preset destination identifier and the preset communication link, the electronic device can determine the communication link corresponding to the destination identifier in the to-be-communicated data message from the correspondence.
Specifically, the implementation process and principle of S307 are same as those of S104, and will not be repeated here.
In embodiments of the present disclosure, the first negotiation message transmitted from the virtual machine and the second negotiation message transmitted from the switch are acquired, the first negotiation message and the second negotiation message are forwarded to the link aggregation controller based on the virtual switch, the first negotiation message and the second negotiation message are processed based on the link aggregation controller, the first response protocol message is provided to the virtual machine, and the second response protocol message is provided to the switch. Further, the to-be-communicated data message is acquired, where the to-be-communicated data message includes the destination identifier, the source identifier, and the message type, the correspondence between the preset destination identifier and the preset communication link is acquired, and the communication link corresponding to the destination identifier in the to-be-communicated data message is determined from the correspondence. Then, the to-be-communicated data message is communicated based on the communication link. Because the plurality of data processing units is provided, and each of the data processing units is communicatively connected to the virtual machine and the switch respectively, the message can be communicated through a plurality of communication links, thereby avoiding a problem of network interruption caused by single point of failure, and ensuring high availability.
Specifically, the implementation process and principle of S401 are same as those of S101, and will not be repeated here.
As shown in
As shown in
Further, the electronic device acquires the to-be-communicated data message from the virtual switch.
Specifically, the implementation process and principle of S405 are same as those of S103, and will not be repeated here.
The virtual switch in the electronic device can acquire the destination identifier from the to-be-communicated data message.
After acquiring the destination identifier, the virtual switch in the electronic device forwards the to-be-communicated data message through the communication link to the destination corresponding to the destination identifier, to achieve message communication.
In embodiments of the present disclosure, link negotiation is performed for the virtual machine and the switch respectively, the to-be-communicated data message is transmitted to the virtual switch through the virtual function port representor corresponding to the virtual function port in the virtual machine, the to-be-communicated data message is transmitted to the virtual switch through the uplink corresponding to the physical port in the data processing unit, and the to-be-communicated data message is obtained based on the virtual switch. Further, the communication link for the to-be-communicated data message is determined, where the communication link is a message channel between the virtual function part in the virtual machine, the virtual function port representor corresponding to the virtual function port in the virtual machine, the uplink corresponding to the physical port in the data processing unit, the physical port in the data processing unit, and the switch. Then, the destination identifier is acquired from to-be-communicated data message based on the virtual switch. Then, the to-be-communicated data message is forwarded through the communication link to the destination corresponding to the destination identifier based on the virtual switch. The present disclosure solves the problem of single point of failure in existing technologies. When one DPU card fails, another DPU card will take over traffic of the faulty card. The present disclosure eliminates single point of hardware failure by cross-card link aggregation of virtual function ports of DPUs, thus improving high availability in a production environment.
Optionally, when performing link aggregation for the virtual machine and the switch respectively, the negotiation module 61 is specifically configured to: acquire a first negotiation message transmitted from the virtual machine and a second negotiation message transmitted from the switch; forward the first negotiation message and the second negotiation message to a link aggregation controller based on a virtual switch; process the first negotiation message and the second negotiation message based on the link aggregation controller, provide a first response protocol message to the virtual machine, and provide a second response protocol message to the switch.
Optionally, when providing the first response protocol message to the virtual machine and providing the second response protocol message to the switch, the negotiation module 61 is specifically configured to: transmit the first response protocol message and the second response protocol message to the virtual switch; forward, by the virtual switch, the first response protocol message to the virtual machine; and forward, by the virtual switch, the second response protocol message to the switch.
Optionally, the to-be-communicated data message includes at least one of: a first data message transmitted from the virtual machine or a second data message transmitted from the switch.
Optionally, when acquiring the to-be-communicated data message, the acquisition module 62 is specifically configured to: transmit the to-be-communicated data message to the virtual switch through the virtual function port representor corresponding to the virtual function port in the virtual machine; or transmit the to-be-communicated data message to the virtual switch through the uplink corresponding to the physical port in the data processing unit; and obtain the to-be-communicated data message based on the virtual switch.
Optionally, when determining the communication link of the to-be-communicated data message, the determination module 63 is specifically configured to: acquire a correspondence between a preset destination identifier and a preset communication link; and determine a communication link corresponding to the destination identifier in the to-be-communicated data message from the correspondence.
Optionally, when performing communication for the to-be-communicated data message based on the communication link, the communication module 64 is specifically configured to: acquire the destination identifier from the to-be-communicated data message based on the virtual switch; and forward the to-be-communicated data message through the communication link to a destination corresponding to the destination identifier based on the virtual switch.
The apparatus for cross-card link aggregation of virtual function ports of DPUs in the embodiment shown in
In addition, an embodiment of the present disclosure further provides a computer-readable storage medium storing a computer program thereon, where the computer program is executed by a processor to execute the method for cross-card link aggregation of virtual function ports of DPUs as described in the above embodiments.
In addition, an embodiment of the present disclosure further provides a computer program product, where the computer program product includes a computer program or instruction, and the computer program or instruction, when executed by a processor, implements the method for cross-card link aggregation of virtual function ports of DPUs as described above.
It should be noted that the above computer-readable medium in the present disclosure may be a computer-readable signal medium or a computer-readable storage medium, or any combination of the above two. An example of the computer-readable storage medium may include, but is not limited to: electric, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, elements, or a combination of any of the above. A more specific example of the computer-readable storage medium may include, but is not limited to: an electrical connection with one or more pieces of wire, a portable computer disk, a hard disk, a random-access memory (RAM), a read only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical memory, a magnetic memory, or any suitable combination of the above. In the present disclosure, the computer-readable storage medium may be any tangible medium containing or storing programs which may be used by, or used in combination with, a command execution system, apparatus, or element. In the present disclosure, the computer-readable signal medium may include a data signal in the base band or propagating as parts of a carrier wave, in which computer-readable program codes are carried. The propagating data signal may take various forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. The computer-readable signal medium may also be any computer-readable medium except for the computer-readable storage medium. The computer-readable signal medium is capable of transmitting, propagating, or transferring programs for use by, or use in combination with, a command execution system, apparatus, or element. The program code contained on the computer-readable medium may be transmitted with any suitable medium, including but not limited to: wire, an optical cable, a RF (radio frequency) medium etc., or any suitable combination of the above.
In some embodiments, a client can communicate with a server using any network protocol that is known at present or is to be developed in the future, such as HTTP (HyperText Transfer Protocol), and can be interconnected with any form or medium of digital data communication (such as a communication network). Examples of communication networks include a local area network (“LAN”), a wide area network (“WAN”), extranet (e.g., Internet), and an end-to-end network (e.g., ad hoc end-to-end network), as well as any network that is known at present or is to be developed in the future.
The above computer-readable medium may be included in the above electronic device; or may be a stand-alone computer-readable medium without being assembled into the electronic device.
The above computer-readable medium stores one or more programs. The one or more programs, when executed by the electronic device, cause the electronic device to:
In addition, the electronic device can further perform other steps in the method for cross-card link aggregation of virtual function ports of DPUs as described above.
A computer program code for executing operations in the present disclosure may be compiled using one or more programming languages or combinations thereof. The above programming languages include, but are not limited to, object-oriented programming languages, such as Java, Smalltalk or C++, and also include conventional procedural programming languages, such as “C” language, or similar programming languages. The program code may be completely executed on a user's computer, partially executed on a user's computer, executed as a separate software package, partially executed on a user's computer and partially executed on a remote computer, or completely executed on a remote computer or server. In the case where a remote computer is involved, the remote computer may be connected to a user computer through any kind of networks, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (for example, connected through the Internet using an Internet service provider).
The flow charts and block diagrams in the figures illustrate architectures, functions and operations that may be implemented according to the systems, methods, and computer program products of the various embodiments of the present disclosure. In this regard, each of the blocks in the flow charts or block diagrams may represent a module, a program segment, or a code portion, said module, program segment, or code portion including one or more executable instructions for implementing specified logic functions. It should also be noted that, in some alternative implementations, functions annotated in the blocks may also occur in a sequence different from the sequence annotated in the figures. For example, any two blocks presented in succession may be executed substantially in parallel, or sometimes be executed in a reverse sequence, depending on the functions involved. It should also be noted that each block in the block diagrams and/or flow charts as well as a combination of blocks in the block diagrams and/or flow charts may be implemented using a dedicated hardware-based system executing specified functions or operations, or by a combination of dedicated hardware and computer instructions.
The units involved in the embodiments of the present disclosure may be implemented by software, or may be implemented by hardware. The names of the units do not constitute a limitation to such units themselves in some cases.
The functions described above herein may at least partially be executed by one or more logical components of hardware. For example, non-restrictively, usable exemplary types of the logical components of hardware include: a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), an application specific standard product (ASSP), a system-on-a-chip system (SOC), a loading programmable logic device (CPLD), and so on.
In the context of the present disclosure, the machine-readable medium may be a tangible medium which may contain or store a program for use by, or use in combination with, an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any appropriate combination of the above. A more specific example of the machine-readable storage medium will include an electrical connection based on one or more pieces of wire, a portable computer disk, a hard disk, a random-access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any appropriate combination of the above.
It should be noted that relational terms such as “first” and “second” are only used to distinguish one entity or operation from another entity or operation, and do not necessarily request or imply existence of any actual relationship or sequence between these entities or operations. Further, the terms such as “comprising”, “including” or any other variation thereof are intended to encompass non-exclusive inclusions, such that a process, a method, an article, or a device that includes a series of elements not only includes those elements, but also includes other elements that are not explicitly listed, or further includes elements that are inherent to such a process, a method, an article, or a device. Without more constraints, an element defined by the wording “comprises a . . . ” does not preclude the existence of additional identical elements in the process, the method, the article, or the device that includes the element.
The above description only provides specific embodiments of the present disclosure, so that those skilled in the art can understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to the embodiments described herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202310104331.9 | Jan 2023 | CN | national |
