1. Field of the Invention
This invention relates to a method for deciding a duty factor and a driving method using the duty factor, in a light-emitting device in which a unit for supplying a current to a light-emitting element and a light-emitting element are provided in each of plural pixels. A light-emitting device includes a panel having a light-emitting element sealed therein, and a module in which IC and the like including a controller are mounted on the panel.
2. Description of the Related Art
In an active-matrix light-emitting device, the gradation is controlled by a video signal written into each pixel. Hereinafter, a method for driving a light-emitting device using an analog video signal will be described.
In the following example, a frame frequency of k is used. As shown in
In each frame period, as an analog video signal is written to each pixel, the luminance of the light-emitting element of each pixel is controlled in accordance with image information held by the analog video signal, and the gradation is thus displayed. In writing an analog video signal to the pixels, a so-called point-sequential format for sequentially writing to each pixel, or a so-called line-sequential format for sequentially writing to each pixel of each line may be used. In both formats, a period during which an analog video signal is written to all the pixels is equivalent to a writing period Ta.
After the writing of an analog video signal ends, a holding period Ts starts and the luminance of the light-emitting element in each pixel is held until the frame period ends.
When the above-described driving method is used, the pixels perform display both in the writing period Ta and the holding period Ts. Therefore, depending on image information held by an analog video signal, the pixels may be constantly on, that is, the light-emitting elements of the pixels constantly emit light. A period during which actual display is performed is called display period.
In the case of the driving method shown in
Although in
While display is performed both in the writing period Ta and the holding period Ts in
Meanwhile, the problem in practical application of the light-emitting device is the short lifetime of the light-emitting element due to deterioration of its electroluminescence layer.
The deterioration of the electroluminescence material is accelerated by moisture, oxygen, light and heat. Specifically, the rate of deterioration is affected by the structure of a device for driving the light-emitting device, the characteristics of the electroluminescence material, the material of electrodes, the conditions of preparation process, the method for driving the light-emitting device and the like.
Particularly, as a greater quantity of current flows through the light-emitting element, the light-emitting element deteriorates more quickly. When the light-emitting element deteriorates, the luminance of the light-emitting element is lowered even if the voltage applied to the electroluminescence layer is constant. As a result, a displayed image is unclear.
In view of the foregoing problem, it is an object of the present invention to restrain the deterioration of the light-emitting element and realize constant luminance, thus improving reliability.
The present inventors have found that the reliability of a light-emitting device varies depending on the duty factor of a display period in which each pixel performs display, in one frame period. The present inventors have also found a method for calculating an optimum duty factor for securing high reliability.
In this specification, a light-emitting element (OLED: organic light-emitting diode) has a layer containing an electroluminescence material that generates electroluminescence as an electric field is applied thereon (hereinafter referred to as electroluminescence layer), an anode layer, and a cathode layer. The electroluminescence layer is provided between an anode and a cathode and is made up of a single layer or plural layers. These layers may contain an organic compound or an inorganic compound. The electroluminescence in the electroluminescence layer includes light emission (fluorescence) in returning from a singlet excited state to a ground state and light emission (phosphorescence) in returning from a triplet excited state to the ground state.
It can be seen from
As shown in
The present inventors have considered that such an optimum duty factor with high reliability exists because two phenomena occur for duty factors below and above the optimum range.
The case of a duty factor below the optimum range will now be reviewed.
To maintain constant apparent luminance on the screen, it is necessary to maintain a constant total quantity of electricity flowing through the light-emitting element in one frame period, irrespective of the duty factor. If the duty factor is small and the display period is short, as shown in
Next, the case of a duty factor above the optimum range will be reviewed.
If the duty factor increases while the total quantity of electricity in one frame period is fixed in order to maintain constant apparent luminance on the screen, the current density is reduced and the display period is extended, as shown in
There are various reasons for the acceleration of deterioration of the light-emitting element in a long display period. However, heat generated in the light-emitting element can be considered to be one reason for the acceleration of deterioration. It may also be considered that ionic impurities existing in the electroluminescence layer concentrate at one electrode and thus create a region having lower resistance than the other regions in the electroluminescence layer, and that a current actively flows through that low-resistance region, thus accelerating the deterioration.
In this way, it can be considered that at least the above-described two phenomena are related to the decline in luminance of the light-emitting element.
The total quantity of electricity flowing through the light-emitting element of one pixel in one frame period is equivalent to the product of the display period determined by the duty factor, and the current density. Thus, when the frame frequency is fixed, the product of the luminance after X hours of
As shown in
Although the graph shown in
However, if the total quantity of electricity, which is equivalent to the product of the display period determined by the duty factor of the graph shown in
As driving is performed using the optimum duty factor, deterioration of the light-emitting element can be restrained to provide constant luminance, and the reliability of the light-emitting device can be improved.
The value of the optimum duty factor varies depending on the structure of the light-emitting element. However, each time, the range of the optimum duty factor can be defined from the product of the luminance after X hours in relation to the duty factor or the current density in the case the total quantity of electricity is constant.
For example, in view of the data shown in
The total quantity of electricity flowing through one pixel in one frame period also changes depending on image information held by an analog video signal. Since the light-emitting element deteriorates more significantly as the total quantity of electricity increases, it is desired to define the range of the optimum duty factor based on the case of the largest total quantity of electricity, irrespectively of image information.
By thus performing driving with an optimum duty factor, it is possible to restrain deterioration of the light-emitting element, realize constant luminance, and improve the reliability of the light-emitting device.
In the following embodiments, a driving method using an optimum duty factor will be described.
Embodiment 1
In this embodiment, the driving method of the present invention will be described with reference to a light-emitting device that controls light emission of a light-emitting element using two thin film transistors (TFTs) provided in each pixel.
In the case of this embodiment, a region having one of the signal lines (S1 to Sx), one of the power lines (V1 to Vx) and one of the scanning lines (G1 to Gy) is equivalent to a pixel 404. In the pixel part 401, plural pixels 404 are arranged in the form of a matrix.
In this specification, connection means electrical connection unless it is described otherwise.
Of the source and drain of the driving TFT 406, one is connected to the power line Vi (where i is 1 to x) and the other is connected to the pixel electrode of a light-emitting element 407.
The light-emitting element 407 includes an anode, a cathode, and an electroluminescence layer provided between the anode and the cathode. In the case the anode is connected with the source or drain of the driving TFT 406, the anode is the pixel electrode and the cathode is the counter-electrode. On the other hand, in the case the cathode is connected with the source or drain of the driving TFT 406, the cathode is the pixel electrode and the anode is the counter-electrode.
In the case the source or drain of the driving TFT 406 is connected to the anode of the light-emitting element 407, it is desired that the driving TFT 406 is a p-channel TFT. On the other hand, in the case the source or drain of the driving TFT 406 is connected to the cathode of the light-emitting element 407, it is desired that the driving TFT 406 is an n-channel TFT.
A voltage from a power source is applied to the counter-electrode of the light-emitting element 407 and the power line Vi. In this specification, voltage means the potential difference from the ground voltage unless it is described otherwise.
Of two electrodes of holding capacitance 408, one is connected to the power line Vi and the other is connected to the gate of the driving TFT 406. The holding capacitance 408 is provided for holding the gate voltage of the driving TFT 406 when the switching TFT 405 is in a non-selection state (off-state). While the holding capacitance 408 is provided in the structure shown in
The driving method of the present invention, used in the light-emitting device shown in
As shown in
In the driving method shown in
The specific operation of the pixels will now be described. In the writing period Ta, the same voltage as the voltage applied to the power lines is applied to the counter-electrodes of the light-emitting elements 407. Alternatively, the voltage difference between the counter-electrodes and the power lines may be controlled so that a reverse-bias voltage is applied to the light-emitting elements.
Then, in the writing period Ta, the scanning lines GI to Gy are sequentially selected. The periods when the respective scanning lines are selected do not overlap each other. For example, when the scanning line Gj (1 to y) is selected, all the switching TFTs 405 with their gates connected with the scanning line Gj are turned on. Then, an analog video signal sequentially inputted to the signal lines S1 to Sx is inputted to the gates of the driving TFTs 406 via the switching TFTs 405. Although
Then, the gate voltage of the driving TFTs 406 defined by the analog video signal is held by the holding capacitance 408. In this embodiment, since the same voltage as the voltage applied to the power lines is applied to the counter-electrodes or the voltage difference between the counter-electrodes and the power lines is controlled so that a reverse-bias voltage is applied to the light-emitting elements in the writing period Ta, none of the light-emitting elements 407 of all the pixels emits light irrespective of the switching of the driving TFTs 406.
On completion of the selection of all the scanning lines G1 to Gy, the writing period Ta ends and the holding period Ts starts.
In the holding period Ts, a predetermined voltage difference is provided between the counter-electrodes and the power lines so that a forward-bias voltage is applied to the light-emitting elements when the driving TFTs are on. Then, simultaneously in all the pixels, the ON-state current of the driving TFT is controlled by the gate voltage held by the holding capacitance 408, and the light emission of the light-emitting element 407 is controlled by the ON-state current.
As the holding period Ts ends, the non-display period Te starts. In the non-display period Te, similarly to the writing period Ta, the same voltage as the voltage applied to the power lines is applied to the counter-electrodes of the light-emitting elements 407. Alternatively, the voltage difference between the counter-electrodes and the power lines may be controlled so that a reverse-bias voltage is applied to the light-emitting elements. Therefore, the light-emitting elements 407 of all the pixels simultaneously enter a non-emission state and all the pixels are turned off.
As the non-display period Te ends, one frame period ends and display of one screen can be performed. Then, the next frame period starts, and the writing period Ta, the holding period Ts and the non-display period Te appear again.
In the driving method shown in
In the driving method of the present invention, the duty factor must fall within an optimum range. In the case of the driving method shown in
The optimum duty factor varies, depending on the apparent luminance of the light-emitting elements in initial light emission, that is, depending on the value of the total quantity of electricity flowing through one pixel in one frame period. The total quantity of electricity flowing in one frame period may be based on the state where the pixels have the highest gradation or may be based on the gradation decided by an operator. Alternatively, an optimum duty factor may be found each time in accordance with the structure of the light-emitting elements.
Embodiment 2
In this embodiment, the driving method of the present invention will be described with reference to a light-emitting device that controls light emission of a light-emitting element using three TFTs provided in each pixel.
A region having one of the signal lines (Si to Sx), one of the power lines (V1 to Vx), one of the first scanning lines (Ga1 to Gay) and one of the second scanning lines (Ge1 to Gey) is equivalent to a pixel 505. In the pixel part 501, plural pixels 505 are arranged in the form of a matrix.
The gate of an erasure TFT 509 is connected to the second scanning lines Gej (where j is 1 to y). Of the source and drain of the erasure TFT 509, one is connected to the power line Vi (where i is 1 to x) and the other is connected to the gate of the driving TFT 508.
Of the source and drain of the driving TFT 508, one is connected to the power line Vi and the other is connected to the pixel electrode of a light-emitting element 510.
The light-emitting element 510 includes an anode, a cathode, and an electroluminescence layer provided between the anode and the cathode. In the case the anode is connected with the source or drain of the driving TFT 508, the anode is the pixel electrode and the cathode is the counter-electrode. On the other hand, in the case the cathode is connected with the source or drain of the driving TFT 508, the cathode is the pixel electrode and the anode is the counter-electrode.
In the case the anode is the pixel electrode, it is desired that the driving TFT 508 is a p-channel TFT. On the other hand, in the case the cathode is the pixel electrode, it is desired that the driving TFT 508 is an n-channel TFT.
A voltage from a power source is applied to the counter-electrode of the light-emitting element 510 and the power line Vi. The voltage difference between the counter-electrode and the power line is held at such a value that a forward-bias voltage is applied to the light-emitting element when the driving TFT is turned on.
Of two electrodes of holding capacitance 512, one is connected to the power line Vi and the other is connected to the gate of the driving TFT 508. The holding capacitance 512 is provided for holding the gate voltage of the driving TFT 508 when the switching TFT 507 is in a non-selection state (off-state). While the holding capacitance 512 is provided in the structure shown in
The driving method of the present invention, used in the light-emitting device shown in
In the writing period Ta, the first scanning lines Gal to Gay are sequentially selected in such a manner that the period when the respective first scanning lines are selected do not overlap each other. For example, when the first scanning line Gaj (1 to y) is selected, all the switching TFTs 507 with their gates connected with the first scanning line Gaj are turned on. Then, an analog video signal sequentially or simultaneously inputted to the signal lines S1 to Sx is inputted to the gates of the driving TFTs 508 via the switching TFTs 507.
Then, the ON-state current of the driving TFTs 508 is controlled in accordance with image information held by the analog video signal, and the luminance of the light-emitting elements is controlled by the ON-state current. In this manner, in this embodiment, the holding period Ts starts and display starts sequentially in the pixels where the analog video signal has been written.
The writing period Ta is equivalent to a period until the selection of all the first scanning lines Gal to Gay is completed. The holding period Ts starts independently in each pixel when writing of the analog video signal ends. Therefore, in this embodiment, the writing period Ta and the holding period Ts of each pixel overlap each other, as shown in
As the holding period Ts ends, the non-display period Te starts. As the non-display period Te starts, the second scanning lines Ge1 to Gey are sequentially selected.
When the second scanning line Gej is selected, all the erasure TFTs 509 with their gates connected with the second scanning line Gej are turned on. The voltage of the power lines V1 to Vx is applied to the gates of the driving TFTs 508 via the erasure TFTs 509.
As the voltage of the power lines is applied to the gates of the driving TFTs 508, the gate and source of each driving TFT 508 have continuity. Therefore, the gate voltage becomes 0 V and the driving TFTs 508 are turned off. The light-emitting elements 510 enter a non-emission state and the pixels of this line are forced to end display.
As all the display periods end, one frame period ends and one image can be displayed. The pixels described in this embodiment can be driven at a desired duty factor by adjusting the duration of the non-display period.
In the driving method shown in
In the driving method shown in
By using the driving methods described in Embodiments 1 and 2, it is possible to perform driving at an optimum duty factor, thus restraining deterioration of the light-emitting elements and improving the reliability of the light-emitting device.
In the light-emitting device using the driving method of the present invention, it suffices to have a duty factor within an optimum range, and the device is not limited to the structures described in Embodiments 1 and 2.
Hereinafter, examples of the present invention will be described.
In this example, a driving method other than the driving method described in Embodiment 1, for the light-emitting device shown in
One driving method of this example will now be described with reference to
The specific operation of the pixels will be described. In the writing period Ta, similarly to Embodiment 1, the same voltage as the voltage applied to the power lines is applied to the counter-electrodes of the light-emitting elements 407. Alternatively, the voltage difference between the counter-electrodes and the power lines may be controlled so that a reverse-bias voltage is applied to the light-emitting elements.
Then, the scanning lines G1 to Gy are sequentially selected and all the lo switching TFTs 405 with their gates connected with the scanning lines are turned on. The gate voltage of the driving TFTs 406 is defined by an analog video signal sequentially or simultaneously inputted to the signal lines S1 to Sx and is held by the holding capacitance 408.
In the writing period Ta, since the same voltage as the voltage applied to the power lines is applied to the counter-electrodes or the voltage difference between the counter-electrodes and the power lines is controlled so that a reverse-bias voltage is applied to the light-emitting elements, none of the light-emitting elements 407 of all the pixels emits light irrespective the switching of the driving TFTs 406.
In the driving method shown in
In the non-display period Te, the gate voltage of the driving TFTs 406 defined by the analog video signal is held by the holding capacitance 408. Similarly to the writing period Ta, since the same voltage as the voltage applied to the power lines is applied to the counter-electrode or the voltage difference between the counter-electrodes and the power lines is controlled so that a reverse-bias voltage is applied to the light-emitting elements, none of the light-emitting elements 407 of all the pixels emits light and all the pixels are off, irrespective of the switching of the driving TFTs 406.
As the non-display period Te ends, the holding period Ts starts. In the holding period Ts, a predetermined voltage difference is provided between the counter-electrodes and the power lines so that a forward-bias voltage is applied to the light-emitting elements 407 when the driving TFTs 406 are on. Then, simultaneously in all the pixels, the ON-state current of the driving TFT is controlled by the gate voltage held by the holding capacitance 408, and the light emission of the light-emitting element 407 is controlled by the ON-state current.
As the holding period Ts ends, one frame period ends and display of one screen can be performed. Then, the next frame period starts, and the writing period Ta, the non-display period Te and the holding period Ts appear again.
In the driving method shown in
In the driving method of the present invention, the duty factor must fall within an optimum range. In the case of the driving method shown in
Another driving method of this example will now be described with reference to
In the writing period Ta, a predetermined voltage difference is provided between the counter-electrodes and the power lines so that a forward-bias voltage is applied to the light-emitting elements when the driving TFTs are on. Then, the scanning lines G1 to Gy are sequentially selected and all the switching TFTs 405 with their gates connected with the scanning lines are turned on. The gate voltage of the driving TFTs 406 is defined by an analog video signal sequentially or simultaneously inputted to the signal lines S1 to Sx and is held by the holding capacitance 408.
The ON-state current of the driving TFTs 406 is controlled in accordance with image information held by the analog video signal, and the luminance of the light-emitting elements 407 is controlled by the ON-state current. In this manner, in the driving method shown in
On completion of the selection of all the scanning lines G1 to Gy, the writing period Ta ends. The holding period starts when the writing of the analog video signal ends in each pixel. Therefore, in the driving method shown in
As the holding period Ts ends, the non-display period Te starts. In the non-display period Te, the same voltage as the voltage applied to the power lines is applied to the counter-electrodes of the light-emitting elements 407. Alternatively, the voltage difference between the counter-electrodes and the power lines may be controlled so that a reverse-bias voltage is applied to the light-emitting elements. Therefore, the light-emitting elements 407 of all the pixels simultaneously enter a non-emission state and all the pixels are turned off.
As the non-display period Te ends, one frame period ends and display of one screen can be performed. Then, the next frame period starts, and the writing period Ta, the holding period Ts and the non-display period Te appear again.
In the driving method shown in
In the case of the driving method shown in
In the driving method of the present invention, the duty factor must fall within an optimum range. In the case of the driving method shown in
In the case of the driving method shown in
In this example, the detailed structures of a signal line driving circuit and a scanning line driving circuit, used for driving the light-emitting device shown in
A signal line driving circuit 601 shown in
When a clock signal (CLK) and a start pulse signal (SP) are supplied to the shift register 602, the shift register 602 generates a timing signal for controlling the timing of sampling a video signal. The generated timing signal has its voltage amplitude amplified by the level shifter 603 and is then inputted to the sampling circuit 604. The video signal inputted to the sampling circuit 604 is sampled synchronously with the timing signal inputted to the sampling circuit 604 and is inputted to the corresponding signal line.
A scanning line driving circuit 605 shown in
In the scanning line driving circuit 605, a timing signal from the shift register 606 is supplied to the buffer 607 and then supplied to the corresponding scanning line (or first or second scanning line). The scanning line is connected with the gates of the switching TFTs (or erasure TFTs) of the pixels of one line. As the switching TFTs (or erasure TFTs) of the pixels of one line must be simultaneously turned on, a buffer that can supply a large current is used.
In practice, this example can be freely combined with Example 1.
In this example, the structure of and the preparation method for the light-emitting element used for obtaining data shown in
The preparation method will now be described specifically. After a transparent conductive film of ITO is spin-coated with the PEDOT/PSS solution at 1500 rpm, it is baked at 100° C. at a normal pressure for 10 minutes and then baked at 80° C. in a vacuum atmosphere for 10 minutes. Thus, a PEDOT/PSS (hole injection layer) with a thickness of 30 nm is produced.
Next, a toluene solution of a PPV derivative exhibiting yellow light emission (equivalent to 4 g/l) is prepared and applied by spin-coating at 1300 rpm in a nitrogen atmosphere. After that, vacuum baking is carried out at 80° C. for 10 minutes, thus producing a PPV derivative layer (light-emitting layer) with a thickness of 80 nm.
After that, vacuum evaporation of Ca to a thickness of 20 nm and vacuum evaporation of Al to a thickness of 100 nm are carried out, thus forming a cathode.
Further, the present invention can be implemented to use any other compounds to make the emitting layer, for example, using a composite of an organic compound and an inorganic compound as a light-emitting layer in the light-emitting element, and there is no particular limitation placed on the form of a light-emitting element.
Number | Date | Country | Kind |
---|---|---|---|
2002-199778 | Jul 2002 | JP | national |
Number | Name | Date | Kind |
---|---|---|---|
4224616 | Kamagata et al. | Sep 1980 | A |
4737782 | Fukuma et al. | Apr 1988 | A |
4805994 | Miyajima | Feb 1989 | A |
4859910 | Iwakawa et al. | Aug 1989 | A |
5231382 | Tanaka | Jul 1993 | A |
5387838 | Hirakawa et al. | Feb 1995 | A |
5550066 | Tang et al. | Aug 1996 | A |
5583531 | Okada et al. | Dec 1996 | A |
5621426 | Okada et al. | Apr 1997 | A |
5684365 | Tang et al. | Nov 1997 | A |
5736881 | Ortiz | Apr 1998 | A |
5745087 | Tomiyoshi et al. | Apr 1998 | A |
5990629 | Yamada et al. | Nov 1999 | A |
5990630 | Nakamura | Nov 1999 | A |
6005646 | Nakamura et al. | Dec 1999 | A |
6008588 | Fujii | Dec 1999 | A |
6046547 | Nishio et al. | Apr 2000 | A |
6087786 | Allen et al. | Jul 2000 | A |
6151006 | Yanagi et al. | Nov 2000 | A |
6160594 | Hanami et al. | Dec 2000 | A |
6239453 | Yamada et al. | May 2001 | B1 |
6297813 | Okada et al. | Oct 2001 | B1 |
6380689 | Okuda | Apr 2002 | B1 |
6402339 | Mukogawa et al. | Jun 2002 | B1 |
6421033 | Williams et al. | Jul 2002 | B1 |
6424094 | Feldman | Jul 2002 | B1 |
6437762 | Birdwell | Aug 2002 | B1 |
6452341 | Yamauchi et al. | Sep 2002 | B1 |
6466187 | Moon | Oct 2002 | B1 |
6509885 | Hanaki et al. | Jan 2003 | B1 |
6528951 | Yamazaki et al. | Mar 2003 | B2 |
6577072 | Saito et al. | Jun 2003 | B2 |
6583775 | Sekiya et al. | Jun 2003 | B1 |
6614083 | Yamazaki et al. | Sep 2003 | B1 |
6661428 | Kim | Dec 2003 | B1 |
6730934 | Yamada et al. | May 2004 | B2 |
6853130 | Morii | Feb 2005 | B2 |
6864863 | Kasai | Mar 2005 | B2 |
6950079 | Inoue | Sep 2005 | B2 |
7034339 | Matsuura et al. | Apr 2006 | B2 |
7061452 | Inoue et al. | Jun 2006 | B2 |
7088334 | Adachi et al. | Aug 2006 | B2 |
7133015 | Yoshida et al. | Nov 2006 | B1 |
7138762 | Morii | Nov 2006 | B2 |
7154454 | Okabe et al. | Dec 2006 | B2 |
7167190 | Ito et al. | Jan 2007 | B2 |
20010000335 | Yamada et al. | Apr 2001 | A1 |
20010022565 | Kimura | Sep 2001 | A1 |
20010030511 | Yamazaki et al. | Oct 2001 | A1 |
20010035863 | Kimura | Nov 2001 | A1 |
20020036610 | Ito et al. | Mar 2002 | A1 |
20020041162 | Tsujioka et al. | Apr 2002 | A1 |
20020047555 | Inukai | Apr 2002 | A1 |
20020057469 | Yushiya et al. | May 2002 | A1 |
20020085377 | Mukogawa et al. | Jul 2002 | A1 |
20020105487 | Inoue | Aug 2002 | A1 |
20020113764 | Yamada et al. | Aug 2002 | A1 |
20020158590 | Saito et al. | Oct 2002 | A1 |
20030011559 | Adachi et al. | Jan 2003 | A1 |
20030071274 | Ohno et al. | Apr 2003 | A1 |
20030189677 | Kawabata et al. | Oct 2003 | A1 |
20040041751 | Takahashi | Mar 2004 | A1 |
20040066363 | Yamano et al. | Apr 2004 | A1 |
20040114396 | Kobayashi et al. | Jun 2004 | A1 |
20040169622 | Matsuura et al. | Sep 2004 | A1 |
20040189548 | Takeuchi et al. | Sep 2004 | A1 |
20050104835 | Misonou et al. | May 2005 | A1 |
20060119279 | Matsuura et al. | Jun 2006 | A1 |
Number | Date | Country |
---|---|---|
1061497 | Dec 2000 | EP |
1085496 | Mar 2001 | EP |
1 094 436 | Apr 2001 | EP |
1 197 942 | Apr 2002 | EP |
1 197 943 | Apr 2002 | EP |
2000-268957 | Sep 2000 | JP |
2001060076 | Mar 2001 | JP |
2001-109432 | Apr 2001 | JP |
2001338771 | Dec 2001 | JP |
2002-100470 | Apr 2002 | JP |
2002-100471 | Apr 2002 | JP |
2002-189448 | Jul 2002 | JP |
WO 03017730 | Feb 2003 | WO |
Number | Date | Country | |
---|---|---|---|
20040008252 A1 | Jan 2004 | US |