Patent Application
20110311237
1. Field of the Invention
The present invention relates to an electronic device, such as an image forming apparatus, and in particular to technology for detecting an open/closed state of an interlock switch thereof.
2. Description of the Related Art
Image forming apparatuses such as copiers or printers, which are electronic devices, are provided with an opening/closing cover by which a service operator can access the inside of the apparatus. Opening the cover, the service operator can execute a maintenance operation, such as exchanging consumable parts. Besides exchanging consumable parts, also when a malfunction occurs, for example when conveyance failure of paper occurs (also referred to as “jam”), the user may open the cover to retrieve the sheet that has caused the jam. There are also image forming apparatuses, in which a driving system, such as a motor and gears for driving a conveying system, is exposed when the cover is opened. Similarly, there are also image forming apparatuses, in which an electrode under high voltage is exposed when the consumable part has been retrieved. Japanese Patent Laid-Open No. 2006-297812 proposes a mechanical switch mechanism (interlock switch), that cuts off the voltage supplied to the driving system or a high-voltage current source, when the cover is opened.
The invention disclosed in Japanese Patent Laid-Open No. 2006-297812 is well thought-out with regards to the aspect that the supply of power can be cut off when detecting opening/closing of the cover, but it still leaves room for improvement. For example, in order to achieve a lower energy consumption of the image forming apparatus, a power saving mode is necessary, where the energy consumption is lowered in an inoperative state. The power saving mode lowers the clock oscillation frequency of a microcontroller or stops the clock oscillation operation. In such a case, there is a risk that the microcontroller cannot detect the open state of the interlock switch.
Accordingly, the present invention is to solve at least one of the above-described and other problems. More specifically, it is a feature thereof that it can detect the open/closed state of a cover independently from a voltage value that is applied to the switch unit or a clock oscillation state of a control circuit controlling the electronic device. The other problems should become clear from the overall specification.
An electronic device includes a switch unit that opens or closes interlocking with an opening or closing operation of a cover that the electronic device is provided with for servicing its inside; a voltage converter that generates a first output voltage and a second output voltage with different voltage values by stepping down a voltage that is supplied from a commercial alternate current power supply; a load to which the first output voltage that is output from the voltage converter is supplied via the switch unit; and a controller to which the second output voltage that is output from the voltage converter is supplied and that controls the electronic device. To solve the above-noted problems, the electronic device may further include a potential difference detection unit that detects a potential difference between a power supply side and a load side of the switch unit, wherein the controller determines a state of the switch unit based on the potential difference. Alternatively, the electronic device may further include a first detection unit that detects a voltage on the load side of the switch unit, and a second detection unit that detects a voltage on the load side of the switch unit. When the electronic device is in a first operating state, the controller determines a state of the switch unit based on a result of the first detection unit. When the electronic device is in a second operating state that a power consumption of the device is lower than that in the first operating state, the controller determines the state of the switch unit based on a result of the second detection unit.
Further features of the present invention will become apparent from the following description of exemplary embodiments (with reference to the attached drawings).
Image forming apparatuses are examples of electronic devices that can ordinarily assume a plurality of operating states (for example: a printing state, an standby state, a power saving state, and the like). The energy that is consumed by the entire image forming apparatus in the power saving state is set to be lower than the energy that is consumed by the entire image forming apparatus in the standby state. The reason for this is that in the standby state, the various parts of the image forming apparatus are readied to immediately start image forming. For example, current is supplied to the heater of the fixing device, so that it assumes a predetermined temperature. The printing state is a state in which images are actually formed on a recording medium, and more energy is consumed than in any of the other states.
As described above, it is necessary than in both the standby state (including the printing state) and the power saving state of the image forming apparatus, the open/closed state of an interlock switch is detected by the microcontroller controlling the image forming apparatus. The reasons for this are as follows:
if the cover is opened in the printing state, in order to stop the printing operation,
if the cover is opened in the power saving state, in order to transition from the power saving state to the standby state,
if the cover is closed, in order to confirm whether any consumable part has been exchanged and to perform a preprocessing control for the exchanged consumable parts.
As a procedure for detecting the open/closed state of the interlock switch, it is most convenient to detect the voltage on a load side (downstream side) of the interlock switch. In
It is assumed that in the standby state, voltage values of about V1=24V and V2=3.3V are used. In the power saving state, the microcontroller 3 sends out a status transition signal from a digital output port PO to the AC/DC converter 10. This is in order to attain a low energy consumption. Upon transition to the power saving state, the output voltage V1 of the AC/DC converter is stepped down to a voltage value that is close to V2. The DC/DC converter 10 outputs the voltage V1 that is input into it unchanged. That is to say, in the power saving state, V1=V2=3.3V.
The voltage on the load side of the interlock switch 4 is divided by resistors 23, 24, and input into an analog/digital input port AD of the microcontroller 3. The analog/digital input port AD is a port incorporating an analog/digital converter. If the interlock switch 4 is open, the voltage on the load side of the interlock switch 4 is 0V. Thus, also the input voltage of the analog/digital input port AD becomes 0V. On the other hand, if the interlock switch 4 is closed, the voltage on the load side of the interlock switch 4 becomes V1. As noted above, V1 can take on the voltage values 24V or 3.3V. Regardless whether it is 24V or 3.3V, if the ratio of the resistors 23 and 24 is suitably set, the microcontroller 3 can detect the open/closed state of the interlock switch 4 in accordance with the voltage value that is input into the analog/digital input port AD.
The aspect where
Now, to accomplish a lower energy consumption, it may occur that the clock oscillation frequency of the microcontroller 3 is lowered in the power saving state. Moreover, in order to accomplish even further energy savings, it may also occur that the clock oscillation operation is stopped in the power saving state. When the clock oscillation operation is stopped, then it is necessary that the open state of the interlock switch 4 is detected by an interrupt input function of the microcontroller 3, the clock oscillation operation is released, and a transition to the standby state is made. If such a control is used, the microcontroller 3 has to use an interrupt input port, which is one type of digital input port. However, in cases where an interrupt input port is used, the following problem may occur.
In the circuit configuration illustrated in
In the circuit configuration illustrated in
Accordingly, in the embodiment explained below, it is possible to detect the open/closed state of the interlock switch 4 immediately, independently from the voltage value that is applied to the interlock switch 4 and from the clock oscillation state of the microcontroller 3 that controls the electronic device.
Embodiment 1 is explained using
A specific configuration example of the potential difference detection circuit 6 is explained using
If the interlock switch 4 is open, then there is a potential difference of at least about 0.7V between the base and the emitter of the PNP transistor 11. For this reason, the PNP transistor 11 is turned on. Then, the output voltage V1 of the power supply side of the interlock switch 4 is converted by the voltage division circuit constituted by the resistor 14 and the constant voltage diode 15 into 3.0V, for example. Thus, the interrupt input port PI detects “High”. Thus, the microcontroller 3 functions as a controller that determines that the switch unit is open if the output voltage of the potential difference detection circuit 6 is greater than or equal to a predetermined value. If the output voltage of the potential difference detection circuit 6 is neither greater than nor equal to a predetermined value, then the microcontroller 3 functions as a controller that determines that the switch unit is closed. When a voltage of at least a predetermined value is applied to it, the interrupt input port PI of the microcontroller 3 determines “High”, and when a voltage of at least a predetermined value is not applied to it, the interrupt input port PI of the microcontroller 3 determines “Low”.
On the other hand, if the interlock switch 4 is closed, there is no meaningful potential difference between the base and the emitter of the PNP transistor 11. Therefore, the PNP transistor 11 is turned off.
Then, the interrupt input port PI detects “Low” due to the pull-down resistor 16. The pull-down resistor 16 is an example of a second resistor that is inserted parallel to the constant voltage diode and the controller.
The potential difference detection circuit 6 is established regardless whether the voltage value of the output voltage V1 is 24V or 3.3V. Furthermore, the voltage detected by it can be processed digitally by the microcontroller 3 using the interrupt input port PI. That is to say, in the power saving state, the microcontroller 3 lowers the output voltage V1 to 3.3V, and lowers the clock oscillation frequency of the microcontroller 3 or stops the clock oscillation operation, thereby saving energy consumed by the electronic device.
There is a further advantage to detecting the potential difference between the base and the emitter of the PNP transistor 11. Namely, when the output voltage V1=24V, then even when the cover is opened, there is hardly any influence by the time constant of the electrolytic capacitor mounted to the load 5. Compared to the circuit illustrated in
It should be noted that the PNP transistor 11 may be destroyed by a short-circuit between its base and emitter. However, the voltage supply to the load 5 is lowered by connecting the resistors 12 and 13 in series, so that destruction by short-circuiting is suppressed. Thus, the base terminal, which is the second terminal, is coupled via the resistors 12, 13, which are a plurality of resistors, to the load side of the switch unit.
When the power of the image forming apparatus is turned on, the voltage that is supplied from the low-voltage power supply 2 may be unstable. This may lead to an erroneous open/close detection of the interlock switch 4 and the cover. To address this, the microcontroller 3 may skip, stop or delay the open/close detection of the interlock switch 4 until the voltage supplied from the low-voltage power supply 2 is stabilized. Thus, it is possible to reduce erroneous open/close detections of the interlock switch 4 and the cover when turning on the power of the image forming apparatus.
With this Embodiment 1, a configuration is employed, in which a potential difference between the power supply side and the load side of the interlock switch 4 is detected by a potential difference detection unit. Thus, it is possible to detect the open/closed state of the interlock switch 4 independently from the value of the voltage applied to the interlock switch 4 and from the clock oscillation state of the microcontroller 3 controlling the image forming apparatus.
Embodiment 2 is explained using
As shown in
Thus, the interrupt input port PI detects that the interlock switch 4 is open if the output voltage of the potential difference detection circuit 6 is “High”, and detects that the interlock switch 4 is closed if the output voltage of the potential difference detection circuit 6 is “Low”. When the circuit configuration in
With Embodiment 2, a circuit configuration is employed that detects the potential difference between the power supply side and the load side of the interlock switch 4 with a potential difference detection circuit 6 using a comparator circuit or the like. Thus, the open/closed state of the interlock switch 4 can be immediately detected independently from the voltage value applied to the interlock circuit 4 and from the clock oscillation state of the microcontroller 3 that controls the electronic device.
Embodiment 3 relates to another configuration example of an open/closed circuit of the interlock switch 4. As shown in
As shown in
The microcontroller 3 detects the voltage on the load side using the first detection circuit 7 when the electronic device in the standby state, and using the second detection circuit 8 when the electronic device is in the power saving state. As explained with regard to the related art, the first detection circuit and the second detection circuit each have advantages and disadvantages. In Embodiment 3, the disadvantages of each the first detection and the second detection circuit are respectively compensated by the advantages of the other. That is to say, it is a feature of Embodiment 3 that the microcontroller 3 uses either the first detection circuit 7 or the second detection circuit 8, depending on the operation state of the electronic device.
When the electronic device is in the standby state (V1=24V), then it is assumed that the interlock switch 4 is open. In this case, the microcontroller 3 detects the open state of the interlock switch 4 using the first detection circuit 7, that is, the first voltage division portion with the resistors 23 and 24. This first voltage division portion immediately lowers the output voltage V1=24V, which is the voltage on the load side, to the threshold voltage value of the digital input port PI1. Thus, the microcontroller 3 can detect the open state of the interlock switch 4 in a very short time.
Now, in the power saving state, in which the clock oscillation of the microcontroller 3 is stopped, the microcontroller 3 does not use the first detection circuit 7. Therefore, the digital input port PI1 does not necessarily have to be an interrupt input port. Moreover, the digital input port PI1 can also be replaced with an analog/digital input port AD. In a microcontroller 3 in which there is an unassigned analog/digital input port AD, this may lead to greater flexibility in assigning the ports.
As the microcontroller 3 controls the low-voltage power supply 2 and lowers the first output voltage V1 of the low-voltage power supply 2 until it is close to the second output voltage V2, the electronic device transitions from the standby state to the power saving state. It should be noted that the microcontroller 3 may also lower the clock oscillation frequency driving the controller or stop the clock oscillation operation driving the controller, when transitioning from the standby state to the power saving state.
Let us assume that the interlock switch 4 is open while the electronic device is in the power saving state (V1=3.3V). In this case, the microcontroller 3 detects the open state of the interlock switch 4 using a voltage converter including the second detection circuit 8, that is, the NPN transistor 27. As shown in
In the power saving state, for example the driving system unit, the high-voltage power supply, and the laser scanner of the image forming apparatus do not operate. For this reason, even when the detection of the open state of the interlock switch 4 takes time, there is no harmful effect due to these components operating unchecked.
Moreover, in the power saving state, the output voltage is V1=3.3V. As illustrated in
Thus, the circuit configuration of Embodiment 3, which uses both the first detection circuit 7 and the second detection circuit 8 functions regardless of whether the output voltage V1 is 24V or 3.3V. Furthermore, the detection signal that is output from the second detection circuit 8 can be processed digitally using the interrupt input port PI. That is to say, in the power saving state, the output voltage V1 is reduced to 3.3V, and it is possible to lower the clock oscillation frequency of the microcontroller 3 or stop the clock oscillation operation. Thus, the electronic device can be made a low power consumption electronic device.
With Embodiment 3, the open/closed state of the interlock switch 4 is detected using the first detection circuit 7, which detects the voltage on the load side of the interlock switch 4, and the second detection circuit 8, which detects the voltage on the load side of the interlock switch 4. Thus, it is possible to immediately detect the open/closed state of the interlock switch 4, independently from the value of the voltage applied to the interlock switch 4 and from the clock oscillation state of the microcontroller controlling the electronic device. It should be noted that it is possible to transition the electronic device from the power saving state to the standby state when the microcontroller 3 detects that the switch unit is open during the power saving state.
In an image forming section, the recording medium S, to which the developer image is transferred, is conveyed to the fixing device 108. The fixing device 108 includes a pressure application roller 109, a fixing film 110 and a ceramic heater 111 for fixing the toner to the recording medium. After fixing by applying pressure, the recording medium S is ejected out of the apparatus by ejection roller 112.
The cover 200 is a cover for maintenance. By opening the cover 200, a maintenance operator can access the fixing device 108, the photosensitive drum 107 and the laser scanner 104. The above-described interlock switch 4 is arranged such that it is interlocked to the opening and closing of the cover 200. It should be noted that the ceramic heater 111, the motor and gears driving the photosensitive drum 107, the laser scanner 104 and the high-voltage power supply, are also examples of the load 5.
In the embodiments, an image forming apparatus was employed as an example of an electronic device, but other electronic devices are also possible. This is because the technical idea of the present invention can be applied to any electronic device having an open/close cover, where the opening or closing of the cover is detected from the opening or closing of a switch. Also the image forming method of the image forming apparatus is not limited to electrophotographic imaging and may also be electrostatic recording, magnetic recording, inkjet printing, sublimation, offset printing or the like. Also the image forming apparatus may be a printing apparatus, a printer, a copier, a multifunctional device or a facsimile.
While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
This application claims the benefit of Japanese Patent Application Nos. 2010-139943, filed Jun. 18, 2010 and 2011-107639, filed May 12, 2011, which are hereby incorporated by reference herein in their entirety.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-139943 | Jun 2010 | JP | national |
| 2011-107639 | May 2011 | JP | national |
