“Reducing Memory Latency via Non-blocking and Prefetching Caches” Tien-Fu Chen and Jean-Loup Baer, 1992 Seattle, WA, Univ. of Washington, Dep. of Comp. Science.* |
“Evaluation of Multithreaded Uniprocessors for Commercial Application Environment”, Richard J. Eickemeyer, et al., 1996.* |
“Characterization of Alpha AXP Performance Using TP and SPEC Workload.” Zarka Cvetanovic et al., IEEE, 1994.* |
“Simultaneous Multithreading: A Platform For Next-Generation Processors”, Eggers, et al., Dept. of Computer Science and Engineering, Seattle, WA, pp. 1-15. |
Compilation Issues For A Simultaneous Multithreading Processor, Lo, et al., Dept. of Computer Science and Engineering, Seattle, WA, 2 pp. |
“Converting Thread-Level Parallelism To Instruction-Level Parallelism Via Simultaneous Multithreading”, Lo, et al., Dept. of Computer Science and Engineering, Seattle, WA, pp. 1-25. |
“Simultaneous Multithreading: Maximizing On-Chip Parallelism”, Tullsen, et al., Dept. of Computer Science and Engineering, Seattle, WA, pp. 1-12. |
“Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor”, Tullsen, et al., Dept. of Computer Science and Engineering, Seattle WA, pp. 1-12. |
Increasing Superscalar Performance Through Multistreaming:, Yamamoto, et al., Proceedings of the IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques, pp. 1-10. |