Claims
- 1. A method for fabricating a liquid crystal image display device comprising a first insulating substrate having plural scanning wirings, signal wirings and drain wirings and an insulated gate transistor and a pixel electrode provided for each pixel of said liquid crystal image display device, a second light-transmissive insulating substrate smaller than said first insulating substrate and having a transparent conductive counter electrode spaced apart from said first insulating substrate and liquid crystal filled between both substrates, said method comprising the steps of:
- (a) forming a coating of wiring material on said first insulating substrate;
- (b) forming on said coating of wiring material and not on said pixel electrode a pattern of photosensitive poly-imide resin to define a pattern of said signal wirings and said drain wirings;
- (c) selectively etching said coating of wiring material by using said pattern of said photosensitive poly-imide resin as a mask so as to form said drain wirings and said signal wirings; and
- (d) selectively removing a portion of said pattern of said photosensitive poly-imide resin that was formed on said first insulating substrate in step (b) from said first insulating substrate, said portion of said pattern being located around a periphery of said first insulating substrate, the selective removal of said portion of said pattern being performed by using said second light transmissive substrate as a mask through O.sub.2 plasma.
Priority Claims (2)
Number |
Date |
Country |
Kind |
1-017949 |
Jan 1989 |
JPX |
|
1-288368 |
Nov 1989 |
JPX |
|
Parent Case Info
This application is a continuation of application Ser. No. 840,000, filed Feb. 24, 1992 (abandoned) which is a division of application Ser. No. 467,548 filed Jan. 19, 1990 (U.S. Pat. No. 5,124,823).
US Referenced Citations (11)
Foreign Referenced Citations (12)
Number |
Date |
Country |
0193759 |
Sep 1986 |
EPX |
0271960 |
Jun 1988 |
EPX |
0304657 |
Mar 1989 |
EPX |
0068655 |
Jun 1979 |
JPX |
57-53966 |
Mar 1982 |
JPX |
0017720 |
Jan 1985 |
JPX |
61-67023 |
Apr 1986 |
JPX |
62-80629 |
Apr 1987 |
JPX |
62-136049 |
Jun 1987 |
JPX |
62-231224 |
Oct 1987 |
JPX |
62-122224 |
May 1988 |
JPX |
63-250155 |
Oct 1988 |
JPX |
Non-Patent Literature Citations (5)
Entry |
English Translation of Hara (61-67023). |
English Translation of Ooba et al (62-231224). |
English Translation of Shimoda (57-53966). |
Wolf et al, "Silicon Processing for the VLSI Era" vol. 1, 1986, pp. 428-429. |
Ghandhi, "VLSI Fabrication Principles", 1983, pp. 533, 541-548, 556-560. |
Divisions (1)
|
Number |
Date |
Country |
Parent |
467548 |
Jan 1990 |
|
Continuations (1)
|
Number |
Date |
Country |
Parent |
840000 |
Feb 1992 |
|