High Temperature Oxide For NVM Interpoly Dielectric Applications: J.A. Yater, B. Esho and W.M. Paulson; Mat. Res. Soc. Symp. Proc., vol. 532, 1998 Materials Research Society, pp. 153-158. |
Polyoxide Thinning Limitation and Superior ONO Interpoly Dielectric for Nonvolatile Memory Devices; Seiichi Mori, Norihisa Arai, Yukio Kaneko, and Kuniyoshi Yoshikawa; Feb. 1991; IEEE Transactions on Electron Devices, vol. 38, No. 2, pp. 270-277. |
High Speed Sub-halfmicron Flash Memory Technology with Simple Stacked Gate Structure Cell; Seiichi Mori, Eiji Sakagami, Yoshiko Yamaguchi, Eiji Kamiya, Masao Tanimoto, Hiroaki Tsunoda, Kiyoshi Hisatomi, Hidemitsu Egawa, Norihisa Arai, Yohei Hiura, Kuniyoshi Yoshikawa and Kazuhiko Hashimoto; 1994 Symposium on VLSI Technology Digest Technical Papers, 1994 IEEE, pp. 53-54. |
Ono Inter-Poly Dielectric Scaling for Nonvolatile Memory Applications; Seiichi Mori, Eiji Sakagami, Hitoshi Araki, Yukio Kaneko, Kazuhito Narita, Yoichi Ohshima, Noihisa Arai, and Kuniyoshi Yoshikawa; Feb. 1991; IEEE Transactions on Electron Devices, vol. 38, No. 2, pp. 386-391. |
Scaling of Tunnel Oxide Thickness for Flash EEPROMs Realizing Stress-Induced Leakage Current Reduction; H. Watanabe, S. Aritome, G. J. Hemink, T. Maruyama and R. Shirota; 1994 Symposium on VLSI Technology Digest of Technical Papers, 1994 IEEE, pp. 47-48. |