Patent Grant
9219159
1. Field of the Invention
The present invention relates to a method for forming an oxide semiconductor film and a method for manufacturing a semiconductor device with use of the method for forming an oxide semiconductor film.
In this specification, a semiconductor device generally refers to a device which can function by utilizing semiconductor characteristics; an electro-optical device, a semiconductor circuit, and an electronic device are all included in the category of the semiconductor device.
2. Description of the Related Art
In recent years, transistors which are used for many liquid crystal display devices and light-emitting display devices typified by flat panel displays have been formed over glass substrates and using a silicon semiconductor such as amorphous silicon or polycrystalline silicon.
Instead of the silicon semiconductor, a technique in which an oxide semiconductor that is a metal oxide having semiconductor characteristics is used for transistors has attracted attention.
For example, techniques in which a transistor manufactured using zinc oxide which is a single-component metal oxide or an In—Ga—Zn—O-based oxide which is a homologous compound as an oxide semiconductor is used as a switching element or the like of a pixel of a display device, is disclosed (see Patent Document 1 to Patent Document 3).
When an oxide semiconductor film is formed, hydrogen that is not a constituent element of the oxide semiconductor film enters the oxide semiconductor film in some cases. Part of hydrogen in the oxide semiconductor film serves as a donor to cause generation of electrons that are carriers, which increases conductivity of the oxide semiconductor film. As described above, when hydrogen enter the oxide semiconductor film and conductivity is increased, a problem arises in semiconductor characteristics of the oxide semiconductor film.
For example, in a transistor in which an oxide semiconductor film including hydrogen and having increased conductivity is used for a channel formation region, the following problem occurs: the threshold voltage is shifted in the negative direction, and accordingly the drain current flows in a state where no voltage is applied to a gate electrode (Vgs=0 V). Note that in this specification, the drain current refers to a current flowing between a source electrode and a drain electrode. Furthermore, in this specification, the phenomenon in which the drain current flows in a state where no voltage is applied to the gate electrode (Vgs=0 V) is called normally-on.
In view of the above problem, an object of one embodiment of the present invention is to provide a method for forming an oxide semiconductor film having favorable semiconductor characteristics. Further, another object is to provide a method for manufacturing a semiconductor device having favorable electric characteristics, with use of the oxide semiconductor film.
The technical idea of the present invention is to release hydrogen included in the oxide semiconductor film by heat treatment and to transfer the hydrogen to a hydrogen capture film through a hydrogen permeable film. Note that the hydrogen is captured in the hydrogen capture film.
One embodiment of the present invention is a method for forming an oxide semiconductor film including the steps of forming an oxide semiconductor film, forming a film which is over and in contact with the oxide semiconductor film and through which hydrogen diffuses (a hydrogen permeable film), forming a film which is over and in contact with the hydrogen permeable film and captures the hydrogen (a hydrogen capture film), and releasing the hydrogen from the oxide semiconductor film by performing heat treatment.
Another embodiment of the present invention is a method for forming an oxide semiconductor film including the steps of forming an oxide semiconductor film, forming a hydrogen permeable film including an oxide to be over and in contact with the oxide semiconductor film, forming a hydrogen capture film which is over and in contact with the hydrogen permeable film, and releasing hydrogen from the oxide semiconductor film and supplying oxygen from the hydrogen permeable film to the oxide semiconductor film by performing heat treatment.
In the above process, after the heat treatment is performed, the hydrogen permeable film and the hydrogen capture film can be removed. Note that even after the hydrogen permeable film and the hydrogen capture film are removed, the amount of hydrogen contained in the oxide semiconductor film is small as long as the heat treatment has been performed.
A main component which is a metal element included in the hydrogen capture film is the same as a main component which is a metal element included in the oxide semiconductor film. The hydrogen permeable film does not include the metal element as a main component.
In the above, the hydrogen permeable film can be a silicon oxide film or a silicon oxynitride film, and the hydrogen capture film can be an oxiynitride film including indium (In). Note that in this specification, a silicon oxynitride film indicates a film in which the amount of oxygen is larger than that of nitrogen. Further, in this specification, an oxynitride film including In indicates a film in which In is contained and the amount of oxygen is larger than that of nitrogen, and particularly indicates a film formed by nitriding an oxide material.
That is, another embodiment of the present invention is a method for forming an oxide semiconductor film including the steps of forming an oxide semiconductor film, forming a silicon oxide film or a silicon oxynitride film over and in contact with the oxide semiconductor film, forming an oxynitride film including In over and in contact with the silicon oxide film or the silicon oxynitride film, and releasing hydrogen from the oxide semiconductor film by performing heat treatment.
The oxide semiconductor film can be formed using an In—Ga—Zn—O-based material which is a three-component metal oxide, and the oxynitride film including In can be formed by nitriding the In—Ga—Zn—O-based material. Note that in this specification, an oxide semiconductor film formed using an In—Ga—Zn—O-based material is referred to as an IGZO film (In—Ga—Zn—O film), and an oxynitride film formed by nitriding the In—Ga—Zn—O-based material is referred to as an IGZON film (In—Ga—Zn—O—N film).
Further, it is preferable that the hydrogen permeable film be formed thin so that hydrogen released from the oxide semiconductor film by heat treatment efficiently diffuses (penetrates). Specifically, in the case where the hydrogen permeable film is a silicon oxide film or a silicon oxynitride film, the film thickness is greater than or equal to 0.5 nm and less than or equal to 15 nm, preferably greater than or equal to 2 nm and less than or equal to 5 nm.
Further, by applying the method for forming the oxide semiconductor film from which hydrogen is released, a semiconductor device can be manufactured.
According to one embodiment of the present invention, a method for forming an oxide semiconductor film in which the amount of hydrogen contained can be reduced and which has favorable semiconductor characteristics can be provided. In addition, with use of the oxide semiconductor film, a method for manufacturing a semiconductor device having favorable electric characteristics can be provided.
Embodiments of the present invention will be described below with reference to the accompanying drawings. However, the invention is not limited to the description below, and it is easily understood by those skilled in the art that the mode and detail can be changed in various ways unless departing from the scope and spirit of the present invention. Therefore, the invention should not be construed as being limited to the description in the following embodiments. Note that the same portions or portions having the same function in the structure of the present invention described below are denoted by the same reference numerals in common among different drawings and repetitive description thereof will be omitted.
Note that in each drawing described in this specification, the size, the film thickness, or the region of each component is exaggerated for clarity in some cases. Therefore, embodiments of the present invention are not limited to such scales.
Note that terms such as “first”, “second”, and “third” in this specification are used in order to avoid confusion among components, and the terms do not limit the components numerically. Therefore, for example, the term “first” can be replaced with the term “second”, “third”, or the like as appropriate.
Note that functions of “source” and “drain” may be switched to each other in the case where a direction of a current flow is changed during circuit operation, for example. Therefore, the terms “source” and “drain” can be used to denote the drain and the source, respectively, in this specification.
In this specification, in the case where etching is performed using a resist mask, the resist mask is removed after the etching even there is no description of removal of the resist mask in this specification.
Note that in this specification, “on-state current” is current which flows between a source and a drain when a transistor is in a conduction state. For example, in the case of an n-channel thin film transistor, the on-state current is current which flows between a source and a drain when the gate voltage (a difference between a source potential and a gate potential when the potential of the source is used as a reference potential) of the transistor is higher than the threshold voltage thereof. In addition, “off-state current” is current which flows between a source and a drain without intention when a transistor is in a non-conduction state. For example, in the case of an n-channel thin film transistor, the off-state current is current which flows between a source and a drain when the gate voltage of the transistor is lower than the threshold voltage thereof.
(Embodiment 1)
In this embodiment, a method for forming an oxide semiconductor film of one embodiment of the present invention will be described. Specifically, a method for forming an oxide semiconductor film from which hydrogen is released will be described with reference to
There is no particular limitation on a material and the like of a substrate 101 as long as the material has heat resistance high enough to withstand at least heat treatment performed later. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like can be used as the substrate 101. Further alternatively, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon, silicon carbide, or the like, a compound semiconductor substrate made of silicon germanium or the like, an SOI substrate, or the like may be used as the substrate 101. Furthermore, any of these substrates provided with a semiconductor element may be used as the substrate 101. Moreover, a substrate which is formed using a metal material to have conductivity and on which an insulating film is formed may be used.
A flexible substrate may also be used as the substrate 101. In the case where a transistor is provided over a flexible substrate, an oxide semiconductor film according to one embodiment of the present invention may be directly formed on the flexible substrate. Alternatively, an oxide semiconductor film which has been formed over another substrate (substrate different from the flexible substrate) may be separated and transferred to the flexible substrate. Note that in order to separate the oxide semiconductor film and transfer it to the flexible substrate, it is preferable that a region where separation easily occurs be provided between the different substrate and the oxide semiconductor film.
Next, an oxide semiconductor film 103 is formed over the substrate 101 (see
The oxide semiconductor film 103 may be a c-axis aligned crystalline oxide semiconductor (CAAC-OS) film.
The CAAC-OS film is not completely single crystal nor completely amorphous. The CAAC-OS film is an oxide semiconductor film with a crystal-amorphous mixed phase structure where crystal parts and amorphous parts are included in an amorphous phase. Note that in most cases, the crystal part fits inside a cube whose one side is less than 100 nm. From an observation image obtained with a transmission electron microscope (TEM), a boundary between an amorphous part and a crystal part in the CAAC-OS film is not clear. Further, with the TEM, a grain boundary in the CAAC-OS film is not found. Thus, in the CAAC-OS film, a reduction in electron mobility, due to the grain boundary, is suppressed.
In each of the crystal parts included in the CAAC-OS film, a c-axis is aligned in a direction parallel to a normal vector of a surface where the CAAC-OS film is formed or a normal vector of a surface of the CAAC-OS film, triangular or hexagonal atomic arrangement which is seen from the direction perpendicular to the a-b plane is formed, and metal atoms are arranged in a layered manner or metal atoms and oxygen atoms are arranged in a layered manner when seen from the direction perpendicular to the c-axis. Note that, among crystal parts, the directions of the a-axis and the b-axis of one crystal part may be different from those of another crystal part. In this specification, a simple term “perpendicular” includes a range from 85° to 95°. In addition, a simple term “parallel” includes a range from −5° to 5°.
In the CAAC-OS film, distribution of crystal parts is not necessarily uniform. For example, in the formation process of the CAAC-OS film, in the case where crystal growth occurs from a surface side of the oxide semiconductor film, the proportion of crystal parts in the vicinity of the surface of the oxide semiconductor film is higher than that in the vicinity of the surface where the oxide semiconductor film is formed in some cases. Further, when an impurity is added to the CAAC-OS film, the crystal part in a region to which the impurity is added becomes amorphous in some cases.
Since the c-axes of the crystal parts included in the CAAC-OS film are aligned in the direction parallel to a normal vector of a surface where the CAAC-OS film is formed or a normal vector of a surface of the CAAC-OS film, the directions of the c-axes may be different from each other depending on the shape of the CAAC-OS film (the cross-sectional shape of the surface where the CAAC-OS film is formed or the cross-sectional shape of the surface of the CAAC-OS film). Note that when the CAAC-OS film is formed, the direction of c-axis of the crystal part is the direction parallel to a normal vector of the surface where the CAAC-OS film is formed or a normal vector of the surface of the CAAC-OS film. The crystal part is formed by film formation or by performing treatment for crystallization such as heat treatment after film formation.
With use of the CAAC-OS film in a transistor, change in electric characteristics of the transistor due to irradiation with visible light or ultraviolet light can be reduced. Thus, the transistor has high reliability.
Note that part of oxygen included in the oxide semiconductor film may be substituted with nitrogen.
The oxide semiconductor film 103 may be formed by a sputtering method, a molecular beam epitaxy method, an atomic layer deposition method, or a pulsed laser deposition method. In consideration of the type of film to be formed and the formation time thereof, the oxide semiconductor film 103 may be formed to have a desired thickness.
As a metal oxide having semiconductor characteristics which can be used for the oxide semiconductor film 103, the following materials can be given. For example, a four-component metal oxide such as an In—Sn—Ga—Zn—O-based material; a three-component metal oxide such as an In—Ga—Zn—O-based material, an In—Sn—Zn—O-based material, an In—Al—Zn—O-based material, a Sn—Ga—Zn—O-based material, an Al—Ga—Zn—O-based material, or a Sn—Al—Zn—O-based material; a two-component metal oxide such as an In—Zn—O-based material, a Sn—Zn—O-based material, an Al—Zn—O-based material, a Zn—Mg—O-based material, a Sn—Mg—O-based material, an In—Mg—O-based material, or an In—Ga—O-based material; a single-component metal oxide such as an In—O-based material, a Sn—O-based material, or a Zn—O-based material; or the like may be used. Here, for example, an In—Ga—Zn—O-based material means oxide containing indium (In), gallium (Ga), and zinc (Zn), and there is no particular limitation on the composition ratio.
In the case where an In—Ga—Zn—O-based material is used for the oxide semiconductor film 103, a material with a composition ratio where In2O3:Ga2O3:ZnO=1:1:1 [molar ratio] can be used as an example of a metal oxide target containing In, Ga, and Zn. Alternatively, a target having a composition ratio where In2O3:Ga2O3:ZnO=1:1:2 [molar ratio], a target having a composition ratio where In2O3:Ga2O3:ZnO=1:1:4 [molar ratio], or a target having a composition ratio where In2O3:Ga2O3:ZnO=2:1:8 [molar ratio] can be used.
In the case where an In—Zn—O-based material is used as the oxide semiconductor film 103, the atomic ratio of In to Zn is higher than or equal to 0.5 and lower than or equal to 50, preferably higher than or equal to 1 and lower than or equal to 20, further preferably higher than or equal to 1.5 and lower than or equal to 15. When the atomic ratio of In to Zn is in the above range, the field-effect mobility of the transistor 100 can be improved. Here, when the atomic ratio of the compound is In:Zn:O=X:Y:Z, the relation Z>1.5X+Y is preferably satisfied.
Further, the In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn. For example, a material represented by a chemical formula, InMO3(ZnO)m (m>0) may be used as the oxide semiconductor film 103. Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. For example, M may be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like.
Note that the same metal element as a metal element for forming the oxide semiconductor film 103 is preferably included in a hydrogen capture film that is formed later, and further, the hydrogen capture film is preferably an oxynitride film including In. Thus, as the oxide semiconductor film 103 in this embodiment, an IGZO film is formed using an In—Ga—Zn—O-based material by a sputtering method.
Although hydrogen in the oxide semiconductor film 103 can be removed by heat treatment performed later, the concentration of hydrogen contained in the oxide semiconductor film 103 is preferably reduced as much as possible when the oxide semiconductor film 103 is formed. Specifically, when the oxide semiconductor film 103 is formed by a sputtering method, for reducing the hydrogen concentration, oxygen, a high-purity rare gas (typically, argon) from which impurities such as hydrogen, water, a hydroxyl group, or a hydride is removed, or a mixed gas of the rare gas and oxygen may be used as appropriate as an atmosphere gas supplied to a treatment chamber of a sputtering apparatus. Furthermore, for evacuation of the treatment chamber, a combination of a cryopump having high capability in evacuating water and a sputter ion pump having high capability in evacuating hydrogen may be used.
With use of the above sputtering apparatus and the sputtering method, the oxide semiconductor film 103 in which the amount of contained hydrogen is small can be formed. Note that even when the sputtering apparatus and the sputtering method are used, the oxide semiconductor film 103 contains more than a little nitrogen. For example, the nitrogen concentration of the oxide semiconductor film 103, which is measured by secondary ion mass spectrometry (SIMS) is lower than 5×1018 cm−3.
A hydrogen permeable film 105 is formed over the oxide semiconductor film 103. The hydrogen permeable film 105 functions as a film through which hydrogen released from the oxide semiconductor film 103 by heat treatment performed later diffuses (penetrates). The hydrogen permeable film 105 may be a conductive film, an insulating film, or a semiconductor film for example as long as it can have the above function. As a method for forming the hydrogen permeable film 105, in addition to a method such as a sputtering method which can be used for formation of the oxide semiconductor film 103, a plasma CVD method may be used.
Here, a state in which the amount of oxygen is small as compared with oxygen of the stoichiometric proportion in the oxide semiconductor, i.e., oxygen deficiency in the oxide semiconductor, is described. During or after formation of an oxide semiconductor film, electric charge is generated owing to oxygen deficiency in the oxide semiconductor film in some cases. Part of oxygen deficienciy (vacancies) in the oxide semiconductor generally serves as a donor, which causes generation of electrons serving as a carrier and results in an increase of conductivity of the formed oxide semiconductor film. Accordingly, semiconductor characteristics of the formed oxide semiconductor film are degraded.
Thus, a film including oxide is used for the hydrogen permeable film 105, whereby oxygen can be supplied from the hydrogen permeable film 105 to the oxide semiconductor film 103 by heat treatment which is performed later for releasing hydrogen from the oxide semiconductor film 103. By supplying oxygen to the oxide semiconductor film 103, oxygen deficiency in the oxide semiconductor film 103 is reduced and generation of electrons serving as a carrier is suppressed accordingly. Specifically, a silicon oxide film or a silicon oxynitride film can be used as the film including oxide.
Further, it is preferable that the hydrogen permeable film 105 be formed thin so that hydrogen released from the oxide semiconductor film 103 by heat treatment performed later efficiently diffuses (penetrates). Specifically, in the case where the hydrogen permeable film 105 is a silicon oxide film or a silicon oxynitride film, the thickness may be greater than or equal to 0.5 nm and less than or equal to 15 nm, preferably greater than or equal to 2 nm and less than or equal to 5 nm.
Note that in this embodiment, as the hydrogen permeable film 105, a silicon oxide film is formed to a thickness of 5 nm by a sputtering method.
Next, a hydrogen capture film 107 is formed over the hydrogen permeable film 105. The structure obtained through the steps up to here is illustrated in
The hydrogen capture film 107 is preferably an oxynitride film including In. Specifically, the oxynitride film including In is a film formed using at least indium nitride and one or more materials of indium oxide, gallium oxide, zinc oxide, tin oxide, aluminum oxide, tungsten oxide, molybdenum oxide, titanium oxide, tantalum oxide, and silicon oxide. Further, the nitrogen concentration in the hydrogen capture film 107 is higher than or equal to 0.01 at. % and lower than or equal to 20 at. %. The nitrogen concentration can be quantified by X-ray photoelectron spectroscopy (XPS).
Further, the hydrogen capture film 107 is not limited to a semiconductor film as long as it is a film functioning to capture hydrogen which has been diffused (penetrated) through the hydrogen permeable film 105. A conductive film, or an insulating film can be used, for example.
In the case where the oxynitride film including In used for the hydrogen capture film 107 is formed by a sputtering method, a target including at least indium oxide is used and a nitriding gas is supplied. As the target, in addition to indium oxide, a material including at least one of gallium oxide, zinc oxide, tin oxide, aluminum oxide, tungsten oxide, molybdenum oxide, titanium oxide, tantalum oxide, and silicon oxide may be used. The nitriding gas contains at least nitrogen and may further contain at least one of a rare gas (such as helium, neon, argon, krypton, or xenon) and oxygen, in addition to nitrogen.
In particular, a main component of metal elements included in the oxide semiconductor film 103 may be the same as a main component of metal elements included in the hydrogen capture film 107. The hydrogen capture film 107 preferably contains a component of metal elements included in the oxide semiconductor film 103. Thus, the hydrogen capture film 107 can be formed using a metal oxide material the same as that included in the oxide semiconductor film 103. Therefore, in the case where the oxide semiconductor film 103 is the IGZO film, the hydrogen capture film 107 can be an IGZON film. Note that the IGZON film can be obtained by sputtering an IGZO target with a gas containing nitrogen supplied in a treatment chamber of an apparatus for formation of the IGZO film.
Further, in consideration of the type of film to be formed and the formation time thereof, the hydrogen capture film 107 may be formed to have a desired thickness. However, the hydrogen capture film 107 is preferably formed thick enough to efficiently capture hydrogen released from the oxide semiconductor film 103. Specifically, the thickness thereof may be greater than or equal to 10 nm and less than or equal to 500 nm.
Note that in this embodiment, as the hydrogen capture film 107, an IGZON film is formed to a thickness of 300 nm by a sputtering method.
The oxide semiconductor film 103, the hydrogen permeable film 105, and the hydrogen capture film 107 may be formed successively in vacuum. For example, after impurities including hydrogen attached on a surface of the substrate 101 is removed by heat treatment or plasma treatment, the oxide semiconductor film 103 may be formed without being exposed to air and continuously, the hydrogen permeable film 105 and the hydrogen capture film 107 may also be formed without being exposed to air. By successive film formation as the above, impurities including hydrogen attached on the surface of the substrate 101 is reduced, and attachment of an atmospheric component on an interface between the substrate 101 and the oxide semiconductor film 103, an interface between the oxide semiconductor film 103 and the hydrogen permeable film 105, and an interface between the hydrogen permeable film 105 and the hydrogen capture film 107 can be suppressed. As a result, hydrogen released from the oxide semiconductor film 103 by heat treatment performed later can be efficiently made to diffuse (penetrate) and captured.
Next, heat treatment is performed on a structure obtained through the steps up to here. By performing heat treatment, hydrogen included in the oxide semiconductor film 103 can be released. The released hydrogen penetrates the hydrogen permeable film 105 and is captured by the hydrogen capture film 107. In other words, by performing the heat treatment, hydrogen included in the oxide semiconductor film 103 can be transferred to the hydrogen capture film 107. Therefore, by the heat treatment, a highly purified oxide semiconductor film 109 in which the hydrogen concentration is reduced is formed. The structure obtained through the steps up to here is illustrated in
In addition, the hydrogen permeable film 105 is formed between the oxide semiconductor film 103 and the hydrogen capture film 107, whereby the oxide semiconductor film 103 and the hydrogen capture film 107 are provided separately from each other. For example, in the case where the hydrogen capture film 107 is provided directly on the oxide semiconductor film 103, some of hydrogen released from the oxide semiconductor film 103 by heat treatment is left at an interface between the oxide semiconductor film 103 and the hydrogen capture film 107 without being captured by the hydrogen capture film 107, in some cases. However, when the hydrogen permeable film 105 is provided between the oxide semiconductor film 103 and the hydrogen capture film 107, hydrogen released from the oxide semiconductor film 103 by heat treatment can be transferred to the hydrogen capture film 107 without being left in the oxide semiconductor film 103, and accordingly the hydrogen concentration in the oxide semiconductor film 103 can be sufficiently reduced.
The temperature of the heat treatment is higher than 450° C. and lower than the strain point of the substrate 101, preferably, higher than or equal to 500° C. and lower than the strain point of the substrate 101, further preferably higher than or equal to 550° C. and lower than the strain point of the substrate 101. As the temperature is increased, the amount of hydrogen released from the oxide semiconductor film 103 is increased. Further, as the thickness of the oxide semiconductor film 103 formed over the substrate 101 is decreased, the temperature can be lowered.
There is no particular limitation on a heat treatment apparatus used for the heat treatment, and the apparatus may be provided with a device for heating an object to be processed by heat radiation or heat conduction from a heating element such as a resistance heating element. For example, an electric furnace, or a rapid thermal annealing (RTA) apparatus such as a gas rapid thermal annealing (GRTA) apparatus or a lamp rapid thermal annealing (LRTA) apparatus can be used. An LRTA apparatus is an apparatus for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. A GRTA apparatus is an apparatus for heat treatment using a high-temperature gas.
The hydrogen concentration of the oxide semiconductor film 109 formed by the heat treatment is lower than 1×1019 cm−3, preferably lower than or equal to 5×1018 cm−3. Note that the hydrogen concentration in the oxide semiconductor film 109 is a value that can be quantified by SIMS. In the oxide semiconductor film 109, the amount of hydrogen serving as a donor is reduced, and generation of electrons serving as a carrier is suppressed; thus the oxide semiconductor film 109 has favorable semiconductor characteristics.
Further, when the oxide semiconductor film 109 obtained by the above method is applied to a semiconductor device, e.g., a channel formation region of a transistor, the hydrogen permeable film 105 and the hydrogen capture film 107 are removed as illustrated in
Furthermore, a main component of metal elements included in the hydrogen capture film 107 may be the same component as a main component of metal elements included in the oxide semiconductor film 109, and the hydrogen capture film 107 and the oxide semiconductor film 109 can be formed using the same metal oxide material. Thus, in etching, the etching rate of the hydrogen capture film 107 and the etching rate of the oxide semiconductor film 109 are comparable to each other. However, constituent elements of the hydrogen permeable film 105 and the hydrogen capture film 107 are different from each other, and the constituent elements of the hydrogen permeable film 105 and the oxide semiconductor film 109 are different from each other. Thus, the etching rate of the hydrogen permeable film 105 and the etching rate of the hydrogen capture film 107 are different from each other, and the etching rate of the hydrogen permeable film 105 and the etching rate of the oxide semiconductor film 109 are different from each other. Therefore, when the hydrogen permeable film 105 and the hydrogen capture film 107 are removed, the etching selectivity of the hydrogen capture film 107 to the oxide semiconductor film 109 can be high. As a result, without excessive etching of the oxide semiconductor film 109, the hydrogen permeable film 105 and the hydrogen capture film 107 can be removed.
Specifically, in the case where the hydrogen permeable film 105, the hydrogen capture film 107, and the oxide semiconductor film 109 are respectively a silicon oxide film, an IGZON film, and an IGZO film, event though the etching rate of the IGZON film and the etching rate of the IGZO film are comparable to each other, the etching rate of the silicon oxide film and the etching rate of the IGZO film are different; thus, the etching selectivity of the silicon oxide film to the IGZO film can be high. As a result, without excessive etching of the IGZO film, the silicon oxide film and the IGZON film can be removed.
Here, a method for forming a CAAC-OS film as the oxide semiconductor film 103 is described.
As a method for forming a CAAC-OS film, there are two methods as follows. One of the methods is that formation of an oxide semiconductor film is performed once while the substrate is heated (a method (1)). The other of the methods is that a formation of the oxide semiconductor film is performed twice, and heat treatment is performed after each formation of the oxide semiconductor film (a method (2)).
First, the case where a CAAC-OS film is formed with use of the method (1) is described.
Over the substrate 101, the oxide semiconductor film 103 is formed while the substrate 101 is heated. Note that the oxide semiconductor film 103 may be formed as described above by a sputtering method, a molecular beam epitaxy method, an atomic layer deposition method, or a pulsed laser deposition method.
The temperature at which the substrate 101 is heated is set so that the temperature of the substrate 101 is higher than or equal to 150° C. and lower than or equal to 450° C., and preferably the temperature of the substrate 101 is higher than or equal to 200° C. and lower than or equal to 350° C.
The temperature of the substrate 101 is made high while the oxide semiconductor film 103 is formed, whereby the oxide semiconductor film 103 can be a CAAC-OS film in which the ratio of a crystal part to an amorphous part is high.
Next, the case where a CAAC-OS film is formed with use of the method (2) is described.
While the temperature of the substrate 101 is kept at a temperature higher than or equal to 200° C. and lower than or equal to 400° C., an oxide semiconductor film as a first layer (first oxide semiconductor film) is formed over the substrate 101, and then heat treatment is performed at a temperature higher than or equal to 550° C. and lower than the strain point of the substrate 101 in an atmosphere of nitrogen, oxygen, a rare gas, or dry air. By the heat treatment, a crystalline region (including plate-like crystal) is formed in a region including a top surface of the first oxide semiconductor film. Then, an oxide semiconductor film as a second layer (a second oxide semiconductor film) is formed thicker than the first oxide semiconductor film. After that, heat treatment is performed again at a temperature higher than or equal to 550° C. and lower than the strain point of the substrate 101. By the heat treatment, crystal growth occurs upwardly with use of the first oxide semiconductor film including a crystalline region (including plate-like crystal) as a seed for the crystal growth, and accordingly the whole region including a top surface of the second oxide semiconductor film is crystallized. Note that the first oxide semiconductor film and the second oxide semiconductor film may be formed using the above-described metal oxide material which can be applied to the oxide semiconductor film 103. The thickness of the first oxide semiconductor film is preferably greater than or equal to 1 nm and less than or equal to 10 nm.
As described above, a hydrogen permeable film and a hydrogen capture film are formed over an oxide semiconductor film, and hydrogen is released from the oxide semiconductor film by performing heat treatment and is further captured by the hydrogen capture film, whereby an oxide semiconductor film in which the hydrogen concentration is lowered can be formed. That is, with use of the formation method described in this embodiment, an oxide semiconductor film having favorable semiconductor characteristics can be obtained.
Note that the structure described in this embodiment can be used in appropriate combination with structures described in the other embodiments and example of this specification.
(Embodiment 2)
In this embodiment, a method for manufacturing a semiconductor device, to which the method for forming an oxide semiconductor film described in Embodiment 1 is applied, will be described. Here, a method for manufacturing a transistor is described as an example.
There is no particular limitation on a structure of a transistor to which the method for forming an oxide semiconductor film described in Embodiment 1 is applied. Any of a top gate structure, a bottom gate structure or a dual gate structure can be employed. Specifically, any of a top-gate top-contact structure, a top-gate bottom-contact structure, a bottom-gate top-contact structure, or a bottom-gate bottom-contact structure can be employed.
In this embodiment, as an example, the case where the method for forming an oxide semiconductor film described in Embodiment 1 is applied to a top-gate top-contact transistor is described. Note that the transistor is referred to as a transistor 100, and a structure and a manufacturing method of the transistor 100 will be described with the reference numerals used in Embodiment 1 as appropriate.
In the transistor 100, a base insulating film 102 is provided over the substrate 101, an oxide semiconductor film 111 is provided over the base insulating film 102, a source electrode 112a and a drain electrode 112b are provided to be in contact with part of top and side surfaces of the oxide semiconductor film 111, a gate insulating film 114 is provided over the oxide semiconductor film 111, the source electrode 112a, and the drain electrode 112b, and a gate electrode 116 is provided over the gate insulating film 114 to overlap with the oxide semiconductor film 111. Note that the base insulating film 102 and the gate insulating film 114 are not illustrated in
A method for manufacturing the transistor 100 is described with reference to
The substrate 101 is similar to that of Embodiment 1, and the substrate 101 is a glass substrate here.
Next, the base insulating film 102 is formed over the substrate 101. The base insulating film 102 is formed to have a single-layer structure or a stacked-layer structure using any of materials described below. The base insulating film 102 can be formed by a sputtering method, a CVD method, a coating method, or the like. Note that the thickness of the base insulating film 102 is preferably, but not limited to, greater than or equal to 50 nm. The base insulating film 102 prevents diffusion of impurities (e.g., an alkali metal such as Li or Na) from the substrate 101 and etching of the substrate 101 in an etching step in a manufacturing process of the transistor 100.
As a material of the base insulating film 102, any of insulating films selected from oxide insulating films such as a silicon oxide film, a gallium oxide film, and an aluminum oxide film; nitride insulating films such as a silicon nitride film and an aluminum nitride film; a silicon oxynitride film; an aluminum oxynitride film; and a silicon nitride oxide film can be used. Note that the base insulating film 102 preferably contains oxygen in a portion in contact with the oxide semiconductor film 109 formed later.
In this specification, silicon oxynitride refers to a substance that contains more oxygen than nitrogen. Further, silicon nitride oxide refers to a substance that contains more nitrogen than oxygen.
An aluminum nitride film, an aluminum nitride oxide film, and a silicon nitride film which have high thermal conductivity are particularly effective in improving thermal dissipation of the transistor 100 when used for the base insulating film 102.
Since an alkali metal such as Li or Na is an impurity in the manufacturing process of the transistor 100, the amount thereof is preferably small. In the case where a glass substrate containing an impurity such as an alkali metal is used as the substrate 101, the above nitride insulating film is preferably formed as the base insulating film 102 in order to prevent entry of an alkali metal.
Since the base insulating film 102 preferably contains oxygen in a portion in contact with the oxide semiconductor film 109 formed later, in the case where any of the nitride insulating film is used for the base insulating film 102, a stacked structure may be formed by forming any of the oxide insulating film over the nitride insulating film.
In addition, since the base insulating film 102 preferably contains oxygen in a portion in contact with the oxide semiconductor film 109 formed later, an insulating film from which oxygen is released by heating may be used as the base insulating film 102. Note that the expression “oxygen is released by heating” means that the amount of released oxygen which is converted into oxygen atoms is greater than or equal to 1.0×1018 cm−3, preferably greater than or equal to 3.0×1020 cm−3, in thermal desorption spectrometry (TDS) analysis.
A method for quantifying the amount of released oxygen which is converted into oxygen atoms, with the use of TDS analysis is described below.
The amount of released gas in TDS analysis is proportional to the integral value of ion intensity. Therefore, the amount of released gas can be calculated from the ratio between the integral value of a measured ion intensity and the reference value of a standard sample. The reference value of a standard sample refers to the ratio of the predetermined density of atoms contained in the sample to the integral value of an ion intensity.
For example, the number of the released oxygen molecules (NO2) from an insulating film can be found according to Numerical Expression 1 with the TDS analysis results of a silicon wafer containing hydrogen at a predetermined density which is the standard sample and the TDS analysis results of the insulating film. Here, all ion intensity at a mass number of 32 which are obtained by the TDS analysis are assumed to originate from an oxygen molecule. CH3OH, which is given as a gas having a mass number of 32, is not taken into consideration on the assumption that it is unlikely to be present. Further, an oxygen molecule including an oxygen atom having a mass number of 17 or 18 which is an isotope of an oxygen atom is not taken into consideration either because the proportion of such a molecule in the natural world is minimal.
NO2=NH2/SH2×SO2×α (Numerical Expression 1)
NH2 is the value obtained by conversion of the number of hydrogen molecules desorbed from the standard sample into densities. SH2 is the integral value of ion intensity when the standard sample is subjected to TDS analysis. Here, the reference value of the standard sample is set to NH2/SH2. SO2 is the integral value of ion intensity when the insulating film is subjected to TDS analysis. α is a coefficient affecting the ion intensity in the TDS analysis. Japanese Published Patent Application No. H6-275697 can be referred to for details of Numerical Expression 1. Note that the above value of the amount of released oxygen is obtained by measurement with a thermal desorption spectrometer produced by ESCO Ltd., EMD-WA1000S/W using a silicon wafer containing hydrogen atoms at 1×1016 cm−3 as the standard sample.
Further, in the TDS analysis, part of released oxygen is detected as an oxygen atom. The ratio between oxygen molecules and oxygen atoms can be calculated from the ionization rate of the oxygen molecules. Note that, since the above a includes the ionization rate of the oxygen molecules, the number of the released oxygen atoms can also be estimated through the evaluation of the number of the released oxygen molecules.
Note that NO2 is the number of the released oxygen molecules. In the insulating film, the amount of released oxygen when converted into oxygen atoms is twice the number of the released oxygen molecules.
As an example of the insulating film from which oxygen is released by heating, a film of oxygen-excess silicon oxide (SiOX(X>2)) is given. In the oxygen-excess silicon oxide (SiOX(X>2)), the number of oxygen atoms per unit volume is more than twice the number of silicon atoms per unit volume. The number of silicon atoms and the number of oxygen atoms per unit volume are measured by Rutherford backscattering spectrometry. Note that in this embodiment, a film of oxygen-excess silicon oxide described above is used as the base insulating film 102.
Next, the oxide semiconductor film 109 is formed over the base insulating film 102. As the oxide semiconductor film 109, an IGZO film is formed by the formation method described in Embodiment 1 (see
In the oxide semiconductor film 109 (that is to be the oxide semiconductor film 111 later), hydrogen is released by heat treatment (referred to as a first heat treatment for convenience) as described in Embodiment 1, and thus the hydrogen concentration is reduced. The hydrogen concentration is lower than 1×1019 cm−3, preferably lower than or equal to 5×1018 cm−3, which is similar to that described in Embodiment 1.
Further, when the oxide semiconductor film 109 is formed, a hydrogen permeable film including oxide such as a silicon oxide film or a silicon oxynitride film is formed as the hydrogen permeable film; thus, oxygen is supplied into the oxide semiconductor film 109 from the hydrogen permeable film. Furthermore, in the oxide semiconductor film 109 in this embodiment, oxygen is supplied from the base insulating film 102 by the first heat treatment; thus, oxygen deficiency in the oxide semiconductor film 109 is further reduced. In addition, by the first heat treatment, oxygen is also supplied in the vicinity of an interface between the base insulating film 102 and the oxide semiconductor film 109 from the base insulating film 102; thus, the interface states at the interface between the base insulating film 102 and the oxide semiconductor film 109 are also reduced.
Over the oxide semiconductor film 109, a resist mask is formed through a photolithography step, and the oxide semiconductor film 109 is etched to have a desired shape with use of the resist mask, so that an island-shaped oxide semiconductor film 110 is formed. The resist mask can be formed by an ink-jet method, a printing method, or the like as appropriate, as well as through the photolithography step. For the etching, either wet etching or dry etching may be employed, and the etching is preferably performed so that the oxide semiconductor film 110 has a side surface with a tapered shape. The side surface of the oxide semiconductor film 110 is tapered, whereby in the manufacturing process of the transistor 100, coverage with a film which is formed after this etching step can be improved, and disconnection of the film can accordingly be prevented. In the case of performing dry etching, the tapered shape can be formed by performing etching while the resist mask is made to recede.
Next, the source electrode 112a and the drain electrode 112b which are in contact with part of a top surface and side surface of the oxide semiconductor film 110 are formed. A conductive material that can be used for the source electrode 112a and the drain electrode 112b is an elemental metal such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten; or an alloy including any of these metal elements as its main component. Further, the source electrode 112a and the drain electrode 112b are formed using the above conductive material to have a single-layer structure of a stacked-layer structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is stacked over an aluminum film, a two-layer structure in which a titanium film is stacked over a tungsten film, a two-layer structure in which a copper film is formed over a copper-magnesium-aluminum alloy film, and a three-layer structure in which a titanium film, an aluminum film, and a titanium film are stacked in this order can be given. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.
A conductive film is formed using the above conductive material, a resist mask is formed over the conductive film through a photolithography step, and the conductive film is etched with use of the resist mask to have a desired shape, so that the source electrode 112a and the drain electrode 112b can be formed. Note that the resist mask can be formed by an ink-jet method, a printing method, or the like as appropriate, as well as through the photolithography step. For the etching, either wet etching or dry etching may be employed, and the etching is preferably performed so that the source electrode 112a and the drain electrode 112b have a side surface with a tapered shape. This is because in the manufacturing process of the transistor 100, coverage with a film which is formed after this etching step can be improved, and disconnection of the film can accordingly be prevented. In the case of performing dry etching, the tapered shape can be formed by performing etching while the resist mask is made to recede.
Note that the source electrode 112a and the drain electrode 112b also serve as a source wiring and a drain wiring. The thicknesses of the source electrode 112a and the drain electrode 112b can be determined as appropriate in consideration of the electric resistance of the conductive material and the time for the formation step. For example, the thicknesses of the source electrode 112a and the drain electrode 112b may be greater than or equal to 10 nm and less than or equal to 500 nm.
The structure obtained through the steps up to here is illustrated in
Next, the gate insulating film 114 is formed over the oxide semiconductor film 110, the source electrode 112a, and the drain electrode 112b. The gate insulating film 114 is formed to have a single-layer structure or stacked-layer structure, using a material which can be applied to the base insulating film 102. The thickness of the gate insulating film 114 is greater than or equal to 1 nm and less than or equal to 300 nm, and preferably greater than or equal to 5 nm and less than or equal to 50 nm. It is preferable that the gate insulating film 114 also contain oxygen in a portion in contact with the oxide semiconductor film 110. As the gate insulating film 114, a film from which oxygen is released by heating may be used.
A second heat treatment may be performed on a structure obtained through the steps up to here. When the second heat treatment is performed, the oxide semiconductor film 111 can be formed. By the second heat treatment, hydrogen (including water, a hydroxyl group, or a hydride) is released from the oxide semiconductor film 110, and in addition, part of oxygen contained in the base insulating film 102 and the gate insulating film 114 can be released and diffused in the oxide semiconductor film 110 (in addition, in the vicinity of the interface between the base insulating film 102 and the oxide semiconductor film 110 and in the vicinity of the interface between the oxide semiconductor film 110 and the gate insulating film 114). That is, the second heat treatment enables oxygen deficiency in the oxide semiconductor film 111, the interface states at the interface between the base insulating film 102 and the oxide semiconductor film 111, and the interface states at the interface between the oxide semiconductor film 111 and the gate insulating film 114 to be reduced.
For an apparatus used for the second heat treatment, an apparatus which can be used for the first heat treatment may be used as appropriate. As conditions of the second heat treatment, the temperature is higher than or equal to 150° C. and lower than the strain point of the substrate, preferably higher than or equal to 250° C. and lower than or equal to 450° C., further preferably higher than or equal to 300° C. and lower than or equal to 450° C., and the atmosphere is an oxidation atmosphere or an inert atmosphere. Here, the oxidation atmosphere refers to an atmosphere including an oxidation gas such as oxygen, ozone, or nitrogen oxide at 10 ppm or higher. The inert atmosphere refers to an atmosphere which includes the oxidation gas at lower than 10 ppm and is filled with nitrogen or a rare gas. The treatment time is three minutes to 24 hours. Heat treatment for longer than 24 hours is not preferable because the productivity is reduced. Note that the timing of performing the second heat treatment may be any time as long as it is after the gate insulating film 114 is formed.
Since the hydrogen concentration and oxygen deficiency in the oxide semiconductor film 111 are reduced through the first heat treatment and the second heat treatment, generation of electrons serving as a carrier is suppressed in the oxide semiconductor film 111. Thus, negative shift of the threshold voltage of the transistor 100 can be suppressed, and normally-on can be suppressed accordingly.
Furthermore, through the first heat treatment and the second heat treatment, the interface states at the interface between the base insulating film 102 and the oxide semiconductor film 111 and the interface states at the interface between the oxide semiconductor film 111 and the gate insulating film 114 are reduced. Thus, in the transistor 100, it is possible to suppress capture of electric charge generated owing to operation of the transistor 100, at the interface between the base insulating film 102 and the oxide semiconductor film 111 and the interface between the oxide semiconductor film 111 and the gate insulating film 114. Therefore, the transistor 100 can be a transistor with less deterioration of electric characteristics.
When the oxide semiconductor film 111 (which is obtained by performing etching and the second heat treatment on the oxide semiconductor film 109) is a CAAC-OS film in which the hydrogen concentration is low, a channel formation region of the transistor 100 is formed using a CAAC-OS film in which the hydrogen concentration is low. Thus, in the transistor 100, the amount of shift in the threshold voltage between before and after light irradiation (visible light or ultraviolet light) or between before and after a gate bias-temperature (BT) stress test can be small. As a result, the transistor 100 can be a transistor having stable electric characteristics and high reliability. Note that the hydrogen concentration is lower than 1×1019 cm−3, preferably lower than or equal to 5×1018 cm−3.
Further, through the first heat treatment and the second heat treatment, in the oxide semiconductor film 111, the hydrogen concentration is sufficiently reduced (high purification), and the defect level in the band gap, due to oxygen deficiency, is reduced by supplying oxygen sufficiently. As a result, the off-state current of the transistor 100 is reduced. Specifically, the off-state current (here, a value in a range where the channel length is 3 μm and the channel width is 1 μm) at room temperature (25° C.) is 100 zA (1 zA (zeptoampere) is 1×10−21 A) or less, preferably 10 zA or less. Since alkali metal such as Li or Na is an impurity, the amount of the alkali metal which enters the transistor is preferably reduced. The concentration of the alkali metal in the oxide semiconductor film 109 (that becomes the oxide semiconductor film 110 later) is preferably lower than or equal to 2×1016 cm−3, preferably lower than or equal to 1×1015 cm−3. Further, the content of an alkaline earth metal is preferably low because it is also an impurity.
Note that if the oxide semiconductor film 109 formed through the first heat treatment is a film in which the hydrogen concentration is sufficiently lowered such that the transistor 100 having favorable electric characteristics can be manufactured and in which defect level in the band gap, due to oxygen deficiency, is sufficiently reduced, the second heat treatment for forming the oxide semiconductor film 111 may be omitted.
The structure obtained through the steps up to here is illustrated in
Next, the gate electrode 116 is formed over the gate insulating film 114 to overlap with the oxide semiconductor film 111. The gate electrode 116 may be formed in a manner similar to that of formation of the source electrode 112a and the drain electrode 112b. The structure obtained through the steps up to here is illustrated in
It is preferable that the gate insulating film 114 and a conductive film which is to be processed to form the gate electrode 116 later be successively formed without being exposed to air. Thus, attachment of an atmospheric component to the interface between the gate insulating film 114 and the gate electrode 116 can be suppressed, and the transistor 100 can have favorable electric characteristics.
A hydrogen capture film, particularly an oxynitride film including In, which is used for forming the oxide semiconductor film 109 may be provided between the gate insulating film 114 and the gate electrode 116. Specifically, the oxynitride film including In includes at least indium nitride and is formed using one or more materials of indium oxide, gallium oxide, zinc oxide, tin oxide, aluminum oxide, tungsten oxide, molybdenum oxide, titanium oxide, tantalum oxide, and silicon oxide. Part of hydrogen contained in the oxynitride film including In causes generation of electrons serving as a carrier. Since an electron has negative charge, the electric field is generated as in the case where extra negative bias is applied from the gate electrode, and as a result, the threshold voltage of the transistor is shifted in the positive direction. The concentration of nitrogen contained in the oxynitride film including In is controlled, whereby the hydrogen concentration in the oxynitride film including In can be controlled. Note that the hydrogen concentration in the oxynitride film can be quantified by SIMS and is higher than or equal to 1×1019 cm−3 and lower than or equal to 5×1020 cm−3, preferably higher than or equal to 1×1020 cm−3 and lower than or equal to 3×1020 cm−3. When the hydrogen concentration is controlled to the above range, the negative shift of the threshold voltage of the transistor can be suppressed.
Through the steps up to here, the transistor 100 can be manufactured.
Furthermore, as illustrated in
Note that an opening portion is formed in the gate insulating film 114 and the protective insulating film 118 as necessary, so that the gate electrode 116, the source electrode 112a, and the drain electrode 112b are exposed.
As described above, a semiconductor device can be manufactured with use of the method for forming an oxide semiconductor film according to one embodiment. Further, the semiconductor device includes an oxide semiconductor film having favorable semiconductor characteristics and thus has favorable electric characteristics.
Note that the structure described in this embodiment can be combined with structures described in the other embodiments and example of this specification, as appropriate.
(Embodiment 3)
In this embodiment, a liquid crystal display device manufactured using the transistor described in Embodiment 2 will be described. Note that an example in which one embodiment of the present invention is applied to a liquid crystal display device will be described in this embodiment; however, the present invention is not limited to this embodiment. For example, application of one embodiment of the present invention to an electroluminescence (EL) display device which is one of light-emitting devices is readily conceived by those skilled in the art.
As the transistor 2230, the transistor described in Embodiment 2, which is one embodiment of the present invention, is used. Since the transistor described in Embodiment 2 has favorable electric characteristics such as high field-effect mobility, a display device having high display quality can be obtained. In addition, since the transistor described in Embodiment 2 has extremely small off-state current, a display device with low power consumption can be obtained.
The gate line GL is connected to a gate of the transistor 2230, the source line SL is connected to a source of the transistor 2230, and a drain of the transistor 2230 is connected to one of capacitor electrodes of the capacitor 2220 and one of pixel electrodes of the liquid crystal element 2210. The other capacitor electrode of the capacitor 2220 and the other pixel electrode of the liquid crystal element 2210 are connected to a common electrode. Note that the common electrode may be formed in the same layer as the gate line GL using the same material as the gate line GL.
Further, the gate line GL is connected to a gate driver circuit. The gate driver circuit may include the transistor described in Embodiment 2.
The source line SL is connected to a source driver circuit. The source driver circuit may include the transistor described in Embodiment 2.
Note that one of or both the gate driver circuit and the source driver circuit may be formed over a separately prepared substrate and connected using a method such as chip on glass (COG), wire bonding, or tape automated bonding (TAB).
Further, since a transistor is easily broken by static electricity or the like, a protection circuit is preferably provided for the display device. The protection circuit is preferably formed using a nonlinear element.
When a voltage is applied to the gate line GL to be higher than or equal to the threshold voltage of the transistor 2230, electric charge supplied from the source line SL flows as a drain current of the transistor 2230 and is stored in the capacitor 2220. After charging for one row, the transistors 2230 in the row are turned off and voltage application from the source line SL stops; however, a necessary voltage can be kept by the electric charge accumulated in the capacitors 2220. Then, charging of the capacitors 2220 in the next row starts. In this manner, charging for the first row to the b-th row is carried out.
Note that in the case where a transistor whose off-state current is small is used as the transistor 2230, a time period during which the capacitor 2220 holds the voltage can be longer. By this effect, the display rewriting frequency can be reduced in the case of displaying an image with little motion (including a still image); accordingly, power consumption can be further lowered. In addition, capacitance of the capacitor 2220 can be further reduced, so that power consumption needed for charging can be reduced.
As described above, according to one embodiment of the present invention, a liquid crystal display device with high display quality, high reliability, and low power consumption can be provided.
(Embodiment 4)
In this embodiment, an example of manufacturing a semiconductor memory device using the transistor described in Embodiment 2 will be described.
As typical examples of a volatile semiconductor memory device, there are a dynamic random access memory (DRAM) which stores data in such a manner that a transistor included in a memory element is selected and electric charge is accumulated in a capacitor, and a static random access memory (SRAM) which holds stored data using a circuit such as a flip-flop.
As a typical example of a nonvolatile semiconductor memory device, there is a flash memory which includes a floating gate between a gate electrode and a channel formation region in a transistor and stores data by holding electric charge in the floating gate.
The transistor described in Embodiment 2 can be applied to some of transistors included in the above-described semiconductor memory device.
First, a memory cell included in a semiconductor memory device to which the transistor described in Embodiment 2 is applied will be described with reference to
A memory cell includes a bit line BL, a word line WL, a sense amplifier SAmp, a transistor Tr, and a capacitor C (see
It is known that the voltage held by the capacitor C is gradually reduced over time due to the off-state current of the transistor Tr as shown in
When the transistor described in Embodiment 2 is employed as the transistor Tr, the holding period T_1 can be made longer because the off-state current is small. That is, the frequency of refresh operation can be reduced. Accordingly, consumed power can be reduced. For example, when a memory cell is formed using a transistor in which a highly purified oxide semiconductor film is included and the off-state current is less than or equal to 1×10−21 A, preferably less than or equal to 1×10−24 A, data can be held for several days to several decades without supply of power.
As described above, according to one embodiment of the present invention, a semiconductor memory device with high reliability and low power consumption can be obtained.
Next, a memory cell in a nonvolatile semiconductor memory device to which the transistor described in Embodiment 2 will be described with reference to
The memory cell shown in
The voltage at the node N can be controlled with the transistor Tr_1. For example, the voltage of the source wiring SL_1 is set to VDD. In this case, when the voltage of the GL_1 is set to be higher than or equal to a voltage obtained by adding VDD to the threshold voltage Vth of the transistor Tr_1, the voltage of the node N can be HIGH. Further, when the voltage of the GL_1 is set to be lower than or equal to the threshold voltage Vth of the transistor Tr_1, the voltage of the node N can be LOW.
Thus, either a V_CL-Ids_2 curve (N=LOW) or a V_CL-Ids_2 curve (N=HIGH) is obtained. That is, when N=LOW, Ids_2 is small at a V_CL of 0 V; accordingly, data 0 is stored. Further, when N=HIGH, Ids_2 is large at a V_CL of 0V; accordingly, data 1 is stored. In this manner, data can be stored.
Since the off-state current of a transistor can be made to be extremely small in the case where the transistor described in Embodiment 2 is used as the transistor Tr_1 here, unintentional leak of electric charge accumulated in the node N by flowing between the source and the drain of the transistor Tr_1 can be suppressed. Therefore, data can be held for a long period. By using one embodiment of the present invention, the threshold voltage of the transistor Tr_1 is controlled, which enables reduction in the voltage necessary for writing. Thus, power consumption can be made small as compared with that of a flash memory or the like.
Note that the transistor described in Embodiment 2 may also be applied to the transistor Tr_2.
As described above, according to one embodiment of the present invention, a semiconductor memory device with high integration degree, high reliability for a long period, and low power consumption can be obtained.
This embodiment can be implemented in appropriate combination with the other embodiments.
(Embodiment 5)
A central processing unit (CPU) can be formed using the transistor described in Embodiment 2 for at least part of the CPU.
An instruction that is input to the CPU through the bus interface 1198 is input to the instruction decoder 1193 and decoded therein, and then, input to the ALU controller 1192, the interrupt controller 1194, the register controller 1197, and the timing controller 1195.
The ALU controller 1192, the interrupt controller 1194, the register controller 1197, and the timing controller 1195 conduct various controls in accordance with the decoded instruction. Specifically, the ALU controller 1192 generates signals for controlling the operation of the ALU 1191. While the CPU is executing a program, the interrupt controller 1194 judges an interrupt request from an external input/output device or a peripheral circuit on the basis of its priority or a mask state, and processes the request. The register controller 1197 generates an address of the register 1196, and reads/writes data from/to the register 1196 in accordance with the state of the CPU.
The timing controller 1195 generates signals for controlling operation timings of the ALU 1191, the ALU controller 1192, the instruction decoder 1193, the interrupt controller 1194, and the register controller 1197. For example, the timing controller 1195 includes an internal clock generator for generating an internal clock signal CLK2 based on a reference clock signal CLK1, and supplies the clock signal CLK2 to the above circuits.
In the CPU illustrated in
In the CPU illustrated in
The power supply can be stopped by a switching element provided between a memory element group and a node to which a power supply potential VDD or a power supply potential VSS is supplied, as illustrated in
The memory device illustrated in
In
Note that
Although the switching element 1141 controls the supply of the high-level power supply potential VDD to each of the memory elements 1142 included in the memory element group 1143 in
In
When a switching element is provided between a memory element group and a node to which the power supply potential VDD or the power supply potential VSS is supplied, data can be held even in the case where an operation of a CPU is temporarily stopped and the supply of the power supply voltage is stopped; accordingly, power consumption can be reduced. For example, while a user of a personal computer does not input data to an input device such as a keyboard, the operation of the CPU can be stopped, so that the consumed power can be reduced.
Although the CPU is given as an example, the transistor can also be applied to an LSI such as a digital signal processor (DSP), a custom LSI, or a field programmable gate array (FPGA).
This embodiment can be implemented in appropriate combination with the other embodiments.
(Embodiment 6)
A semiconductor device disclosed in this specification can be applied to a variety of electronic devices (including game machines). Examples of electronic devices are a television device (also referred to as a television or a television receiver), a monitor of a computer or the like, a camera such as a digital camera or a digital video camera, a digital photo frame, a mobile phone (also referred to as a mobile telephone or a mobile phone device), a portable game console, a portable information terminal, an audio reproducing device, a large-sized game machine such as a pachinko machine, and the like.
The television device 9600 can be operated with an operation switch of the housing 9601 or a separate remote controller 9610. Channels and volume can be controlled with an operation key 9609 of the remote controller 9610 so that an image displayed on the display portion 9603 can be controlled. Furthermore, the remote controller 9610 may be provided with a display portion 9607 for displaying data output from the remote controller 9610.
Note that the television device 9600 is provided with a receiver, a modem, and the like. With the use of the receiver, general television broadcasting can be received. Moreover, when the display device is connected to a communication network with or without wires via the modem, one-way (from a sender to a receiver) or two-way (between a sender and a receiver or between receivers) information communication can be performed.
Note that the digital photo frame 9700 is provided with an operation portion, an external connection portion (a USB terminal, a terminal that can be connected to various cables such as a USB cable, or the like), a recording medium insertion portion, and the like. Although these components may be provided on the surface on which the display portion is provided, it is preferable to provide them on the side surface or the back surface for the design of the digital photo frame 9700. For example, a memory storing data of an image taken with a digital camera is inserted in the recording medium insertion portion of the digital photo frame, whereby the image data can be transferred and then displayed on the display portion 9703.
The digital photo frame 9700 may be configured to transmit and receive data wirelessly. The structure may be employed in which desired image data is transferred wirelessly to be displayed.
This embodiment can be implemented by being combined as appropriate with any of the above-described embodiments.
In this example, evaluation results of the hydrogen concentration in an oxide semiconductor film which was formed according to Embodiment 1 will be described. Note that the oxide semiconductor film is referred to as Sample A.
First, a method for forming Sample A is described with reference to
A quartz substrate was used as the substrate 101. The oxide semiconductor film 103 was formed to a thickness 300 nm over the substrate 101 by a sputtering method (see
Next, a 5-nm-thick silicon oxide film, which is the hydrogen permeable film 105, was formed over the oxide semiconductor film 103 by a sputtering method. The oxide silicon film was formed under the following conditions: an argon gas at 25 sccm and an oxygen gas at 25 sccm were supplied to a reaction chamber of a sputtering apparatus; the pressure in the reaction chamber was set to 0.4 Pa; the electric power was set to 1.0 kW; the temperature of the substrate 101 was set to 100° C.; and a SiO2 target was used.
Next, a 300-nm-thick oxynitride film, which is the hydrogen capture film 107, was formed over the hydrogen permeable film 105 by a sputtering method (see
Next, heat treatment was performed on an object obtained through the steps up to here (see
Next, the hydrogen concentration in Sample A was evaluated by SIMS, and the results thereof are shown in
As described above, it was found that when an oxide silicon film and an IGZON film are formed over an IGZO film and heat treatment is performed, hydrogen in the IGZO film is released, penetrates the oxide silicon film, and captured by the IGZON film.
According to this example, the following was confirmed: a hydrogen permeable film is formed over an oxide semiconductor film, a hydrogen capture film is formed over the hydrogen permeable film, and heat treatment is performed, so that hydrogen can be released from the oxide semiconductor film and captured by the hydrogen capture film, and thus, an oxide semiconductor film in which the hydrogen concentration is reduced can be formed.
This application is based on Japanese Patent Application Ser. No. 2011-067693 filed with Japan Patent Office on Mar. 25, 2011, the entire contents of which are hereby incorporated by reference.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2011-067693 | Mar 2011 | JP | national |
| Number | Name | Date | Kind |
|---|---|---|---|
| 749220 | Hikmet et al. | Jan 1904 | A |
| 5528032 | Uchiyama | Jun 1996 | A |
| 5731856 | Kim et al. | Mar 1998 | A |
| 5744864 | Cillessen et al. | Apr 1998 | A |
| 5923963 | Yamanaka | Jul 1999 | A |
| 6191452 | Oda et al. | Feb 2001 | B1 |
| 6294274 | Kawazoe et al. | Sep 2001 | B1 |
| 6380014 | Ohta et al. | Apr 2002 | B1 |
| 6391690 | Miyasaka | May 2002 | B2 |
| 6555419 | Oda et al. | Apr 2003 | B2 |
| 6563174 | Kawasaki et al. | May 2003 | B2 |
| 6660572 | Miyasaka | Dec 2003 | B2 |
| 6727522 | Kawasaki et al. | Apr 2004 | B1 |
| 6803265 | Ngo et al. | Oct 2004 | B1 |
| 7049190 | Takeda et al. | May 2006 | B2 |
| 7061014 | Hosono et al. | Jun 2006 | B2 |
| 7064346 | Kawasaki et al. | Jun 2006 | B2 |
| 7105868 | Nause et al. | Sep 2006 | B2 |
| 7132716 | Moon et al. | Nov 2006 | B2 |
| 7211825 | Shih et al | May 2007 | B2 |
| 7268405 | Park et al. | Sep 2007 | B2 |
| 7282782 | Hoffman et al. | Oct 2007 | B2 |
| 7297977 | Hoffman et al. | Nov 2007 | B2 |
| 7323356 | Hosono et al. | Jan 2008 | B2 |
| 7326605 | Choi et al. | Feb 2008 | B2 |
| 7374998 | Hergenrother et al. | May 2008 | B2 |
| 7385224 | Ishii et al. | Jun 2008 | B2 |
| 7402506 | Levy et al. | Jul 2008 | B2 |
| 7411209 | Endo et al. | Aug 2008 | B2 |
| 7453065 | Saito et al. | Nov 2008 | B2 |
| 7453087 | Iwasaki | Nov 2008 | B2 |
| 7459220 | Hikmet et al. | Dec 2008 | B2 |
| 7462862 | Hoffman et al. | Dec 2008 | B2 |
| 7468304 | Kaji et al. | Dec 2008 | B2 |
| 7501293 | Ito et al. | Mar 2009 | B2 |
| 7538343 | Nam | May 2009 | B2 |
| 7674650 | Akimoto et al. | Mar 2010 | B2 |
| 7732819 | Akimoto et al. | Jun 2010 | B2 |
| 7737438 | Endo et al. | Jun 2010 | B2 |
| 7791072 | Kumomi et al. | Sep 2010 | B2 |
| 7910457 | Yamazaki | Mar 2011 | B2 |
| 7910490 | Akimoto et al. | Mar 2011 | B2 |
| 7932521 | Akimoto et al. | Apr 2011 | B2 |
| 8018012 | Nakagawa et al. | Sep 2011 | B2 |
| 8158979 | Kang et al. | Apr 2012 | B2 |
| 8384076 | Park et al. | Feb 2013 | B2 |
| 8384078 | Kang et al. | Feb 2013 | B2 |
| 8426852 | Lee et al. | Apr 2013 | B2 |
| 8461597 | Kim et al. | Jun 2013 | B2 |
| 8492862 | Yamazaki et al. | Jul 2013 | B2 |
| 20010002323 | Kobayashi et al. | May 2001 | A1 |
| 20010002325 | Oda et al. | May 2001 | A1 |
| 20010046027 | Tai et al. | Nov 2001 | A1 |
| 20020056838 | Ogawa | May 2002 | A1 |
| 20020132454 | Ohtsu et al. | Sep 2002 | A1 |
| 20030189401 | Kido et al. | Oct 2003 | A1 |
| 20030218222 | Wager et al. | Nov 2003 | A1 |
| 20040038446 | Takeda et al. | Feb 2004 | A1 |
| 20040127038 | Carcia et al. | Jul 2004 | A1 |
| 20040229443 | Bower | Nov 2004 | A1 |
| 20050017302 | Hoffman | Jan 2005 | A1 |
| 20050116233 | Park et al. | Jun 2005 | A1 |
| 20050199959 | Chiang et al. | Sep 2005 | A1 |
| 20060035452 | Carcia et al. | Feb 2006 | A1 |
| 20060043377 | Hoffman et al. | Mar 2006 | A1 |
| 20060091793 | Baude et al. | May 2006 | A1 |
| 20060108529 | Saito et al. | May 2006 | A1 |
| 20060108636 | Sano et al. | May 2006 | A1 |
| 20060110867 | Yabuta et al. | May 2006 | A1 |
| 20060113536 | Kumomi et al. | Jun 2006 | A1 |
| 20060113539 | Sano et al. | Jun 2006 | A1 |
| 20060113549 | Den et al. | Jun 2006 | A1 |
| 20060113565 | Abe et al. | Jun 2006 | A1 |
| 20060169973 | Isa et al. | Aug 2006 | A1 |
| 20060170111 | Isa et al. | Aug 2006 | A1 |
| 20060192915 | Kimura | Aug 2006 | A1 |
| 20060197092 | Hoffman et al. | Sep 2006 | A1 |
| 20060208977 | Kimura | Sep 2006 | A1 |
| 20060228974 | Thelss et al. | Oct 2006 | A1 |
| 20060231882 | Kim et al. | Oct 2006 | A1 |
| 20060238135 | Kimura | Oct 2006 | A1 |
| 20060244107 | Sugihara et al. | Nov 2006 | A1 |
| 20060284171 | Levy et al. | Dec 2006 | A1 |
| 20060284172 | Ishii | Dec 2006 | A1 |
| 20060292774 | Chen et al. | Dec 2006 | A1 |
| 20060292777 | Dunbar | Dec 2006 | A1 |
| 20070024187 | Shin et al. | Feb 2007 | A1 |
| 20070046191 | Saito | Mar 2007 | A1 |
| 20070052025 | Yabuta | Mar 2007 | A1 |
| 20070054507 | Kaji et al. | Mar 2007 | A1 |
| 20070090365 | Hayashi et al. | Apr 2007 | A1 |
| 20070108446 | Akimoto | May 2007 | A1 |
| 20070152217 | Lai et al. | Jul 2007 | A1 |
| 20070172591 | Seo et al. | Jul 2007 | A1 |
| 20070184619 | Hergenrother et al. | Aug 2007 | A1 |
| 20070187678 | Hirao et al. | Aug 2007 | A1 |
| 20070187760 | Furuta et al. | Aug 2007 | A1 |
| 20070194379 | Hosono et al. | Aug 2007 | A1 |
| 20070252928 | Ito et al. | Nov 2007 | A1 |
| 20070272922 | Kim et al. | Nov 2007 | A1 |
| 20070287296 | Chang | Dec 2007 | A1 |
| 20080006877 | Mardilovich et al. | Jan 2008 | A1 |
| 20080038882 | Takechi et al. | Feb 2008 | A1 |
| 20080038929 | Chang | Feb 2008 | A1 |
| 20080050595 | Nakagawara et al. | Feb 2008 | A1 |
| 20080067508 | Endo et al. | Mar 2008 | A1 |
| 20080073653 | Iwasaki | Mar 2008 | A1 |
| 20080083950 | Pan et al. | Apr 2008 | A1 |
| 20080106191 | Kawase | May 2008 | A1 |
| 20080128689 | Lee et al. | Jun 2008 | A1 |
| 20080129195 | Ishizaki et al. | Jun 2008 | A1 |
| 20080166834 | Kim et al. | Jul 2008 | A1 |
| 20080182358 | Cowdery-Corvan et al. | Jul 2008 | A1 |
| 20080224133 | Park et al. | Sep 2008 | A1 |
| 20080254569 | Hoffman et al. | Oct 2008 | A1 |
| 20080258139 | Ito et al. | Oct 2008 | A1 |
| 20080258140 | Lee et al. | Oct 2008 | A1 |
| 20080258141 | Park et al. | Oct 2008 | A1 |
| 20080258143 | Kim et al. | Oct 2008 | A1 |
| 20080272370 | Endo et al. | Nov 2008 | A1 |
| 20080283916 | Yamazaki | Nov 2008 | A1 |
| 20080296568 | Ryu et al. | Dec 2008 | A1 |
| 20080308796 | Akimoto et al. | Dec 2008 | A1 |
| 20080308805 | Akimoto et al. | Dec 2008 | A1 |
| 20080308806 | Akimoto et al. | Dec 2008 | A1 |
| 20090008639 | Akimoto et al. | Jan 2009 | A1 |
| 20090068773 | Lai et al. | Mar 2009 | A1 |
| 20090073325 | Kuwabara et al. | Mar 2009 | A1 |
| 20090090914 | Yano et al. | Apr 2009 | A1 |
| 20090114910 | Chang | May 2009 | A1 |
| 20090134399 | Sakakura et al. | May 2009 | A1 |
| 20090152506 | Umeda et al. | Jun 2009 | A1 |
| 20090152541 | Maekawa et al. | Jun 2009 | A1 |
| 20090166616 | Uchiyama | Jul 2009 | A1 |
| 20090184305 | Lee et al. | Jul 2009 | A1 |
| 20090184396 | Kim et al. | Jul 2009 | A1 |
| 20090278122 | Hosono et al. | Nov 2009 | A1 |
| 20090280600 | Hosono et al. | Nov 2009 | A1 |
| 20090283763 | Park et al. | Nov 2009 | A1 |
| 20090302481 | Matsuzaki | Dec 2009 | A1 |
| 20090305461 | Akimoto et al. | Dec 2009 | A1 |
| 20090309102 | Kim et al. | Dec 2009 | A1 |
| 20100006810 | Kim et al. | Jan 2010 | A1 |
| 20100045179 | Sano et al. | Feb 2010 | A1 |
| 20100051938 | Hayashi et al. | Mar 2010 | A1 |
| 20100065844 | Tokunaga | Mar 2010 | A1 |
| 20100092800 | Itagaki et al. | Apr 2010 | A1 |
| 20100109002 | Itagaki et al. | May 2010 | A1 |
| 20100109058 | Sakata et al. | May 2010 | A1 |
| 20100136743 | Akimoto et al. | Jun 2010 | A1 |
| 20100233847 | Ohara et al. | Sep 2010 | A1 |
| 20100276694 | Sakakura et al. | Nov 2010 | A1 |
| 20100283049 | Sato et al. | Nov 2010 | A1 |
| 20100295041 | Kumomi et al. | Nov 2010 | A1 |
| 20110003418 | Sakata et al. | Jan 2011 | A1 |
| 20110006299 | Abe et al. | Jan 2011 | A1 |
| 20110009697 | Kawano et al. | Jan 2011 | A1 |
| 20110031497 | Yamazaki et al. | Feb 2011 | A1 |
| 20110053322 | Sasaki et al. | Mar 2011 | A1 |
| 20110068335 | Yamazaki et al. | Mar 2011 | A1 |
| 20110079777 | Akimoto | Apr 2011 | A1 |
| 20110101330 | Kang et al. | May 2011 | A1 |
| 20110104851 | Akimoto et al. | May 2011 | A1 |
| 20110117697 | Akimoto et al. | May 2011 | A1 |
| 20110121290 | Akimoto et al. | May 2011 | A1 |
| 20110127519 | Kang et al. | Jun 2011 | A1 |
| 20110133176 | Lee et al. | Jun 2011 | A1 |
| 20110136302 | Yamazaki et al. | Jun 2011 | A1 |
| 20110140097 | Cheong et al. | Jun 2011 | A1 |
| 20110140205 | Sakata et al. | Jun 2011 | A1 |
| 20110163311 | Akimoto et al. | Jul 2011 | A1 |
| 20110175080 | Kim et al. | Jul 2011 | A1 |
| 20110175830 | Sakata et al. | Jul 2011 | A1 |
| 20110204246 | Tanaka et al. | Aug 2011 | A1 |
| 20110220893 | Kim et al. | Sep 2011 | A1 |
| 20120132907 | Yamazaki et al. | May 2012 | A1 |
| 20120241736 | Imoto et al. | Sep 2012 | A1 |
| 20120241737 | Imoto et al. | Sep 2012 | A1 |
| 20120241738 | Imoto et al. | Sep 2012 | A1 |
| 20130264564 | Park et al. | Oct 2013 | A1 |
| 20130285044 | Yuan et al. | Oct 2013 | A1 |
| Number | Date | Country |
|---|---|---|
| 1737044 | Dec 2006 | EP |
| 2226847 | Sep 2010 | EP |
| 60-198861 | Oct 1985 | JP |
| 63-210022 | Aug 1988 | JP |
| 63-210023 | Aug 1988 | JP |
| 63-210024 | Aug 1988 | JP |
| 63-215519 | Sep 1988 | JP |
| 63-239117 | Oct 1988 | JP |
| 63-265818 | Nov 1988 | JP |
| 05-251705 | Sep 1993 | JP |
| 06-275697 | Sep 1994 | JP |
| 08-264794 | Oct 1996 | JP |
| 11-505377 | May 1999 | JP |
| 2000-044236 | Feb 2000 | JP |
| 2000-150900 | May 2000 | JP |
| 2002-076356 | Mar 2002 | JP |
| 2002-289859 | Oct 2002 | JP |
| 2003-086000 | Mar 2003 | JP |
| 2003-086808 | Mar 2003 | JP |
| 2004-103957 | Apr 2004 | JP |
| 2004-273614 | Sep 2004 | JP |
| 2004-273732 | Sep 2004 | JP |
| 2004250295 | Sep 2004 | JP |
| 2006-165528 | Jun 2006 | JP |
| 2007-096055 | Apr 2007 | JP |
| 2007-123861 | May 2007 | JP |
| 2008-141119 | Jun 2008 | JP |
| WO-2004114391 | Dec 2004 | WO |
| Entry |
|---|
| Fortunato.E et al., “Wide-Bandgap High-Mobility ZnO Thin-Film Transistors Produced at Room Temperature,”, Appl. Phys. Lett. (Applied Physics Letters) , Sep. 27, 2004, vol. 85, No. 13, pp. 2541-2543. |
| Dembo.H et al., “RFCPUS on Glass and Plastic Substrates Fabricated by TFT Transfer Technology,”, IEDM 05: Technical Digest of International Electron Devices Meeting, Dec. 5, 2005, pp. 1067-1069. |
| Ikeda.T et al., “Full-Functional System Liquid Crystal Display Using CG-Silicon Technology,”, SID Digest '04 : SID International Symposium Digest of Technical Papers, 2004, vol. 35, pp. 860-863. |
| Nomura.K et al., “Room-Temperature Fabrication of Transparent Flexible Thin-Film Transistors Using Amorphous Oxide Semiconductors,”, Nature, Nov. 25, 2004, vol. 432, pp. 488-492. |
| Park.J et al., “Improvements in the Device Characteristics of Amorphous Indium Gallium Zinc Oxide Thin-Film Transistors by Ar Plasma Treatment,”, Appl. Phys. Lett. (Applied Physics Letters) , Jun. 26, 2007, vol. 90, No. 26, pp. 262106-1-262106-3. |
| Takahashi.M et al., “Theoretical Analysis of IGZO Transparent Amorphous Oxide Semiconductor,”, IDW '08 : Proceedings of the 15th International Display Workshops, Dec. 3, 2008, pp. 1637-1640. |
| Hayashi.R et al., “42.1: Invited Paper: Improved Amorphous In—Ga—Zn—O TFTs,”, SID Digest '08 : SID International Symposium Digest of Technical Papers, May 20, 2008, vol. 39, pp. 621-624. |
| Prins.M et al., “A Ferroelectric Transparent Thin-Film Transistor,”, Appl. Phys. Lett. (Applied Physics Letters) , Jun. 17, 1996, vol. 68, No. 25, pp. 3650-3652. |
| Nakamura.M et al., “The phase relations in the In2O3—Ga2ZnO4—ZnO system at 1350° C.,”, Journal of Solid State Chemistry, Aug. 1, 1991, vol. 93, No. 2, pp. 298-315. |
| Kimizuka.N et al., “Syntheses and Single-Crystal Data of Homologous Compounds, In2O3(ZnO)m (m=3, 4, and 5), InGaO3(ZnO)3, and Ga2O3(ZnO)m (m=7, 8, 9, and 16) in the In2O3—ZnGa2O4—ZnO System,”, Journal of Solid State Chemistry, Apr. 1, 1995, vol. 116, No. 1, pp. 170-178. |
| Nomura.K et al., “Thin-Film Transistor Fabricated in Single-Crystalline Transparent Oxide Semiconductor,”, Science, May 23, 2003, vol. 300, No. 5623, pp. 1269-1272. |
| Masuda.S et al., “Transparent thin film transistors using ZnO as an active channel layer and their electrical properties,”, J. Appl. Phys. (Journal of Applied Physics) , Feb. 1, 2003, vol. 93, No. 3, pp. 1624-1630. |
| Asakuma.N et al., “Crystallization and Reduction of Sol-Gel-Derived Zinc Oxide Films by Irradiation with Ultraviolet Lamp,”, Journal of Sol-Gel Science and Technology, 2003, vol. 26, pp. 181-184. |
| Osada.T et al., “15.2: Development of Driver-Integrated Panel using Amorphous In—Ga—Zn—Oxide TFT,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, pp. 184-187. |
| Nomura.K et al., “Carrier transport in transparent oxide semiconductor with intrinsic structural randomness probed using single-crystalline InGaO3(ZnO)5 films,”, Appl. Phys. Lett. (Applied Physics Letters) , Sep. 13, 2004, vol. 85, No. 11, pp. 1993-1995. |
| Li.C et al., “Modulated Structures of Homologous Compounds InMO3(ZnO)m (M=In,Ga; m=Integer) Described by Four-Dimensional Superspace Group,”, Journal of Solid State Chemistry, 1998, vol. 139, pp. 347-355. |
| Son.K et al., “42.4L: Late-News Paper: 4 Inch QVGA AMOLED Driven by the Threshold Voltage Controlled Amorphous GIZO (Ga2O3—In2O3—ZnO) TFT,”, SID Digest '08 : SID International Symposium Digest of Technical Papers, May 20, 2008, vol. 39, pp. 633-636. |
| Lee.J et al., “World's Largest (15-Inch) XGA AMLCD Panel Using IGZO Oxide TFT,”, SID Digest '08 : SID International Symposium Digest of Technical Papers, May 20, 2008, vol. 39, pp. 625-628. |
| Nowatari.H et al., “60.2: Intermediate Connector With Suppressed Voltage Loss for White Tandem OLEDs,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, vol. 40, pp. 899-902. |
| Kanno.H et al., “White Stacked Electrophosphorecent Organic Light-Emitting Devices Employing MOO3 as a Charge-Generation Layer,”, Adv. Mater. (Advanced Materials), 2006, vol. 18, No. 3, pp. 339-342. |
| Tsuda.K et al., “Ultra Low Power Consumption Technologies for Mobile TFT-LCDs ,”, IDW '02 : Proceedings of the 9th International Display Workshops, Dec. 4, 2002, pp. 295-298. |
| Van de Walle.C, “Hydrogen as a Cause of Doping in Zinc Oxide,”, Phys. Rev. Lett. (Physical Review Letters), Jul. 31, 2000, vol. 85, No. 5, pp. 1012-1015. |
| Fung.T et al., “2-D Numerical Simulation of High Performance Amorphous In—Ga—Zn—O TFTs for Flat Panel Displays,”, AM-FPD '08 Digest of Technical Papers, Jul. 2, 2008, pp. 251-252, The Japan Society of Applied Physics. |
| Jeong.J et al., “3.1: Distinguished Paper: 12.1-Inch WXGA AMOLED Display Driven by Indium—Gallium—Zinc Oxide TFTs Array,”, SID Digest '08 : SID International Symposium Digest of Technical Papers, May 20, 2008, vol. 39, No. 1, pp. 1-4. |
| Park.J et al., “High performance amorphous oxide thin film transistors with self-aligned top-gate structure,”, IEDM 09: Technical Digest of International Electron Devices Meeting, Dec. 7, 2009, pp. 191-194. |
| Kurokawa.Y et al., “UHF RFCPUS on Flexible and Glass Substrates for Secure RFID Systems,”, Journal of Solid-State Circuits , 2008, vol. 43, No. 1, pp. 292-299. |
| Ohara.H et al., “Amorphous In—Ga—Zn—Oxide TFTs with Suppressed Variation for 4.0 inch QVGA AMOLED Display,”, AM-FPD '09 Digest of Technical Papers, Jul. 1, 2009, pp. 227-230, The Japan Society of Applied Physics. |
| Coates.D et al., “Optical Studies of the Amorphous Liquid-Cholesteric Liquid Crystal Transition:The “Blue Phase”,”, Physics Letters, Sep. 10, 1973, vol. 45A, No. 2, pp. 115-116. |
| Cho.D et al., “21.2:AL and Sn-Doped Zinc Indium Oxide Thin Film Transistors for AMOLED Back-Plane,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, pp. 280-283. |
| Lee.M et al., “15.4:Excellent Performance of Indium—Oxide-Based Thin-Film Transistors by DC Sputtering,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, pp. 191-193. |
| Jin.D et al., “65.2:Distinguished Paper:World-Largest (6.5″) Flexible Full Color Top Emission AMOLED Display on Plastic Film and its Bending Properties,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, pp. 983-985. |
| Sakata.J et al., “Development of 4.0-In. AMOLED Display With Driver Circuit Using Amorphous In—Ga—Zn—Oxide TFTs,”, IDW '09 : Proceedings of the 16th International Display Workshops, 2009, pp. 689-692. |
| Park.J et al., “Amorphous Indium—Gallium—Zinc Oxide TFTs and Their Application for Large Size AMOLED,”, AM-FPD '08 Digest of Technical Papers, Jul. 2, 2008, pp. 275-278. |
| Park.S et al., “Challenge to Future Displays: Transparent AM-OLED Driven by Peald Grown ZnO TFT,”, IMID '07 Digest, 2007, pp. 1249-1252. |
| Godo.H et al., “Temperature Dependence of Characteristics and Electronic Structure for Amorphous In—Ga—Zn—Oxide TFT,”, AM-FPD '09 Digest of Technical Papers, Jul. 1, 2009, pp. 41-44. |
| Osada.T et al., “Development of Driver-Integrated Panel Using Amorphous In—Ga—Zn—Oxide TFT,”, AM-FPD '09 Digest of Technical Papers, Jul. 1, 2009, pp. 33-36. |
| Hirao.T et al., “Novel Top-Gate Zinc Oxide Thin-Film Transistors (ZnO TFTs) for AMLCDS,”, Journal of the SID, 2007, vol. 15, No. 1, pp. 17-22. |
| Hosono.H, “68.3:Invited Paper:Transparent Amorphous Oxide Semiconductors for High Performance TFT,”, SID Digest '07 : SID International Symposium Digest of Technical Papers, 2007, vol. 38, pp. 1830-1833. |
| Godo.H et al., “P-9:Numerical Analysis on Temperature Dependence of Characteristics of Amorphous In—Ga—Zn—Oxide TFT,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, pp. 1110-1112. |
| Ohara.H et al., “21.3:4.0 In. QVGA AMOLED Display using In—Ga—Zn—Oxide TFTs with a Novel Passivation Layer,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, pp. 284-287. |
| Miyasaka.M, “SUFTLA Flexible Microelectronics on Their Way to Business,”, SID Digest '07 : SID International Symposium Digest of Technical Papers, 2007, vol. 38, pp. 1673-1676. |
| Chern.H et al., “An Analytical Model for the Above-Threshold Characteristics of Polysilicon Thin-Film Transistors,”, IEEE Transactions on Electron Devices, Jul. 1, 1995, vol. 42, No. 7, pp. 1240-1246. |
| Kikuchi.H et al., “39.1:Invited Paper:Optically Isotropic Nano-Structured Liquid Crystal Composites for Display Applications,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, pp. 578-581. |
| Asaoka.Y et al., “29.1:Polarizer-Free Reflective LCD Combined With Ultra Low-Power Driving Technology,”, SID Digest '09 : SID International Symposium Digest of Technical Papers, May 31, 2009, pp. 395-398. |
| Lee.H et al., “Current Status of, Challenges to, and Perspective View of AM-OLED ,”, IDW '06 : Proceedings of the 13th International Display Workshops, Dec. 7, 2006, pp. 663-666. |
| Kikuchi.H et al., “62.2:Invited Paper:Fast Electro-Optical Switching in Polymer-Stabilized Liquid Crystalline Blue Phases for Display Application,”, SID Digest '07 : SID International Symposium Digest of Technical Papers, 2007, vol. 38, pp. 1737-1740. |
| Nakamura.M, “Synthesis of Homologous Compound with New Long-Period Structure,”, NIRIM Newsletter, Mar. 1, 1995, vol. 150, pp. 1-4. |
| Kikuchi.H et al., “Polymer-Stabilized Liquid Crystal Blue Phases,”, Nature Materials, Sep. 2, 2002, vol. 1, pp. 64-68. |
| Kimizuka.N et al., “Spinel,YbFe2O4, and Yb2Fe3O7 Types of Structures for Compounds in the In2O3 and Sc2O3-A2O3-BO Systems [A; Fe, Ga, or Al; B: Mg, Mn, Fe, Ni, Cu, or Zn] at Temperatures Over 1000° C.,”, Journal of Solid State Chemistry, 1985, vol. 60, pp. 382-384. |
| Kitzerow.H et al., “Observation of Blue Phases in Chiral Networks,”, Liquid Crystals, 1993, vol. 14, No. 3, pp. 911-916. |
| Costello.M et al., “Electron Microscopy of a Cholesteric Liquid Crystal and Its Blue Phase,”, Phys. Rev. A (Physical Review. A), May 1, 1984, vol. 29, No. 5, pp. 2957-2959. |
| Meiboom.S et al., “Theory of the Blue Phase of Cholesteric Liquid Crystals,”, Phys. Rev. Lett. (Physical Review Letters), May 4, 1981, vol. 46, No. 18, pp. 1216-1219. |
| Park.Sang-Hee et al., “42.3: Transparent ZnO Thin Film Transistor for the Application of High Aperture Ratio Bottom Emission AM-OLED Display,”, SID Digest '08: SID International Symposium Digest of Technical Papers, May 20, 2008, vol. 39, pp. 629-632. |
| Orita.M et al., “Mechanism of Electrical Conductivity of Transparent InGaZnO4,”, Phys. Rev. B (Physical Review. B), Jan. 15, 2000, vol. 61, No. 3, pp. 1811-1816. |
| Nomura.K et al., “Amorphous Oxide Semiconductors for High-Performance Flexible Thin-Film Transistors,”, Jpn. J. Appl. Phys. (Japanese Journal of Applied Physics) , 2006, vol. 45, No. 5B, pp. 4303-4308. |
| Janotti.A et al., “Native Point Defects in ZnO,”, Phys. Rev. B (Physical Review. B), Oct. 4, 2007, vol. 76, No. 16, pp. 165202-1-165202-22. |
| Park.J et al., “Electronic Transport Properties of Amorphous Indium—Gallium—Zinc Oxide Semiconductor Upon Exposure to Water,”, Appl. Phys. Lett. (Applied Physics Letters) , 2008, vol. 92, pp. 072104-1-072104-3. |
| Hsieh.H et al., “P-29:Modeling of Amorphous Oxide Semiconductor Thin Film Transistors and Subgap Density of States,”, SID Digest '08 : SID International Symposium Digest of Technical Papers, 2008, vol. 39, pp. 1277-1280. |
| Janotti.A et al., “Oxygen Vacancies in ZnO,”, Appl. Phys. Lett. (Applied Physics Letters) , 2005, vol. 87, pp. 122102-1-122102-3. |
| Oba.F et al., “Defect energetics in ZnO: A hybrid Hartree-Fock density functional study,”, Phys. Rev. B (Physical Review. B), 2008, vol. 77, pp. 245202-1-245202-6. |
| Orita.M et al., “Amorphous transparent conductive oxide InGaO3(ZnO)m (m<4):a Zn4s conductor,”, Philosophical Magazine, 2001, vol. 81, No. 5, pp. 501-515. |
| Hosono.H et al., “Working hypothesis to explore novel wide band gap electrically conducting amorphous oxides and examples,”, J. Non-Cryst. Solids (Journal of Non-Crystalline Solids), 1996, vol. 198-200, pp. 165-169. |
| Mo.Y et al., “Amorphous Oxide TFT Backplanes for Large Size AMOLED Displays,”, IDW '08 : Proceedings of the 6th International Display Workshops, Dec. 3, 2008, pp. 581-584. |
| Kim.S et al., “High-Performance oxide thin film transistors passivated by various gas plasmas,”, 214th ECS Meeting, 2008, No. 2317, ECS. |
| Clark.S et al., “First Principles Methods Using CASTEP,”, Zeitschrift fur Kristallographie, 2005, vol. 220, pp. 567-570. |
| Lany.S et al., “Dopability, Intrinsic Conductivity, and Nonstoichiometry of Transparent Conducting Oxides,”, Phys. Rev. Lett. (Physical Review Letters), Jan. 26, 2007, vol. 98, pp. 045501-1-045501-4. |
| Park.J et al., “Dry etching of ZnO films and plasma-induced damage to optical properties,”, J. Vac. Sci. Technol. B (Journal of Vacuum Science & Technology B), Mar. 1, 2003, vol. 21, No. 2, pp. 800-803. |
| Oh.M et al., “Improving the Gate Stability of ZnO Thin-Film Transistors With Aluminum Oxide Dielectric Layers,”, J. Electrochem. Soc. (Journal of the Electrochemical Society), 2008, vol. 155, No. 12, pp. H1009-H1014. |
| Ueno.K et al., “Field-Effect Transistor on SrTiO3 With Sputtered Al2O3 Gate Insulator,”, Appl. Phys. Lett. (Applied Physics Letters) , Sep. 1, 2003, vol. 83, No. 9, pp. 1755-1757. |
| Number | Date | Country | |
|---|---|---|---|
| 20120244659 A1 | Sep 2012 | US |
