This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2023-0168015 filed on Nov. 28, 2023 and Korean Patent Application No. 10-2024-0000874 filed on Jan. 3, 2024 in the Korean Intellectual Property Office, the disclosures of which are incorporated by reference herein in their entirety.
The present disclosure relates to channel coding, and more particularly, to a method of improving polar code performance by using local pre-transformation, and a system using the method.
The present research was performed with the support of the Samsung Science & Technology Foundation (Task No. SRFC-IT2302-04).
There is continuing demand for ultra-reliable low-latency communication (URLLC) in the next-generation wireless communication systems. The URLLC focuses on achieving ultra-high-speed data packet transmission within a very short time period, for example, 1 ms, while guaranteeing the reliability of a packet error rate (PER) of less than 10−5. To this end, it is important to develop state-of-the art channel coding techniques for executing optimal performance within the range of a finite block-length (FBL).
Polar codes are one of the channel codes for achieving channel capacity within the range of an infinite block-length (IBL). When a code for pre-transformation is configured in the polar codes, a channel polarization-based decoder commonly used in the polar codes may undergo a deterioration in performance.
It is important to configure the pre-transformation of polar codes appropriate for a channel-polarization-based decoder.
In order to achieve the technical objective described above, an encoder using local pre-transformation is disclosed according to the inventive concept of the present disclosure.
The encoder may include a bit splitting unit configured to generate a specific information signal and remaining information signals by splitting an input signal. The encoder may include a pre-transform unit configured to generate connection signals by performing, in parallel, local pre-transformation, based on each of the remaining information signals. The encoder may include a polar transform unit configured to generate an output signal by performing polar transformation, based on the specific information signal and the connection signals.
According to an embodiment, the polar transform unit may further be configured to perform the polar transformation, based on the specific information signal, and non-consecutive information bits of the connection signals and to obtain the output signal from a result of the polar transformation.
According to an embodiment, a number of consecutive information bits of the connection signals may be limited based on a size of each connection signal.
According to an embodiment, the pre-transform unit may include local pre-transform units, and each of the local pre-transform units may be configured to generate the connection signal by performing the local pre-transformation using an upper-triangular matrix, based on a corresponding remaining information signal.
According to an embodiment, the pre-transform unit may include local pre-transform units, and each of the local pre-transform units may be configured to generate a pre-transform input signal by adding one or more frozen bits to a corresponding remaining information signal and to generate the connection signal by performing the local pre-transformation on the pre-transform input signal.
According to an embodiment, as the one or more frozen bits are added to the corresponding remaining information signal, the connection signal may include non-consecutive information bits.
According to an embodiment, each of the local pre-transform units may be further configured to assign the corresponding remaining information signal to one or more elements of the pre-transform input signal indicated by a corresponding information index set and to assign the one or more frozen bits to one or more remaining elements of the pre-transform input signal.
According to an embodiment, the polar transform unit may further be configured to generate a polar transform input signal including the specific information signal, the connection signals, and one or more frozen bits and to generate the output signal by performing polar transformation on the polar transform input signal.
According to an embodiment, the polar transform unit may further be configured to assign the specific information signal to one or more elements of the polar transform input signal indicated by a corresponding information index set, assign a corresponding connection signal to one or more elements of the polar transform input signal indicated by a connection index set, and assign the one or more frozen bits to one or more remaining elements of the polar transform input signal.
According to an embodiment, the information index set and the connection index set may include, from among total indices of the polar transform input signal, indices having high channel reliability and having a corresponding row-weight of a polar transformation matrix greater than or equal to a predetermined threshold value.
In order to achieve the technical objective described above, an encoding method using local pre-transformation is disclosed according to the inventive concept of the present disclosure.
The encoding method may include generating a specific information signal and remaining information signals by splitting an input signal. The encoding method may include generating connection signals by performing, in parallel, local pre-transformation, based on each of the remaining information signals. The encoding method may include generating an output signal by performing polar transformation, based on the specific information signal and the connection signals.
According to an embodiment, the generating of the output signal may include performing the polar transformation, based on the specific information signal and non-consecutive information bits of the connection signals, and obtaining the output signal from a result of the polar transformation.
According to an embodiment, a number of consecutive information bits of the connection signals may be limited based on a size of each connection signal.
According to an embodiment, the generating of the connection signals may include obtaining the connection signals by performing, in parallel, the local pre-transformation using an upper-triangular matrix, based on each of the remaining information signals.
According to an embodiment, the generating of the connection signals may include generating pre-transform input signals by adding one or more frozen bits to the remaining information signals, respectively, and generating the connection signals by performing, in parallel, the local pre- transformation on each of the pre-transform input signals.
According to an embodiment, as the one or more frozen bits are added to the remaining information signals, respectively, the connection signals may include non-consecutive information bits, respectively.
According to an embodiment, the generating of the pre-transform input signals may include assigning a corresponding remaining information signal to one or more elements of a pre-transform input signal indicated by a corresponding information index set and assigning the one or more frozen bits to one or more remaining elements of the pre-transform input signal.
According to an embodiment, the generating of the output signal may include generating a polar transform input signal including the specific information signal, the connection signals, and one or more frozen bits and generating the output signal by performing polar transformation on the polar transform input signal.
According to an embodiment, the generating of the polar transform input signal may include assigning the specific information signal to one or more elements of the polar transform input signal indicated by a corresponding information index set, assigning a corresponding connection signal to one or more elements of the polar transform input signal indicated by a connection index set, and assigning the one or more frozen bits to one or more remaining elements of the polar transform input signal.
In order to achieve the technical objective described above, a decoding method is disclosed according to the inventive concept of the present disclosure.
The decoding method may include receiving an input signal and generating an output signal corresponding to the input signal by sequentially searching for decoding paths with respect to the input signal and selecting a final decoding path from among the decoding paths.
According to an embodiment, a number of the decoding paths may not exceed a predetermined number.
According to an embodiment, the input signal may correspond to a codeword encoded based on parallel local pre-transformation and polar transformation.
Advantages and the characteristics of the disclosed embodiment and methods of achieving the same will be apparent with reference to embodiments described below together with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed hereinafter. Rather, the present disclosure may be realized in various different forms, and the present embodiments may be merely given to completely explain the present disclosure and help one of ordinary skill in the art fully understand the scope of the disclosure.
It will be understood that each block of a flowchart may be performed by computer program instructions. These computer program instructions may be loaded on a processor of a general-purpose computer, a special-use computer, or other programmable data processing devices, and thus, instructions performed by the processor of the computers or the other programmable data processing devices may generate a device for performing the functions described in the block(s). These computer program instructions may also be stored in a computer-usable or computer-readable memory which may be oriented for a computer or other programmable data processing devices in order to realize the functions in a specific method. Thus, the instructions stored in the computer-usable or the computer-readable memory may also generate a manufacturing item including the instruction device for performing the functions described in the block(s). The computer program instructions may be loaded on a computer or other programmable data processing devices, and thus, a series of operations may be performed on the computer or the other programmable data processing devices to generate a process executed on the computer, so that the instructions performed by the computer or the other programmable data processing devices may provide operations for performing the functions described with reference to the block(s). Also, each block may represent part of a module, a segment, or a code including one or more executable instructions for performing (a) specific logic function(s).
The terms used in this specification will be briefly described, and the disclosed embodiment will be described in detail.
The terms used herein are selected as general terms as currently widely used as possible while taking into account the functions in the present disclosure, which, however, may be changed according to an intention of a technician in the art, a precedent, the advent of new technologies, or the like. Also, in particular cases, there may be terms arbitrarily selected by the applicant. In this case, their meanings will be described in detail in corresponding description parts of the disclosure. Therefore, the terms used in the present disclosure shall be defined based on the meanings of the terms and the content throughout the present disclosure, rather than simply based on the titles of the terms.
In the present disclosure, for convenience of explanation, the lower suffix notation indicating vector indexing is used. For example, when a vector u=[1,3,2,4,5] and a set A={2,4} for indexing are given, uA=[u2,u4]=[3,4] in the vector indexing using the lower suffix notation.
In the present disclosure, for brevity, with respect to a<b, Ua:b=[Ua, Ua+1, . . . , Ub].
Throughout the present disclosure, the expression “at least one of a, b or c” may indicate “a,” “b,” “c,” “a and b,” “a and c,” “b and c,” “all of a, b, and c,” or variations thereof.
Singular expressions in the present specification include plural expressions unless the context clearly indicates singular forms.
Throughout the specification, when a part “includes” an element, the part may further include other elements, rather than excluding other elements, unless there is a particular description contrary thereto.
Also, the term “unit” used in the specification denotes a software or hardware component and the “unit” performs certain functions. However, the meaning of the term “unit” is not limited to software or hardware. A “unit” may be configured to be in a storage medium which may be addressed or may be configured to play one or more processors. Thus, for example, a “unit” may include components, such as software components, object-oriented software components, class components, and task components, processes, functions, attributes, procedures, sub-routines, segments of a program code, drivers, firmware, a microcode, a circuit, data, a database, data structures, tables, arrays, and variables. Functions provided by the components and the “units” may be combined into a reduced number of components or “units” or may further be divided into additional components and “units.”
The term “processor” should be widely interpreted as including a general-purpose processor, a central processing unit (CPU), a microprocessor, a digital signal processor (DSP), a controller, a microcontroller, a state machine, etc. In some environments, the “processor” may also refer to an application specific integrated circuit (ASIC), a programmable logic device (PLD), a field-programmable gate array (FPGA), etc. The term “processor” may also refer to, for example, a combination of a DSP and a microprocessor, a combination of a plurality of microprocessors, a combination of one or more microprocessors combined with a DSP core, or a combination of processing devices, such a combination of other such arbitrary components.
The term “memory” should be widely interpreted as including an arbitrary electronic component capable of storing electronic information. Also, the term memory may refer to various types of processor-readable media, such as a random-access memory (RAM), a read-only memory (ROM), a nonvolatile RAM (NVRAM), a programmable ROM (PROM), an erasable-PROM (EPROM), an electrically EPROM (EEPROM), a flash memory, a magnetic or optical data storage, registers, etc. When a processor is to read and/or record information from and/or in the memory, the memory may be referred to as being in an electronic communication state with the processor. The memory integrated into the processor may be in an electronic communication state with the processor.
Various embodiments of the present disclosure are described with reference to the accompanying drawings.
It is important to configure a system such that a transmitted message m and a received message {circumflex over (m)} are the same as each other in the channel coding system 100. To this end, a transmitter 110 may generate a codeword x by performing channel encoding for more reliably transmitting the transmitted message m and transmit the codeword x through a channel 120 W:X→Y. Also, a receiver 130 may receive a codeword y including noise and perform channel decoding to reconstruct the received message {circumflex over (m)}.
An encoder 111 may encode the transmitted message m of K bits to generate the codeword x of N bits. The length of the codeword x may be increased by inserting appropriate parity bits into the transmitted message m. The parity bits may help the receiver 130 smoothly reconstruct the received message {circumflex over (m)}.
The transmitted message m may be represented by Equation 1.
where, with respect to k∈K, mk is an independent and uniformly distributed random variable with respect to {0,1}. {0,1}K is a set having binary numbers from 0 to 2K−1 as elements. For example, {0,1}2={00, 01, 10, 11}.
The codeword x may be represented by Equation 2.
Code rate is defined as a ratio of transmitted information bits to a code block length. According to an embodiment, the code rate is K/N.
The codeword x may pass the channel 120. Types of the channel 120 may vary. For example, the channel 120 may include a channel for wireless communication, wired communication, communication between a base station and an end system, communication of an electronic device, or communication of a chip (or a chiplet), but is not limited thereto. For example, the channel 120 may include a memoryless channel (MC), a discrete memoryless channel (DMC), or a binary-discrete memoryless channel (B- DMC), but is not limited thereto.
An output sequence y (that is, the codeword having passed the channel) of the channel 120 may be represented by Equation 3.
A decoder 131 may decode the codeword y to generate the received message ({circumflex over (m)}) of K bits. The decoder 131 may be designed to minimize a block error rate (BLER). Here, the BLER may denote a ratio of the number of error blocks to the total number of transmitted blocks.
With respect to the channel 120 W:X→Y, a channel capacity I(W) and a Bhattacharyya parameter Z(W) may be used as channel parameters related to the BLER.
When the channel 120 W:X→Y is a B-DMC, the channel capacity I(W) may be represented by Equation 4.
Also, the Bhattacharyya parameter Z(W) may be represented by Equation 5.
where, X indicates a binary alphabet, and Y indicates an arbitrary alphabet. W(y|x) indicates a transition probability of the channel W with respect to an input x and an output y.
The BLER is related to the channel reliability. As the channel reliability increases, the BLER may decrease. Also, in contrast, as the channel reliability decreases, the BLER may increase. The channel capacity I(W) is a parameter related to a maximum transmission amount which may be transmitted with a high reliability in a channel, and as the channel capacity I(W) increases, the BLER may decrease to increase the channel reliability. Also, the Bhattacharyya parameter Z(W) is a parameter related to an error probability of a channel, and as the Bhattacharyya parameter Z(W) decreases, the BLER may decrease to increase the channel reliability.
A minimum distance dmin of a linear block code C may be represented by Equation 6.
where, t(x)≐∥x∥0, that is, the number of “1” in the vector x.
A weight spectrum A(C) of the linear block code C may be represented by Equation 7.
where, Cd≐{x∈C:t(x)=d}.
The minimum distance dmin and the number of minimum-weight codewords Admin may play an important role for determining the performance of maximum likelihood (ML) decoding. The code performance may be improved by increasing the minimum distance dmin while decreasing the number of minimum-weight codewords Admin.
The encoder may include a bit splitting unit 210, a pre-transform unit 220, and a polar transform unit 230. The bit splitting unit 210 may generate a specific information signal m0 and remaining information signals m1, . . . , and mL by splitting an input signal m. The pre-transform unit 220 may perform local pre-transformation in parallel based on each of the remaining information signals m1, . . . , and mL to generate connection signals u1, . . . , and uL. The polar transform unit 230 may perform polar transformation based on the specific information signal m0 and the connection signals u1, . . . , and uL to generate an output signal x.
The input signal m of the encoder may be the transmitted message m. The input signal m may be an information vector and may include K information bits.
The output signal x of the encoder may be the codeword x. The length of the output signal x may be N.
The bit splitting unit 210 may split the input signal m into L+1 information signals m0, m1, . . . , and mL. From among the L+1 information signals, one information signal may be referred to as the specific information signal m0, and L remaining information signals may be referred to as the remaining information signals m1, . . . , and mL. Each of the specific information signal m0 and the remaining information signals m1, . . . , and mL may include one or more information bits.
For I∈{0,1, . . . , L}, the length of the Ith information signal mI may be represented as KI. That is, the Ith information signal mI may be a vector having KI elements.
The length of the information signals may vary. For example, |m1|=2, |m2|=2, and |m3|=4.
The pre-transform unit 220 may include local pre-transform units corresponding to the number of divisions into which the bit splitting unit 210 divides the input signal m. According to an embodiment, the pre-transform unit 220 may include L local pre-transform units. The L remaining information signals m1, . . . , and mL may be transmitted to the L local pre-transform units, respectively.
A pre-transform input signal vI, which is an input signal of the Ith local pre-transform unit 222, may be represented by Equation 8.
where, II indicates an Ith information index set. The number of elements of the Ith information index set II is |I1|=KI. FI indicates an Ith frozen index set. vI,II indicates one or more elements indicated by the Ith information index set II in the Ith pre-transform input signal VI. VI,FI indicates one or more elements indicated by the Ith frozen index set FI in the Ith pre-transform input signal VI.
The remaining information signals mI may form a part of the pre-transform input signal vI. The corresponding remaining information signal mI may be assigned to one or more elements vI,II indicated by the corresponding information index set II of the pre-transform input signal vI. That is, mI may be assigned to vI,II, which may be represented by Equation 9.
One or more frozen bits (that is, values known to both of the encoder and the decoder) may constitute a part of the pre-transform input signal vI. The one or more frozen bits may be assigned to one or more remaining elements vI,FI of the pre-transform input signal vI. In other words, the frozen bits may be assigned to the one or more elements vI,FI indicated by the corresponding frozen index set FI of the pre-transform input signal vI. According to an embodiment, a zero vector may be assigned to vI,FI, which may be represented by Equation 10.
For I∈{1, . . . ,L}, when the index set of the Ith pre-transform input signal vI is [NI], [NI] may be represented by Equation 11.
The local pre-transform units 221 to 223 may perform local pre-transformation in parallel with respect to the pre-transform input signals v1, . . . , and vL. In other words, the 1st local pre-transform unit 221 may perform the local pre-transformation with respect to the 1st pre-transform input signal v1, the Ith local pre-transform unit 222 may perform the local pre-transformation with respect to the Ith pre-transform input signal vI, and the Lth local pre-transform unit 223 may perform the local pre-transformation with respect to the Lth pre-transform input signal VL, wherein each local pre-transformation may be performed in parallel.
Each of the local pre-transform units 221 to 223 may perform the local pre-transformation by performing transformation using a pre-transform matrix. The connection signal uI which is an output signal of the Ith local pre-transform unit 222 may be generated from the pre-transform matrix TI corresponding to the pre-transform input signal VI of the Ith local pre-transform unit 222. The connection signal uI may be represented by Equation 12.
where, vI is a 1×NI vector, TI is a NI×NI matrix, and uI is a 1×N1 vector.
According to an embodiment, the local pre-transform units 221 to 223 may use an upper-triangular matrix as the pre-transform matrix. For example, the pre-transform matrix TI of the Ith local pre-transform unit 222 may be an upper-triangular matrix. As the local pre-transform units 221 to 223 use the upper-triangular matrix as the pre-transform matrix, the weight spectrum may be improved. For example, compared to when the local pre-transform is not used, the number of minimum-weight codewords may be reduced.
According to an embodiment, the pre-transform matrix of the local pre-transform units 221 to 223 may be a binary matrix. That is, the pre-transform matrix of the local pre-transform units 221 to 223 may be a matrix having 0 or 1 as an element.
According to an embodiment, the local pre-transform units 221 to 223 may use a transpose matrix of a polar transform matrix as the pre-transform matrix. For example, the pre-transform matrix TI of the Ith local pre-transform unit 222 may be a transpose matrix of a polar transform matrix. In this case, Equation 12 may be represented by Equation 13.
where, GN
According to an embodiment, the local pre-transform units 221 to 223 may use different pre-transform matrices. The local pre-transform units 221 to 223 may use the pre-transform matrices having different sizes. For example, the pre-transform matrix of the 1st local pre-transform unit 221 and the pre-transform matrix of the 2nd local pre-transform unit may have different sizes from each other. The local pre-transform units 221 to 223 may use the pre-transform matrices having different elements. For example, a value of an element of an ith row and a jth column of the pre-transform matrix T1 of the 1st local pre-transform unit 221 may be different from a value of an element of an ith row and a jth column of the pre-transform matrix of the 2nd local pre-transform unit.
A polar transform input signal u0, which is an input signal of the polar transform unit 230, may be represented by Equation 14.
where, for I∈{1, . . . , L}, AI indicates an Ith connection index set.
The specific information signal m0 may be assigned to one or more elements of the polar transform input signal u0 indicated by the information index set I0 of the specific information signal m0. That is, m0 may be assigned to u0,I0, which may be represented by Equation 15.
For I∈{1, . . . , L}, the Ith connection signal uI may be assigned to the one or more elements of the polar transform input signal u0 indicated by the Ith connection index set AI. That is, uI may be assigned to u0,AI, which may be represented by Equation 16.
One or more frozen bits may be assigned to one or more remaining elements of the polar transform input signal u0. That is, the one or more frozen bits may be assigned to the one or more remaining elements of the polar transform input signal u0 indicated by the frozen index set F0. This may be represented by Equation 17.
When the index set of the polar transform input signal u0 is [N], [N] may be represented by Equation 18.
When a sparce pre-transform matrix T including the pre-transform matrices T1, . . . , and TL is used, the polar transform input signal u0 may be represented by Equation 19.
where, the sparse pre-transform matrix T is a block diagonal matrix, whereby the pre-transform matrices T1, . . . , and TL are located in a main diagonal block. I is an identity matrix.
The polar transform unit 230 may generate the output signal x by performing polar transformation on the polar transform input signal u0. This may be represented by Equation 20.
where, the polar transform matrix is GN═ and
Two types of errors generating a decoding error of a successive cancellation list (SCL) decoder may be considered. The first error is that the correct decoding path is not in the final list. The second error is that the transmitted codeword is in the final list, but another codeword that is closer to the received signal is closer to the received message.
The encoder according to the present disclosure may use parallel local pre-transformation to minimize the loss of probability that the final list includes the correct decoding path (that is, to reduce the first error) and at the same time to improve the weight spectrum of the codeword (that is, to reduce the second error).
In detail, the encoder according to the present disclosure may reduce the first error by preventing, through the parallel local pre-transformation, the use of non-consecutive unreliable information bits. The pre-transform input signal of each local pre-transform unit may include one or more frozen bits, and thus, the connection signal of each local pre-transform unit may include nonconsecutive information bits. Thus, the polar transform unit 230 may perform polar transformation based on the nonconsecutive information bits of the connection signals u1, . . . , and uL. In detail, the pre-transform input signal of each local pre-transform unit may include one or more frozen bits, and the connection signal of each local pre-transform unit may be assigned to the polar transform input signal based on the corresponding connection index set. Thus, the number of consecutive information bits may be limited based on the size of each connection index set, that is, the size of each connection signal, in the connection signals u1, . . . , and uL. For example, in the connection signals u1, . . . , and uL, the number of consecutive information bits may be limited to |AI|(=NI), which is the size of each connection index set AI, with respect to I∈{1, . . . , L}.
Also, through the parallel local pre-transformation, the encoder according to the present disclosure may appropriately swap the information bits with the frozen bits and use the information bits having a relatively low channel reliability as the connection signal to reduce the number of minimum-weight codewords. Thus, the second error may be reduced. With respect to this aspect, a method of selecting the information index set and the connection index set is described.
First, a method of selecting the Ith information index set II for the Ith pre-transform input signal vI is described. The described method may be performed by at least one processor.
When the size of the pre-transform input signal vI is NI=2b, the smaller b is, the more suitable it is for a small-sized SCL decoder, and the larger b is, the better the distance characteristics of the codeword can be. Based on this aspect, by appropriately selecting b, the size NI of the pre-transform input signal vI may be selected. According to an embodiment, the information index set II may be set as II={1,2, . . . , KI}. where, KI is a design parameter. For example, it may be set as KI=NI−1 or KI=NI−2. The Ith information index set II may be determined by various other methods.
Next, a method of the information index set I0 and the connection index set A0 (where,
for the polar transform input signal u0 is described. The described method may be performed by at least one processor.
For brevity of explanation, an ordered index set R may be defined by Equation 21.
where, number of bits required for local pre-transformation and is
The ordered index set R is a sequence satisfying a first condition of wt(gi)≥dmin and a second condition of
with respect to all of i∈R. In the first condition, gi indicates an ith row of the polar transform matrix GN. The first condition denotes that an ith row-weight wt(gi) of the polar transform matrix GN is greater than or equal to a predetermined threshold value dmin. The second condition denotes that the order in which the reliability of the synthesized and separated channel WN(i) is sorted in descending order by polar transformation is not reversed.
The ith bit channel WN(i) may be defined by Equation 22.
where, WN(y|x) indicates N copies of B-DMCs W(y|x). i∈[N].
The number of parity bits p may be determined based on Equation 23.
By selecting K+ρ elements at the front having high channel reliability in the ordered index set R, an auxiliary set may be generated. The predetermined number of elements, that is, |m0| elements, according to the order of high channel reliability in the auxiliary set
may be assigned to the information index set I0. Also, remaining elements in the auxiliary set
may be assigned to the connection index set A0 (that is, A0=
\I0). Lastly, each connection index set AI may be set to satisfy the condition of Equation 24.
The local pre-transformations of the pre-transform unit 220 may be classified into a first type of local pre-transformation and a second type of local pre-transformation. The first type of local pre-transformation may correspond to the local pre-transformation described above. The second type of local pre-transformation may correspond to a transformation merging the information bit with the succeeding frozen bit. For example, the 1st local pre-transform unit 221 may perform the first type of local pre-transformation, and the Lth local pre-transform unit 223 may perform the second type of local pre-transformation.
With respect to the pre-transform unit 220 performing L local pre-transformations in parallel, it is assumed that L1 local pre-transformations of the first type are performed and L2 local pre-transformations of the second type are performed (that is, L=L1+L2).
First, a method of designing the information index set I0 and the connection index set AI (where I∈[LI]) for the first type of local pre-transformation is described. The described method may be performed by at least one processor.
The method of designing the information index set I0 and the connection index set AI for the first type of local pre-transformation may be substantially the same as the method of selecting the information index set I0 and the connection index set A0 described above.
The ordered index set R may be defined by Equation 25.
The ordered index set R may be partitioned according to a row-weight of the polar transform matrix, as represented by Equation 26.
where, among Bw(R), indicates the least reliable index and
indicates the most reliable index. gN,i is an ith row of the N×N polar transform matrix.
When min=mini∈R
t(gN,i), the auxiliary set
having the size np and filled with indices included in Bwmin(R) may be generated. In detail, an index corresponding to the least reliable bit may be included in the auxiliary set
. When the number of elements of the auxiliary set
is less than np, a process of using a next largest row weight index set B2wmin(R) may be repeated, to generate the auxiliary set
.
The information index set I0 may be generated from the auxiliary set as represented by Equation 27.
Thereafter, the elements of the auxiliary set may be re-ordered according to a naturally ascending sequence. This may be represented by Equation 28.
The Ith connection index set AI may be generated by using the re-ordered auxiliary set as represented by Equation 29.
Additionally, the Ith information index set II may be generated by Equation 30.
Next, a method of designing the connection index set AI (where I∈[L2]) for the second type of local pre-transformation is described. The described method may be performed by at least one processor.
Given a pair of an index i included in the information index set and an index j included in the subsequent frozen index set, the pre-transform unit 220 may perform the second type of local pre-transformation on elements indicated by the corresponding pair. For the second type of local pre-transformation, G2T may be used as the pre-transform matrix. That is, the second type of local pre-transformation may correspond to a row-merging operation.
The pair i,j may be selected for the purpose of merging the information bits with the suceeding frozen bits, in order to reduce the number of minimum-weight codewords.
The notation may be defined by Equation 31 and Equation 32.
Also, an Ith pair MI may be represented by Equation 33.
where, MI,1 indicates the information index and MI,2 indicates the merged frozen index.
When the information index i∈Bwmin(I0) and the predetermined merged pair MI are given, a candidate Pi of the merged frozen index may be represented by Equation 34.
This denotes that all of subsequent frozen indices not included in the first type of local pre-transformation may become the candidate Pi of the merged frozen index.
With respect to the information index i∈Bwmin(I0), when Equation 35 is satisfied, j∈Pj may be selected as the merged frozen index.
Next, for the information index i∈Bwmin(I0))\(∪IMI,1), when Equation 36 is satisfied, j∈Pj may be selected as the merged frozen index.
Finally, j∈Pj, which satisfies Equation 37, may be selected as the merged frozen index.
As described above, the second type of local pre-transformation may be performed on the determined pair i,j, and thus, the number of minimum-weight codewords may be reduced.
As described above, the information index set and the connection index set are determined, and thus, the first error and the second error may be improved. In detail, the information index set and the connection index set may be determined by taking into account the channel reliability and the minimum-weight rows, and thus, the information bits and the frozen bits may be properly exchanged. Thus, the probability loss of including the correct decoding path in the final list may be minimized (that is, the first error may be reduced), and at the same time, the number of minimum-weight codewords may be reduced, and thus, the weight spectrum of the codeword may be improved (that is, the second error may be reduced).
When a codeword encoded by the transmitter 110 (
The decoder may sequentially search for decoding paths with respect to the received signal y and select the final decoding path from among the decoding paths to generate the received message {circumflex over (m)} corresponding to the received signal y. Here, the number of decoding paths may not exceed a predetermined number.
The decoder may include an SCL decoder.
The decoder may perform the same process on each element. Thus, for brevity of explanation, a process in which the decoder decodes an ith element is described.
When the decoder decodes the ith element, the decoding may be performed by referring to the received signal y and previously decoded elements =[
, . . . ,
]. It is assumed that the decoder may have S hypotheses, at most, with respect to the previously decoded elements. An Ith hypothesis is to be noted as {
}l and is to be referred to as a decoding path.
In operation S301, the decoder may receive the codeword y through the channel.
In operation S302, the decoder may perform decoding firstly on a first element i←1 of the codeword y.
In operation S303, the decoder may identify whether or not the ith element is a frozen bit with respect to each candidate.
In operation S303, when it is determined to be YES, the process may proceed to operation S311 and a value u0. Next, the process may proceed to operation S309 to perform decoding of the i+1th element
When it is determined to be NO in operation S303, the process may proceed to operation S304, and a current decoding path may be copied and the ith element may be assumed to be 0 and 1, to generate the decoding path.
Next, the decoder may perform a process of reducing the decoding paths.
In operation S305, the decoder may determine whether i is included in the connection index set AI and corresponds to the maximum value of the elements of the connection index set AI.
When it is determined to be YES in operation S305, the local pre-transformation Tj corresponding to the connection index set Al may be inversely transformed to check whether or not a current path is a valid path. In detail, in operation S306, an element ûj corresponding to the output of the local pre-transformation Tj may be inversely transformed to obtain an input element {circumflex over (v)}j , and in operation S308, whether or not a frozen bit {circumflex over (v)}j,F
When it is determined to be YES in operation S308, the process may proceed to operation S309 and the decoding may be performed on the next element.
When it is determined to be NO in operation S308, the process may proceed to operation S310, and all but the S most probable decoding paths are removed from the hypothesis, and the process proceeds to operation S309 to decode the next element.
When it is determined to be NO in operation S305, the process may proceed to operation S307 to determine whether there are S decoding paths. When there are more than S decoding paths, the process may proceed to operation S310, and all but the S most probable decoding paths are removed from the hypothesis, and the process proceeds to operation S309 to decode the next element. When there are not more than S decoding paths, the process may proceed to operation S309 to decode the next element.
In operation S312, the decoder may repeat the described process.
In operation S313, the decoder may select the most probable decoding path from among the S decoding paths obtained by decoding up to the last element, and thus, may reconstruct the received message {circumflex over (m)} in operation S314.
The decoder may decode the codeword x encoded based on the parallel local pre-transformation and the polar transformation, and thus, the elements corresponding to the input signal of the polar transformation of the encoder obtained in the decoding process may include the non-consecutive information bits.
The described method may be recorded on a computer-readable recording medium having recorded thereon one or more programs including instructions for executing the method. Examples of the computer-readable recording medium include magnetic media (e.g., hard discs, floppy discs, or magnetic tapes), optical media (e.g., compact disc-read only memories (CD-ROMs), or digital versatile discs (DVDs)), magneto-optical media (e.g., floptical discs), and hardware devices that are specially configured to store and carry out program commands (e.g., ROMs, random-access memories (RAMs), or flash memories). Examples of the program instructions include a high-level language code executable by a computer by using an interpreter, etc., as well as a machine language code, such as the one made by a complier.
The present disclosure is described above as examples, and it would be understood by one of ordinary skill in the art that the present disclosure may be easily modified as other specific forms without changing the technical concept or essential features of the present disclosure. Hence, it will be understood that the embodiments described above are examples in all aspects and are not limiting of the scope of the present disclosure. For example, each of components described as a single unit may be executed in a distributed fashion, and likewise, components described as being distributed may be executed in a combined fashion.
The scope of the present disclosure is indicated by the claims rather than by the detailed description of the disclosure, and it should be understood that the claims and all modifications or modified forms drawn from the concept of the claims are included in the scope of the disclosure.
According to embodiments of the present disclosure, low-complexity decoding for improving the distance characteristic of the polar code through local pre-transformation in a limited block length and using channel polarization may be possible.
Also, according to embodiments of the present disclosure, a foundation technique appropriate for low-latency and high-reliability communication required for next generation communication systems may be provided.
Also, according to embodiments of the present disclosure, a method of designing a pre-transformation polar code appropriate for the low-complexity decoding (for example, successive cancellation (SC)-type decoding, but not limited thereto) using the channel polarization, may be provided.
Also, according to embodiments of the present disclosure, pre-transformation using an upper-triangular matrix may be locally used for a group of carefully selected bits, and thus, the distance characteristic of a codeword may be improved. Also, it may be prevented to discard a correct decoding path in the SC-type decoding.
The effects which may be obtained by the exemplary embodiments of the present disclosure are not limited to the effects described above, and other effects not described may be clearly derived and understood by one of ordinary skill in the art from the descriptions of the exemplary embodiments of the present disclosure hereinafter. That is, the effects not intended but generated by the exemplary embodiments of the present disclosure may also be derived by one of ordinary skill in the art from the exemplary embodiments of the present disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2023-0168015 | Nov 2023 | KR | national |
| 10-2024-0000874 | Jan 2024 | KR | national |