Patent Application
20140199949
1. Technical Field
The present disclosure relates in general to wireless communication devices and in particular to power amplifiers in wireless communication devices.
2. Description of the Related Art
Envelope Tracking (ET) is a method of improving power amplifier (PA) efficiency by dynamically varying the supply voltage to the PA in accordance with the radio frequency (RF) envelope. Radio access technologies such as code division multiple access (CDMA), wideband CDMA (WCDMA), and Long Term Evolution (LTE) have amplitude modulation with up to 8 dB peak to average ratio (PAR). This level of PAR indicates that most of the time, the PA's average transmit power is much lower than the peak power, and PA efficiency is degraded. Envelope tracking reduces the supply voltage when amplitude modulation (AM) is not at its peak, to recover PA efficiency and, as a result, improves current drain and heating performance.
The gain of the PA varies with PA supply voltage as the PA supply voltage is being modulated by the RF envelop. A shaping table is used to shape the supply voltage with RF envelope to achieve constant gain across the relevant transceiver drive levels. Unfortunately the PA gain may be reduced by ˜2.0 dB and requires a corresponding drive level increase. This can be done by increasing the gain of the driver stages on the PA or by increasing the driver requirements of the transceiver causing increased power consumption. However, both of these approaches present difficult and complex challenges.
The described embodiments are to be read in conjunction with the accompanying drawings, wherein:
The illustrative embodiments provide a method and system for improving the gain of a propagation path of a radio frequency (RF) signal while utilizing an envelope tracking (ET) mechanism to provide power to a power amplifier within the propagation path. An envelope tracking (ET) controller either detects or generates, using the ET mechanism, an RF envelope of the RF signal being propagated towards the power amplifier. The ET controller applies envelope pre-distortion to the RF signal which results in a decreasing gain across a propagation path of the RF signal at high transceiver drive levels. The ET controller initiates a function for shaping the supply voltage of the power amplifier by selecting a shaping table. The selected shaping table provides a specific level of increasing amplifier gain at a higher signal drive level. The ET controller shapes the supply voltage for the power amplifier by adjusting values corresponding to the detected RF envelope. As a result, the ET controller enables RF signals to be propagated from the transceiver to an output port of the power amplifier across high and low transceiver drive levels with net constant gain.
In the following detailed description of exemplary embodiments of the disclosure, specific exemplary embodiments in which the various aspects of the disclosure may be practiced are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, architectural, programmatic, mechanical, electrical and other changes may be made without departing from the spirit or scope of the present disclosure. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims and equivalents thereof.
Within the descriptions of the different views of the figures, similar elements are provided similar names and reference numerals as those of the previous figure(s). The specific numerals assigned to the elements are provided solely to aid in the description and are not meant to imply any limitations (structural or functional or otherwise) on the described embodiment.
It is understood that the use of specific component, device and/or parameter names, such as those of the executing utility, logic, and/or firmware described herein, are for example only and not meant to imply any limitations on the described embodiments. The embodiments may thus be described with different nomenclature and/or terminology utilized to describe the components, devices, parameters, methods and/or functions herein, without limitation. References to any specific protocol or proprietary name in describing one or more elements, features or concepts of the embodiments are provided solely as examples of one implementation, and such references do not limit the extension of the claimed embodiments to embodiments in which different element, feature, protocol, or concept names are utilized. Thus, each term utilized herein is to be given its broadest interpretation given the context in which that terms is utilized.
As further described below, implementation of the functional features of the disclosure described herein is provided within processing devices and/or structures and can involve use of a combination of hardware, firmware, as well as several software-level constructs (e.g., program code and/or program instructions and/or pseudo-code) that execute to provide a specific utility for the device or a specific functional logic. The presented figures illustrate both hardware components and software and/or logic components.
Those of ordinary skill in the art will appreciate that the hardware components and basic configurations depicted in the figures may vary. The illustrative components are not intended to be exhaustive, but rather are representative to highlight essential components that are utilized to implement aspects of the described embodiments. For example, other devices/components may be used in addition to or in place of the hardware and/or firmware depicted. The depicted example is not meant to imply architectural or other limitations with respect to the presently described embodiments and/or the general invention.
The description of the illustrative embodiments can be read in conjunction with the accompanying figures. It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements. Embodiments incorporating teachings of the present disclosure are shown and described with respect to the figures presented herein.
With specific reference now to
Wireless communication device 100 is able to wirelessly communicate to base-station 145 via antenna 140. Base station 145 can be any one of a number of different types of network stations and/or antennas associated with the infrastructure of the wireless network and configured to support uplink and downlink communication via one or more of the wireless communication protocols, as known by those skilled in the art.
Transceiver module 130 comprises baseband integrated circuit (BBIC) 133 and radio frequency integrated circuit (RFIC) 132. In one embodiment, RFIC 132 comprises RF transceiver 202, local memory 150, envelope tracking (ET) utility 167, processor 155 and ET controller 160. In an alternate embodiment, at least one of the components indicated as being included within RFIC 132 can be located outside of RFIC 132, within transceiver module 130. Transceiver module 130 also comprises RF processing block 201. RF processing block 201 comprises power amplifier 208, transceiver or modulator 202, and other processing block components shown in
In addition to the above described hardware components of wireless communication device 100, various features of the invention may be completed or supported via software (or firmware) code and/or logic stored within at least one of memory 110 and local memory 150, and respectively executed by DSP 128, processor 105, or local processor 155 of transceiver module 130. Thus, for example, illustrated within memory 110 and/or local memory 150 are a number of software/firmware/logic components/modules, including shaping tables 114, applications 116 and ET utility 167. In one embodiment, processor 105 executes ET utility 167 to provide ET logic 120.
The various components within wireless communication device 100 can be electrically and/or communicatively coupled together as illustrated in
ET controller 160 is coupled to at least one output port of transceiver 202 in order to track the RF envelope of a propagating RF signal. In addition, ET controller 160 is also coupled to ET converter 230. In one implementation, ET converter 230 includes shaping tables 234. However, in another implementation, ET controller 160 receives inputs 240 which include shaping tables 114 (
ET controller 160 improves the gain of a propagation path of an RF signal by utilizing envelope pre-distortion and supply voltage shaping. In transceiver module 130, transceiver 202 propagates an RF signal and ET controller 160 activates an envelope tracking (ET) mechanism to detect or generate an RF envelope of the RF signal propagating along the propagation path. In one embodiment, ET controller 160 detects the In-phase (I) and Quadrature (Q) RF signal components or coordinates, which collectively provide a rectangular coordinate representation of the RF signal. ET controller 160 converts the I and Q signal components to polar components having amplitude and phase. The amplitude of the polar coordinate representation provides the RF signal envelope. In one implementation, ET controller 160 utilizes a Coordinate Rotation Digital Computer (CORDIC) to perform the conversion from rectangular to polar coordinates.
As described above, ET controller 160 either detects or generates, using the ET mechanism, an RF envelope of the RF signal being propagated towards power amplifier 208. Furthermore, ET controller 160 utilizes AM pre-distortion module 205 to apply envelope pre-distortion to the RF signal to appropriately adjust the amplitude of the RF signal envelope to compensate for the increasing gain of power amplifier 208 at high transceiver drive levels. Adjusting the amplitude of the RF signal envelope results in a decreasing RF signal gain (
ET controller 160 shapes the supply voltage for power amplifier 208 by adjusting amplitude values corresponding to the detected RF envelope in order to provide a specific level of increasing amplifier gain at high transceiver drive levels. By shaping the supply voltage and applying envelope pre-distortion, ET controller 160 enables RF signals to be propagated from transceiver 202 to an output port of power amplifier 208 across high and low transceiver drive levels, with a net constant gain. By controlling the ET converter 230 and AM pre-distortion 205 to respectively provide the decreasing RFIC envelope gain and the increasing amplifier envelope gain at high drive levels, envelope tracking of power amplifier 208 can be implemented to benefit amplifier efficiency, without causing a gain reduction in power amplifier 208, which would necessitate a higher power of RF Input 206.
In one embodiment, ET controller 160 initiates the shaping function by accessing a stored data structure having a number of shaping tables that can be utilized to shape the supply voltage to power amplifier 208. ET controller 160 selects, from among the number of shaping tables, a shaping table that provides a specific or pre-determined level of increasing amplifier gain at higher signal drive levels. ET controller 160 adjusts values corresponding to the detected RF envelope using the selected shaping table to provide adjusted envelope values. These adjusted envelope values are utilized to modulate a supply voltage (e.g., VCC 317) to provide a shaped supply voltage to power amplifier 208. With the shaped supply voltage, ET controller 160 provides an increasing amplifier gain at signal drive levels that exceed a threshold drive level. ET controller 160 shapes the supply voltage to achieve constant gain of power amplifier 208 across low signal drive levels and increasing power amplifier gain across higher signal drive levels. Specifically, ET controller 160 adjusts the RF signal envelope to provide an increasing power amplifier gain at high signal drive levels and relatively lower, constant gain at lower signal drive levels. The lower, constant gain is associated with a lower supply voltage to power amplifier 208, and the lower supply voltage is associated with a smaller magnitude of the RF signal envelope.
ET controller 160 initiates envelope pre-distortion by accessing a stored data structure having pre-determined values for a distorted RF signal envelope expected at an output port of power amplifier 208. The distorted RF signal is identified by at least one of an operating frequency band and a communication mode such as an operating condition or environment. ET controller 160 determines using LUT 306 or calculates values that compensate for (a) the predetermined values associated with the distorted RF signal envelope expected in order to maintain appropriate RF signal envelope amplitudes and (b) an increasing amplifier gain at high signal drive levels. ET controller 160 provides pre-distortion of the RF signal envelope using the calculated values, following digital modulation of a corresponding signal envelope. In one embodiment, ET controller 160 applies envelope pre-distortion by providing, via AM pre-distortion module 205: (a) a first, lower amplitude of the RF signal envelope when a magnitude of the RF envelope is large and the power amplifier gain is high; and (b) a second, higher amplitude of the RF envelope when the magnitude of the RF envelope is small and the power amplifier gain is low. By applying envelope pre-distortion using AM pre-distortion module 205, ET controller 160 determines an amplitude adjustment to compensate for an expected power amplifier output distortion and avoids using a feedback mechanism to adjust for a detected power amplifier output distortion. As a result, ET controller 160 enables power amplifier 208 to maintain a pre-established high level of efficiency.
RFIC 132 also comprises envelope tracking (ET) controller 160 which is also coupled to at least one output port of digital modulator 202. RFIC 132 also comprises look up table (LUT) 306. In one implementation, LUT 306 is an Electrically Erasable Programmable Read-Only Memory (EEPROM) LUT. In one implementation, LUT 306 is coupled to both AM pre-distorter 205 and ET controller 160 to facilitate AM pre-distortion and PA supply voltage shaping, respectively. In one embodiment, ET controller 160 includes amplitude modulation (AM) correction module 307 which is utilized by ET controller 160 to retrieve the appropriate pre-distortion data or files from LUT 306. ET controller 160 is able to retrieve from LUT 306 AM pre-distortion values based on at least one of: (a) amplifier gain; (b) offset; (c) RF signal delay; and (d) power amplifier temperature and/or associated component temperature. In one embodiment, ET controller 160 initiates supply voltage shaping by retrieving shaping tables from LUT 306. The shaped supply voltage is provided to power amplifier 208 via ET converter 230. Delay component 310 is coupled to an output port of ET controller 160 and provides specific functionality described in the below paragraphs. Coupled to an output port of delay component 310 is DAC 312 which is coupled to low-pass filter 314. Low-pass filter 314 provides VREF 316 as an output voltage. In one embodiment, VREF 316 represents the adjusted RF signal envelope. In another embodiment, VREF 316 represents the detected or generated RF signal envelope. RFIC 132 also comprises ET converter 230 which is coupled to an output of low-pass filter 314 and which receives VREF 316 as an input voltage which ET converter 230 uses to generate the power amplifier supply voltage. Supply power Vcc is provided to ET converter 230 by source VBATT 317. ET converter 230 provides envelope modulated and voltage shaped supply power VET 318 to power amplifier 208. In shaping the power amplifier supply voltage, ET controller 160 adjusts amplitude values corresponding to the detected RF envelope to generate VREF 316 and modulates Vcc 317 (using ET converter 230) with VREF 316 to generate supply power VET 318. By providing a shaped supply voltage (i.e., VET 318) to power amplifier 208, ET controller 160 provides an increasing gain of power amplifier 208 at higher signal drive levels.
Within the RF signal propagation path, digital modulator 202 provides a digital complex baseband signal pair which is received by AM pre-distortion component 205. AM pre-distortion component 205 provides values to compensate the signals for distortion expected at the output port of power amplifier 208. In one embodiment, the RF input signal envelope is detected and the detected signal envelope is used to determine the appropriate pre-distortion values. ET controller 160 applies an envelope pre-distortion, via AM pre-distortion component 205, to the digital complex baseband signal to compensate the signal amplitude for distortion that is expected at the output of power amplifier 208. In an embodiment, the AM pre-distortion component 205 employs the values using complex arithmetic to adjust the envelope or amplitude of the digital complex baseband signal pair. The applied envelope pre-distortion provides a decreasing RF envelope gain at higher signal drive levels of RF transceiver 202.
Delay components 324 facilitate timing synchronization between propagation of an RF signal to power amplifier 208 and provision of an ET supply voltage to power amplifier 208. The pre-distorted and delayed digital complex baseband signal pair is passed to DACs 326 for converting from digital to analog to form analog baseband signals. The analog baseband signals(s) are low-pass filtered to remove harmonic distortion using filters 216 to form a filtered analog baseband signal. Modulation of the filtered analog baseband signals onto an RF carrier is achieved using multiplier components 328. Multipliers 328 are used to mix the baseband signals with in-phase and quadrature RF carrier signals (not shown) to generate a modulated RF carrier in differential form. Amplifiers 330 provide an additional power gain stage to form an amplified modulated RF signal in differential form. Balun 332 receives the amplified modulated RF signal and provides a corresponding single-ended RF signal to power amplifier 208. In an embodiment, Balun 332 performs one or more balancing functions associated with differences in transmission line characteristics between the respective differential RF signals.
Power amplifier 208 receives as an input signal the corresponding RF signal in synchronization with the envelope tracked supply voltage associated with the RF input signal envelope. The increasing amplifier gain provided by ET converter 230 is substantially compensated for by the decreasing RF envelope gain provided by the applied envelope pre-distortion. Applying envelope distortion within the RF signal propagation path and shaping a power amplifier supply voltage by adjusting values corresponding to the detected RF envelope collectively provide a net constant gain across lower and higher transceiver drive levels of the RF signal propagating along the propagation path.
Enhanced PA envelope gain waveform 516 represents the impact (measured relative to flat gain waveform 518) that applying a shaping function to the supply voltage has on the PA envelope gain. Compared with waveform 460 of plot 450 (
Probability density function waveform 520 indicates that the operating time of envelope-tracking power amplifier (e.g., power amplifier 208) is spent primarily with the power amplifier using a relatively low supply voltage, with only occasional high-voltage excursions on high-power peaks. Based on the statistics that can be obtained using the probability density function, the amplifier's matching can be optimized to achieve the best efficiency by using the target peak- to average-power-ratio signals rather than simply designing for best efficiency at peak power and maximum supply voltage, as would be the case for a fixed-supply power amplifier. Designers can alter the amplifier's matching to increase efficiency around the peak of the signal's probability-density function, even if this necessitates a slight compromise in the peak power efficiency.
The method of
The flowchart and block diagrams in the various figures presented and described herein illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. Thus, while the method processes are described and illustrated in a particular sequence, use of a specific sequence of processes is not meant to imply any limitations on the disclosure. Changes may be made with regards to the sequence of processes without departing from the spirit or scope of the present disclosure. Use of a particular sequence is therefore, not to be taken in a limiting sense, and the scope of the present disclosure extends to the appended claims and equivalents thereof.
In some implementations, certain processes of the methods are combined, performed simultaneously or in a different order, or perhaps omitted, without deviating from the spirit and scope of the disclosure. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
While the disclosure has been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the disclosure. In addition, many modifications may be made to adapt a particular system, device or component thereof to the teachings of the disclosure without departing from the essential scope thereof. Therefore, it is intended that the disclosure not be limited to the particular embodiments disclosed for carrying out this disclosure, but that the disclosure will include all embodiments falling within the scope of the appended claims. Moreover, the use of the terms first, second, etc. do not denote any order or importance, but rather the terms first, second, etc. are used to distinguish one element from another.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present disclosure has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the disclosure in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the disclosure. The embodiment was chosen and described in order to best explain the principles of the disclosure and the practical application, and to enable others of ordinary skill in the art to understand the disclosure for various embodiments with various modifications as are suited to the particular use contemplated.
