Claims
- 1. A method for making an antifuse structure comprising:
- forming a bottom electrode over a supporting substrate;
- depositing a doped antifuse material over said bottom electrode in electrical communication therewith, said antifuse material being doped with at least one of a positive dopant species and a negative dopant species to a dopant level of between about 1.times.10.sup.12 ions per centimeters squared and about 1.times.10.sup.16 ions per centimeters squared;
- forming a top electrode over said doped antifuse material in electrical contact therewith;
- applying a programming voltage between said bottom electrode and said top electrode to cause a reduction in electrical resistance between said bottom electrode and said top electrode due to a programming of said doped antifuse material; and
- forming a double conductive filament path through said doped antifuse material to establish said reduction in electrical resistance between said bottom electrode and said top electrode.
- 2. A method for making an antifuse structure as recited in claim 1, wherein the antifuse material is amorphous silicon, and said forming of said double conductive filament path further includes:
- forming a doped polysilicon filament; and
- forming a silicided filament.
- 3. A method for making an antifuse structure as recited in claim 1, wherein the positive species is Boron.
- 4. A method for making an antifuse structure as recited in claim 1, wherein the negative species is selected from the group consisting of Phosphorous and Arsenic.
- 5. A method for making an antifuse structure as recited in claim 1, wherein the doped antifuse material is deposited from a gaseous mixture.
- 6. A method for making an antifuse structure as recited in claim 5, wherein the gaseous mixture includes a neutral species selected from the group of Ar, N, O.sub.2, and He, and a silane compound gas selected from the group consisting of mono-silane, di-silane, and Si.sub.2 F.sub.6 -silane.
- 7. A method for making an antifuse structure as recited in claim 5, wherein the gaseous mixture includes a p-type gas selected from the group consisting of B.sub.2 H.sub.6 and BF.sub.2.
- 8. A method for making an antifuse structure as recited in claim 5, wherein the gaseous mixture includes an n-type dopant selected from the group consisting of PH.sub.3 and Arsine.
- 9. A method for depositing an antifuse layer to form part of an antifuse structure including a lower electrode, a barrier layer formed over the antifuse layer, and an upper electrode, the method comprising the steps of:
- providing a chemical vapor deposition reactor having a support for supporting a silicon wafer;
- powering up the chemical vapor deposition reactor thereby heating the silicon wafer; and
- introducing a gaseous mixture of a silane compound, and a selected dopant species, and a neutral species into the chemical vapor deposition reactor thereby causing the deposition of an antifuse layer;
- wherein the antifuse layer is capable of receiving a voltage delivered between the upper electrode and the lower electrode which generates a double conductive filament path through the antifuse layer, the double conductive filament is configured to establish a reduction in electrical resistance between the upper electrode and the lower electrode.
- 10. The method for depositing an antifuse layer as recited in claim 9, wherein the neutral species is selected from the group consisting essentially of argon, nitrogen and helium, or a combination thereof.
- 11. The method for depositing an antifuse layer as recited in claim 9, wherein the dopant species is one of an n-type dopant and a p-type dopant.
- 12. The method for depositing an antifuse layer as recited in claim 11, wherein the n-type dopant is selected from the group consisting of PH.sub.3 and Arsine.
- 13. The method for depositing an antifuse layer as recited in claim 11, wherein the p-type dopant is selected from the group consisting essentially of B.sub.2 H.sub.6 and BF.sub.2.
- 14. The method for depositing an antifuse layer as recited in claim 9, wherein the silane compound is selected from the group consisting essentially of mono-silane, di-silane, and Si.sub.2 F.sub.6 -silane.
- 15. The method for depositing an antifuse layer as recited in claim 9, wherein said amorphous silicon layer is deposited to a thickness of between about 400 .ANG. and 2000 .ANG..
- 16. The method for depositing an antifuse layer as recited in claim 9, further comprising the step of:
- forming a dielectric layer over said barrier layer having a thickness of between about 2,000 .ANG. and 10,000 .ANG.;
- forming a via hole though the dielectric layer; and
- depositing a conductive material in said via hole such that the conductive material is in electrical contact with the barrier layer.
- 17. The method for depositing an antifuse layer as recited in claim 9, wherein the step of heating the partially fabricated silicon wafer is performed by increasing the temperature of said support chuck.
- 18. The method for depositing an antifuse layer as recited in claim 9, wherein the partially fabricated silicon wafer may be between about 4 inches and 8 inches in diameter.
- 19. The method for depositing an antifuse layer as recited in claim 9, wherein the step of powering up requires delivering between about 70-150 watts to said chemical vapor deposition reactor.
- 20. The method for depositing an antifuse layer as recited in claim 9, wherein the chemical vapor deposition reactor temperature is set to between about 370.degree. C. and 430.degree. C. during deposition.
- 21. The method for depositing an antifuse layer as recited in claim 9, wherein the method further includes providing a substrate having a plurality of logic devices arranged therein.
- 22. A method or making an antifuse structure, comprising:
- forming a bottom electrode over a supporting substrate;
- depositing a doped antifuse material in a chemical vapor deposition chamber to form said doped antifuse material over said bottom electrode in electrical communication therewith, said antifuse material being doped with at least one of a positive dopant species and a negative dopant species to a dopant level of between about 1.times.10.sup.12 ions per centimeters squared and about 1.times.10.sup.16 ions per centimeters squared, and said depositing includes,
- applying a dose of gaseous silane of between about 70 standard cubic centimeters per minute and about 140 standard cubic centimeters per minute into said chemical vapor deposition chamber;
- continuing said depositing for a time of between about 15 seconds and about 90 seconds to increase a thickness of said doped antifuse material to a range between about 400 .ANG. and 1,400 .ANG.;
- forming a top electrode over said doped antifuse material in electrical contact therewith;
- applying a programming voltage between said bottom electrode and said top electrode; and
- forming a double conductive filament path through said doped antifuse material to establish a reduction in electrical resistance between said bottom electrode and said top electrode.
- 23. A method for making an antifuse structure as recited in claim 22, further comprising:
- injecting said positive dopant species into said chemical vapor deposition chamber at a flow rate of between about 10 sccm and about 80 sccm, wherein said positive dopant species is diborane.
- 24. A method for making an antifuse structure as recited in claim 22, further comprising:
- injecting said negative dopant species into said chemical vapor deposition chamber at a flow rate of between about 5 sccm and about 10 sccm, wherein said negative dopant species is phosphene.
- 25. A method for making an antifuse structure as recited in claim 22, wherein the antifuse material is amorphous silicon, and said forming of said double conductive filament path further includes:
- forming a doped polysilicon filament; and
- forming a silicided filament.
- 26. A method of manufacturing an antifuse structure comprising:
- forming a bottom electrode over a supporting substrate;
- depositing a doped antifuse material in a chemical vapor deposition chamber to form said doped antifuse material over said bottom electrode in electrical communication therewith, said antifuse material being doped with at least one of a positive dopant species and a negative dopant species to a dopant level of between about 1.times.10.sup.12 ions per centimeters squared and about 1.times.10.sup.16 ions per centimeters squared, and said depositing includes,
- applying a dose of gaseous silane of between about 70 standard cubic centimeters per minute and about 140 standard cubic centimeters per minute into said chemical vapor deposition chamber;
- forming a top electrode over said doped antifuse material in electrical contact therewith; and
- applying a programming voltage between said bottom electrode and said top electrode to cause a programming of said antifuse structure, the applying configured to form a doped polysilicon filament in the doped antifuse material and at least one silicided filament within the doped polysilicon filament.
- 27. A method of manufacturing an antifuse structure as recited in claim 26, further comprising:
- injecting said positive dopant species into said chemical vapor deposition chamber at a flow rate of between about 10 sccm and about 80 sccm, wherein said positive dopant species is diborane.
- 28. A method of manufacturing an antifuse structure as recited in claim 26, further comprising:
- injecting said negative dopant species into said chemical vapor deposition chamber at a flow rate of between about 5 sccm and about 10 sccm, wherein said negative dopant species is phosphene.
- 29. A method of manufacturing an antifuse structure as recited in claim 26, wherein the antifuse material is amorphous silicon, and said forming of said double conductive filament path further includes:
- forming a doped polysilicon filament; and
- forming a silicided filament.
- 30. A method of manufacturing an antifuse structure as recited in claim 27, further comprising:
- powering up said chemical vapor deposition chamber to between about 70-150 watts after the injecting of the positive dopant species and the applying a dose of gaseous silane.
- 31. A method of manufacturing an antifuse structure as recited in claim 28, further comprising:
- powering up said chemical vapor deposition chamber to between about 70-150 watts after the injecting of the negative dopant species and the applying a dose of gaseous silane.
CROSS REFERENCE TO RELATED APPLICATIONS
This application is related to the following U.S. patent application Ser. No. 08/699,867 (attorney docket no. VTI1P152/2446) filed on the same day as the instant application, and Koucheng Wu, Ivan Sanchez, Yu-Pin Han and Ying-Tsong Loh as inventors, and entitled Method and Apparatus for Programming Antifuse Structures. This application is hereby incorporated by reference.
US Referenced Citations (32)
Foreign Referenced Citations (1)
Number |
Date |
Country |
0 455 414 A1 |
Jun 1991 |
EPX |