Claims
- 1. A method for manufacturing a superconducting three-terminal device, comprising the step of forming on a substrate an oxide superconductor thin film having a planar upper surface, depositing a gate insulator layer on said planar upper surface of said oxide superconductor thin film, forming on said gate insulator layer at least one protection layer having an end surface positioned above a channel region of said superconducting thin film, and depositing on said end surface of said at least one insulating protection layer a thin film of a conducting material so that said deposited thin film of said conducting material forms a gate electrode in the form of a thin film having a lower end in contact with said gate insulator layer.
- 2. A method for manufacturing a superconducting field effect transistor, comprising the steps of depositing an oxide superconductor thin film on a substrate having a stepped portion, selectively removing the deposited oxide superconductor thin film from the substrate so as to leave the deposited oxide superconductor thin film on only the side surface of said stepped portion, filling a material into a recess formed by said stepped portion so that a planar upper surface is formed on said substrate and an upper end of the remaining oxide superconductor thin film deposited on said stepped portion is exposed on said planar upper surface, forming a gate insulator layer on said planar upper surface, forming a superconducting channel layer on said gate insulator layer, and forming a source electrode and a drain electrode on said superconducting channel layer.
- 3. A method for manufacturing a superconducting three terminal device, comprising the steps of forming an oxide superconductor thin film on a substrate, depositing an extremely thin insulator layer on said oxide superconductor thin film, forming on a portion of said gate insulator layer, a source electrode having an end surface substantially perpendicular to said substrate so that said source electrode is in electrical connection with said oxide superconductor thin film because of flocculation generated in said extremely thin insulator layer, depositing on said end surface of said source electrode a gate electrode in the form of a thin film surrounded by a gate insulator layer in such a manner that a plane of the thin film of said gate electrode is substantially perpendicular to said substrate, and forming on said extremely thin insulator layer a drain electrode adjacent to said gate insulator layer surrounding said gate electrode in the form of a thin film so that said drain electrode is in electrical connection with said oxide superconductor thin film because of flocculation generated in said extremely thin insulator layer.
Priority Claims (3)
Number |
Date |
Country |
Kind |
2-294287 |
Oct 1990 |
JPX |
|
2-294288 |
Oct 1990 |
JPX |
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2-294289 |
Oct 1990 |
JPX |
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Parent Case Info
This is a divisional of allowed application Ser. No. 08/242,074 filed on May 13, 1994, now U.S. Pat. No. 5,471,069, which is a continuation of application Ser. No. 07/785,324 filed on Oct. 31, 1991 (now abandoned).
US Referenced Citations (2)
Number |
Name |
Date |
Kind |
5466664 |
Inada et al. |
Nov 1995 |
|
5494891 |
Nakamura et al. |
Feb 1996 |
|
Foreign Referenced Citations (1)
Number |
Date |
Country |
2-194665 |
Aug 1990 |
JPX |
Divisions (1)
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Number |
Date |
Country |
Parent |
242074 |
May 1994 |
|
Continuations (1)
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Number |
Date |
Country |
Parent |
785324 |
Oct 1991 |
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