Patent Application
20160164250
This application claims priority to European Patent Application No. 14 306 985.4 filed on Dec. 9, 2014, the entire contents of which are incorporated herein by reference.
The present invention relates to optical transmitters, and more precisely to manufacture of such optical transmitters.
In some technical domains, such as data center short reach optical links, one needs optical transmitters operating at very high bit rates, typically greater than 10 Gbit/s. To this effect, the optical transmitters generally comprise integrated Vertical Cavity Surface Emitting Lasers (or VCSELs). However, these VCSELs are limited in bandwidth and reach, and need to be cooled in order their optical component temperature of operation be stabilized. This cooling is generally performed by a Thermo-Electric Cooler (or TEC) that is included in the optical module containing the optical transmitter, and which increases not only the power consumption by a large factor but also the dimensions and bulkiness of the optical module.
Some optical transmitters are able to work without cooling, but they comprise only discrete laser components that are limited to a single wavelength. Moreover they do not allow size reduction and/or cost reduction and/or power consumption reduction.
Advanced products for 4×10 Gbit/s uncooled transmitters on a CWDM (“Coarse Wavelength Division Multiplexing”) grid have been also proposed in scientific literature. They are based on photonic integration technologies and could be able to support 4×25 Gbits/s. But they require very specific technology building blocks that are not available broadly and a huge investment in product development for component manufacturers.
Silicium-Photonics technology appears to be a promising technology due to its potential for cost reduction and integration with CMOS electronics. However no uncooled transmitter technology is presently available on any Silicium-Photonics platform.
So an object of this invention is to improve the situation.
In an embodiment, a method is intended for manufacturing an optical transmitter comprising structures defining together transmission means, and comprises:
a first step in which an InP (Indium Phosphide) wafer is bonded on a substrate comprising silicon, then this InP wafer is made thinner to become an InP buffer,
a second step in which a dielectric mask is laid onto this InP buffer, then openings are patterned into chosen locations of this dielectric mask, and
a third step in which the structures are grown into corresponding patterned openings, then remaining parts of the dielectric mask are removed.
This allows manufacturing optical transmitters operating at very high bit rates, typically greater than 10 Gbit/s, and that do not require any cooling.
The method may include additional characteristics considered separately or combined, and notably:
in its third step the structures may be defined by Metal Organic Vapour Phase Epitaxy based Selective Area Growth (or MOVPE based SAG);
in its first step the thickness of the InP buffer may be comprised between approximately 50 nm and approximately 5 μm;
in its first step the InP wafer may be bonded on the substrate by means of a molecular bonding technique;
in its first step the InP wafer may be made thinner by means of a technique chosen from a group comprising a chemical mechanical polishing, a special etch-stop layer chemical under-etch, and a peeling using hydrogen or helium ion implantation;
in its first step the substrate may be chosen from a group comprising a silicon substrate and a silicon on insulator (or SOI) substrate;
at least one of the structures may comprise a single quantum well or multiple quantum wells made with III/V semiconducting materials.
In another embodiment, an optical transmitter comprises:
a substrate comprising silicon,
an InP buffer bonded on this substrate and resulting from a thinning of a bonded InP wafer, and
structures defining transmission means together and grown on the InP buffer into corresponding openings previously patterned into chosen locations of a dielectric mask laid onto the InP buffer and finally removed.
For instance, this optical transmitter may comprise:
a first structure defining a spot-size converter,
a second structure defining a semiconductor optical amplifier and connected to an output of this spot-size converter,
a third structure defining passive waveguides and connected to an output of this semiconductor optical amplifier,
a fourth structure defining a multimode interference component and connected to an output of these passive waveguides,
fifth structures defining passive waveguides and connected to an output of this multimode interference component, and
sixth structures defining coarse wavelength division multiplexing emitters and connected respectively to outputs of these passive waveguides.
Some embodiments of a manufacturing method and an optical transmitter in accordance with embodiments of the present invention are now described, by way of example only, and with reference to the accompanying drawings, in which:
Hereafter is notably disclosed a method intended for manufacturing an optical transmitter 8 comprising structures 7j defining together transmission means.
One means here by “transmission means” any integrated passive or active means that can participate to the transmission of photons. So, it may be a spot-size converter, a semiconductor optical amplifier (or SOA), a waveguide, a multimode interference (or MMI) component, a modulator, a coarse wavelength division multiplexing emitter (or CWDM) that comprises a laser, or a series of lasers with a coupler that may be an arrayed waveguide grating (or AWG), or an echelle grating, or a MMI coupler, or cascading Y junctions, for instance.
A manufacturing method according to the invention comprises at least three steps. It starts from a substrate 1 comprising silicon. For instance, this substrate 1 may be a silicon substrate or a silicon on insulator (or SOI) substrate.
Preferably and as illustrated in
During the first step an InP (Indium Phosphide) wafer 3 is bonded on the substrate 1. The result of this second sub step of the first step is illustrated in
Then the InP wafer 3 is made thinner to become an InP buffer 4. The result of this third sub step of the first step is illustrated in
The thickness of the InP buffer 4 can be comprised between approximately 50 nm and approximately 5 μm. The choice of the thickness depends mainly from the type of coupling towards the optical waveguide, as known by those skilled in the art.
During a second step of the manufacturing method a dielectric mask 5 is laid onto the InP buffer 4, then openings 6 are patterned into chosen locations of this dielectric mask 5. These openings 6 are defined in locations where structures 7 defining transmission means must be defined. The result of (this fourth sub step of) the second step is illustrated in
For instance, the dielectric mask 5 may be made of SiO2 material.
The openings 6 can be patterned into the dielectric mask 5 by any technique known by those skilled in the art, and notably by standard lithography and etching techniques.
During a third step of the manufacturing method the structures 7j (defining transmission means) are grown into corresponding patterned openings 6. The result of this fifth sub step of the third step is illustrated in
For instance, these structures 7j may be defined by Metal Organic Vapour Phase Epitaxy based Selective Area Growth (or MOVPE based SAG). Such a growth technique being well-known by those skilled in the art, it will not be described hereafter.
Preferably all the structures 7j are defined simultaneously in all the corresponding openings 6.
Also for instance, at least one of the structures 7j may comprise a single quantum well (or SQW) or multiple quantum wells (MQW) made with III/V semiconducting materials. For instance, each SQW or MQW can be made of InAlGaAs/InP or InGaAsP/InP or AlInGaAs/GaAs.
In the case where MOVPE based SAG technique is used, the opening pattern can be calculated in order to define islands during SAG growth on underlying InP buffer 4 bonded to silicon or SOI substrate 1, with III/V materials having different characteristic wavelength (notably when incorporated in laser waveguide structures). Indeed, a specific spatial distribution of material properties in different islands can be advantageously created by the SAG process when it occurs on a thin InP buffer bonded onto a silicon or SOI substrate.
Then, remaining parts of the dielectric mask 5 are removed to produce an optical transmitter 8. The result of this sixth sub step of the third step is illustrated in
The remaining parts of the dielectric mask 5 can be removed by any technique known by those skilled in the art, and notably by chemical products, or by wet chemical etching and/or plasma etching, or else by a combination of at least two of the preceding techniques.
The manufacturing method may further comprise a fourth step during which at least one structure 7j is individually connected to an external driving circuit, for instance via conductive tracks or by flip-chip bonding or else by any other means known by those skilled in the art.
An example of an optical transmitter 8 manufactured by means of the method described above is schematically illustrated in
It is important to note that the optical transmitter 8 described in the last paragraph is only an example. A lot of other combinations of structures 7j may be envisaged by those skilled in the art.
The invention allows manufacturing of optical transmitters operating at very high bit rates, typically greater than 10 Gbit/s, and that do not require any cooling. This allows CWDM transmission chips to be built on a Silicium-Photonics platform, notably for 100 Gbit/s/400 Gbit/s Ethernet applications.
It should be appreciated by those skilled in the art that any block diagram herein represent conceptual views of illustrative circuitry embodying the principles of the invention.
The description and drawings merely illustrate the principles of the invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the invention and the concepts contributed by the inventor(s) to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.
| Number | Date | Country | Kind |
|---|---|---|---|
| 14306985.4 | Dec 2014 | EP | regional |
