The present disclosure relates to a field of display technology, and more specifically to a method for manufacturing a color-filter-on-array (COA) type liquid crystal panel, and a COA type liquid crystal panel that can improve a pixel aperture ratio.
A liquid crystal display (LCD) has the advantages of thinness, electricity saving, no radiation, and so on, and thereby has been widely used, for example, used in an LCD television, a mobile phone, a personal digital assistant (PDA), a digital camera, a computer screen, a laptop screen, or the like.
Generally, the LCD includes a case, a liquid crystal panel disposed in the case, and a backlight module disposed in the case. The structure of liquid crystal panel mainly includes a thin film transistor (TFT) array substrate, a color filter (CF) substrate, and a liquid crystal layer between the TFT array substrate and the CF substrate. The working principle of the liquid crystal panel is that the rotation of liquid crystal molecules in the liquid crystal layer is controlled by applying a driving voltage to two glass substrates so that light produced by the backlight module can be refracted to generate an image.
A COA technology is that a color resist layer on a CF substrate is disposed on an array substrate. The delay of the signals of metal traces is improved since there is a reduction of couplings between pixel electrodes and the metal traces in a COA structure. The COA structure can obviously reduce stray capacitances, and can improve the aperture ratio and display quality of a panel.
Please refer to
However, in an existing film formation order, a via hole structure is formed by boring a hole on an insulative layer and a color resist layer, and the diameter of the hole 261 of the color resist layer is greater than the diameter of the hole of the insulative layer. The via hole structure can lose a large part of a pixel aperture ratio.
Therefore, the pixel design of the existing COA type liquid crystal panel needs to be improved to simplify the manufacturing process thereof and improve the pixel aperture ratio.
An object of the present disclosure is to provide a method for manufacturing a COA type liquid crystal panel, and a COA type liquid crystal panel that can simplify the manufacturing process thereof and improve a pixel aperture ratio.
To achieve the above object, the present disclosure provides a method for manufacturing a COA type liquid crystal panel. The method includes the following steps of: providing a first substrate, and forming sequentially a first metal layer and a first insulative layer onto the first substrate; forming sequentially a color resist layer and a second insulative layer onto the first insulative layer, where the color resist layer is formed by processes such as coating, exposing, and developing, and the color resist layer is a single color resist layer, a double color resist layer, or a triple color resist layer; forming sequentially a semiconductor layer and a second metal layer onto the second insulative layer, and forming a third insulative layer covering the second insulative layer onto the second metal layer; and forming a via hole in the third insulative layer, and forming a pixel electrode layer onto the third insulative layer, where the pixel electrode layer connects to the second metal layer via the via hole.
To achieve the above object, the present disclosure provides a method for manufacturing a COA type liquid crystal panel. The method includes the following steps of: providing a first substrate, and forming sequentially a first metal layer and a first insulative layer onto the first substrate; forming sequentially a color resist layer and a second insulative layer onto the first insulative layer; forming sequentially a semiconductor layer and a second metal layer onto the second insulative layer, and forming a third insulative layer covering the second insulative layer onto the second metal layer; and forming a via hole in the third insulative layer, and forming a pixel electrode layer onto the third insulative layer, where the pixel electrode layer connects to the second metal layer via the via hole.
To achieve the above object, the present disclosure further provides a COA type liquid crystal panel including an array substrate. The array substrate includes a plurality of pixel areas, each of the pixel areas includes a first metal layer, a first insulative layer, a color resist layer, a second insulative layer, a semiconductor layer and a second metal layer which are sequentially formed on the second insulative layer, a third insulative layer which is disposed on the second metal layer and is coated on the second insulative layer, and a pixel electrode layer disposed on the third insulative layer in sequence; a via hole is provided on the third insulative layer, and the pixel electrode layer connects to the second metal layer via the via hole.
The present disclosure has the following advantages. By arranging the film formation and patterning of the color resist layer before the second metal layer, a hole is bored in the third insulative layer so as to form a via hole structure. Therefore, boring on the color resist layer is avoided, the manufacturing process thereof is simplified, and the pixel aperture ratio is improved.
A method for manufacturing a COA type liquid crystal panel and a COA type liquid crystal panel provided by the present disclosure will now be described with reference to annexed drawings and embodiments. The embodiments in the following description are merely a part rather than all of the embodiments of the present disclosure. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments of the present disclosure without creative efforts shall fall within the protection scope of the present disclosure.
Please refer to
In step S31, the first substrate is provided, and the first metal layer and the first insulative layer are sequentially formed on the first substrate.
Specifically, the first metal layer is formed on the first substrate by processes such as depositing and patterning, and then the first insulative layer is deposited on the first metal layer. The first insulative layer can be a SiNx layer.
Specifically, the first substrate can be the array substrate of the COA type liquid crystal panel. The first metal layer includes a gate electrode. The first insulative layer is a gate electrode insulating layer disposed on the gate electrode. The array substrate further has a scanning line connecting the gate electrode thereon.
In step S32, the color resist layer and the second insulative layer are sequentially formed on the first insulative layer.
Specifically, the color resist layer is formed on the first insulative layer by processes such as coating, exposing, and developing, and then the second insulative layer is deposited on the color resist layer. The second insulative layer can be a SiNx layer.
Optionally, the color resist layer is a single color resist layer, a double color resist layer, or a triple color resist layer. Please refer to
In step S33, the semiconductor layer and the second metal layer are sequentially formed on the second insulative layer, and the third insulative layer covering the second insulative layer is formed on the second metal layer.
Specifically, a semiconductor film is deposited on the second insulative layer. The semiconductor film is etched to form the semiconductor layer. The second metal layer is formed on the second insulative layer by processes such as depositing and patterning. The third insulative layer is deposited on the second metal layer. The second metal layer connects to the semiconductor layer. The third insulative layer is covered on the second insulative layer. The second insulative layer and the third insulative layer are a SiNx layer. The material of the semiconductor layer can be amorphous silicon (a-Si).
Specifically, the first substrate can be the array substrate of the COA type liquid crystal panel. The second metal layer includes a source/drain electrode. The third insulative layer is a passivation layer which is disposed on the source/drain electrode and is coated on the second insulative layer. The source/drain electrode connects to the semiconductor layer. The array substrate further has a data line connecting the source/drain electrode thereon. The data line is disposed on the second insulative layer, and the data line and the scanning line are vertically crossed each other in a horizontal direction.
The step S33 specifically includes the following steps of: depositing sequentially an i-a-Si layer and an n-a-Si layer onto the gate electrode insulating layer corresponding the position of the gate electrode, and patterning the i-a-Si layer; forming the source/drain electrode and the data line onto the second insulative layer by processes such as depositing and patterning, where the source/drain electrode connects to the semiconductor layer, and the data line connects to the source/drain electrode; etching the n-a-Si; and depositing the SiNx layer.
In step S34, the via hole is formed on the third insulative layer, and the pixel electrode layer is formed on the third insulative layer. The pixel electrode layer connects to the second metal layer via the via hole.
Specifically, the via hole is formed in the third insulative layer and on the second metal layer by a patterning process. The pixel electrode layer is formed on the third insulative layer by processes such as depositing and patterning. The pixel electrode layer connects to the second metal layer via the via hole. Specifically, the pixel electrode layer connects to the source/drain electrode via the via hole. The material of the pixel electrode layer can be indium tin oxide (ITO).
At this point, the first substrate as the array substrate is completed. Then, the first substrate and the second substrate are combined with each other, and a liquid crystal layer is provided therebetween to achieve the manufacture of the COA type liquid crystal panel. The second substrate has a black matrix layer thereon. The black matrix layer has a common electrode layer thereon. The material of the common electrode layer can be indium tin oxide.
In the method for manufacturing the COA type liquid crystal panel of the disclosure, by arranging the film formation and patterning of the color resist layer before the second metal layer, boring on the color resist layer is avoided, and a via hole structure can be formed. Therefore, the manufacturing process thereof is simplified, and the pixel aperture ratio is improved.
Please refer to
Specifically, the first insulative layer 52, the second insulative layer 54, and the third insulative layer 57 can be a SiNx layer. The material of the pixel electrode layer can be indium tin oxide (ITO). The material of the semiconductor layer can be amorphous silicon (a-Si).
Specifically, the first metal layer 51 includes a gate electrode. The first insulative layer 52 is a gate electrode insulating layer disposed on the gate electrode. The array substrate further has a scanning line connecting the gate electrode thereon. The second metal layer 56 includes a source/drain electrode. The third insulative layer 57 is a passivation layer which is disposed on the source/drain electrode and is coated on the second insulative layer 54. The source/drain electrode connects to the semiconductor layer 55 (
Optionally, the color resist layer is a single color resist layer, a double color resist layer, or a triple color resist layer. The structure of the color resist layer can refer to
The COA type liquid crystal panel further includes a glass substrate which are opposite the array substrate and a liquid crystal layer between the array substrate and glass substrate. The glass substrate has a black matrix layer thereon. The black matrix layer has a common electrode layer thereon. The material of the common electrode layer can be indium tin oxide.
In the COA type liquid crystal panel of the disclosure, by arranging the film formation and patterning of the color resist layer before the second metal layer, a hole is bored in the third insulative layer so as to form a via hole structure. Therefore, the manufacturing process thereof is simplified, and the pixel aperture ratio is improved.
The above are exemplary embodiments of the present disclosure. It should be noted that a number of improvements and modifications may be made by those of ordinary skill in the art without departing from the principles of the present disclosure, and should be considered as falling within the scope of the disclosure.
Number | Date | Country | Kind |
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201611046276.9 | Nov 2016 | CN | national |
Filing Document | Filing Date | Country | Kind |
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PCT/CN2016/112533 | 12/28/2016 | WO | 00 |