Claims
- 1. A method for manufacturing a superconducting device comprising:
- preparing a substrate having a principal surface thereof;
- forming a c-axis orientated oxide superconductor thin film on the principal surface of the substrate;
- forming a stacked structure over a portion of the c-axis orientated oxide superconductor thin film, the stacked structure including
- a gate insulator formed directly on the c-axis orientated oxide superconductor thin film and
- a gate electrode formed on the gate insulator; and
- forming a superconducting source region and a superconducting drain region of a-axis orientated oxide superconductor thin films at sides of the gate electrode such that the superconducting source region and the superconducting drain region are electrically isolated from the gate electrode.
- 2. A method according to claim 1 wherein the c-axis orientated oxide superconductor thin film and the a-axis orientated oxide superconductor thin films are formed of the same oxide superconductor material selected from the group consisting of Y--Ba--Cu--O based compound oxide superconductor materials, Bi--Sr--Ca--Cu--O based compound oxide superconductor materials, and Tl--Ba--Ca--Cu--O based compound oxide superconductor materials.
- 3. A method according to claim 2 wherein the stacked structure includes a layer of a refractory metal or a silicide thereof.
- 4. A method according to claim 2 wherein the gate electrode is formed of a material selected from the group consisting of Au, Ti, W, and silicides thereof.
- 5. A method according to claim 2 wherein the substrate is formed of a material selected from the group consisting of a MgO (100) substrate, a SrTiO.sub.3 (100) substrate, a CdNdAlO.sub.4 (001) substrate, and a semiconductor substrate.
- 6. A method according to claim 2 wherein the substrate is a silicon substrate having the principal surface coated with an insulating material layer formed of a MgAlO.sub.4 layer and a BaTiO.sub.3 layer.
- 7. A method according to claim 2 further including the step of selectively etching the c-axis orientated oxide superconductor thin film to remove the c-axis orientated oxide superconductor thin film except for the portion of the c-axis orientated oxide superconductor thin film under the stacked structure to expose a portion of the principal surface of the substrate, wherein the a-axis orientated oxide superconductor thin films are grown on the exposed portion of the principal surface of the substrate.
- 8. A method according to claim 7 wherein the c-axis orientated oxide superconductor thin film is formed to have a thickness of about 5 nanometers and the gate insulator is formed of MgO to have a thickness of not less than 10 nanometers.
- 9. A method according to claim 2, wherein the stacked structure is formed by
- forming an insulating layer on the c-axis orientated oxide superconductor thin film;
- forming a normally conductive material layer on the insulating layer;
- etching the normally conductive material layer to form the gate electrode; and
- etching the insulating layer to form the gate insulator.
- 10. A method according to claim 9, wherein the formation of the stacked structure further includes forming a refractory material layer on the normally conductive material layer, and
- etching the refractory material layer to form a mask of refractory material.
- 11. A method according to claim 9, wherein the normally conductive material layer and the insulating layer are etched so that the gate electrode is wider than the gate insulator.
- 12. A method according to claim 2, wherein the stacked structure is formed by
- forming a normally conductive material layer on the c-axis orientated oxide superconductor thin film;
- etching the normally conductive material layer and the c-axis orientated oxide superconductor thin film to form a gate electrode on a projection from the c-axis orientated oxide superconductor thin film; and
- heating the projection under a high vacuum so as to cause oxygen in oxide superconductor crystals of the projection to escape, thereby causing the projection to form a gate insulator.
- 13. A method according to claim 7, wherein the a-axis orientated oxide superconductor thin film is separated from the c-axis orientated oxide superconductor thin film by normally conductive material.
- 14. A method according to claim 7, wherein the a-axis orientated oxide superconductor thin film is grown on the exposed portion of the principal surface of the substrate using the stacked structure as a mask.
- 15. A method according to claim 2, further including the step of forming gate insulating side walls on sides of the gate electrode, such that the superconducting source region and the superconducting drain region are electrically separated from the gate electrode by the gate insulating side walls.
- 16. A method according to claim 15, wherein the a-axis orientated oxide superconductor thin films are formed on the c-axis orientated oxide superconductor thin film.
- 17. A method according to claim 12 wherein the c-axis orientated oxide superconductor thin film is formed to have an initial thickness of about 20 nanometers and the gate insulator is formed to have a thickness of not less than 10 nanometers.
Priority Claims (2)
Number |
Date |
Country |
Kind |
2-259157 |
Sep 1990 |
JPX |
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2-259160 |
Sep 1990 |
JPX |
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Parent Case Info
This is a divisional of application Ser. No. 07/766,184 filed on Sep. 27, 1991, now U.S. Pat. No. 5,407,903.
US Referenced Citations (3)
Number |
Name |
Date |
Kind |
5126315 |
Nishino et al. |
Jun 1992 |
|
5236896 |
Nakamura et al. |
Aug 1993 |
|
5274249 |
Xi et al. |
Dec 1993 |
|
Foreign Referenced Citations (3)
Number |
Date |
Country |
1-101676 |
Apr 1989 |
JPX |
1-170080 |
Jul 1989 |
JPX |
1-239886 |
Sep 1989 |
JPX |
Non-Patent Literature Citations (2)
Entry |
Wu et al., "High Critical Currents in Epitaxial Y-Ba-Cu-O Thin Films On Silicon With Buffer Layers," Appl. Phys. Lett., vol. 54, #8, 20 Feb. 1989, pp. 754-756. |
Mizuno et al., "Fabrication Of Thin-Film-Type Josephson Junctions Using A Bi-Sr-Ca-Cu-O/Bi-Sr-Cu-O/Bi-Sr-Ca-Cu-O Structure," Appl. Phys. lett., vol. 56, #15, 9 Apr. 1990, ppo. 1469-1471. |
Divisions (1)
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Number |
Date |
Country |
Parent |
766184 |
Sep 1991 |
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