Patent Application
20130056738
1. Field of the Invention
The present invention relates to a technology characterized in a thin film transistor which is used in an image display apparatus, an active matrix substrate and the like, and a manufacturing method of the thin film transistor.
2. Background Art
In recent years, as the image display apparatus, an image display apparatus such as a liquid crystal display apparatus, an electrophoresis display apparatus and an organic electroluminescence display apparatus which applies an active matrix substrate configured of the thin film transistor thereto has been widely used.
In the image display apparatus which applies the active matrix substrate thereto, as disclosed in JP-B-8-16757, amorphous silicon or polycrystalline silicon is mainly used for the semiconductor material of the thin film transistor. In addition, a thin film transistor which uses a metallic oxide for the semiconductor material has been actively developed in recent years.
The thin film transistor is generally configured of a gate electrode, a gate insulation film, a source electrode, a drain electrode and a semiconductor layer, and is produced in a manner such that a conductive material, an insulation material and semiconductor material are deposited and patterned. A commonly used film formation method is a vacuum film formation method such as a chemical vapor deposition method (Chemical Vapor Deposition; CVD method) or a sputtering method. As a patterning method, photolithography is the most common.
In this way, a vacuum film formation process and a photolithography process are commonly used in manufacturing the thin film transistor. The complicated manufacturing process leads to increased manufacturing costs.
The present invention is made in consideration of the above-described circumstances, and aims to provide a thin film transistor and an image display apparatus which can be manufactured by reducing and simplifying the number of manufacturing processes.
A first aspect of the present invention is a method for manufacturing a thin film transistor, including:
forming a gate electrode on a substrate;
forming a gate insulation film so as to cover the gate electrode;
forming a source electrode and a drain electrode on the gate insulation film;
forming a semiconductor layer connected to the source electrode and the drain electrode;
forming a protection film so as to overlap a portion of the source electrode and the drain electrode immediately above the semiconductor layer; and
patterning the semiconductor layer using the protection film as a mask.
A second aspect of the present invention is a thin film transistor, including:
a substrate;
a gate electrode and a capacitor electrode that are formed on the substrate at intervals;
a gate insulation film that covers the gate electrode;
a source electrode and a drain electrode that are formed on the gate insulation film at intervals;
a semiconductor layer formed so as to connect the source electrode and the drain electrode;
a protection film that has an isolated island-like pattern and is formed on the semiconductor layer;
an interlayer insulation film formed so as to cover the source electrode; and
a pixel electrode that is formed on the interlayer insulation film and electrically connected to the drain electrode,
wherein the protection film allows the semiconductor layer to form a pattern.
According to the present invention, a protection film formed on a semiconductor layer is formed like an island at intervals and consequently it is possible to pattern the semiconductor layer using the protection film as a mask when etching the semiconductor layer. For that reason, it is unnecessary to perform a process using a photoresist or the like for the patterning of the semiconductor layer and thereby a manufacturing process can be reduced.
In addition, as the protection film is formed of an organic material, it is possible to form the protection film using a printing method. As a result, manufacturing costs can be suppressed.
As the protection film is set to have a layered structure of an inorganic material and organic materials, it is possible to consecutively deposit the protection film formed of the inorganic material, after the film formation of the semiconductor layer. As a result, it is possible to lessen damage to the surface of the semiconductor layer in the manufacturing process.
In addition, according to the present invention, the protection film formed on the semiconductor layer is used as the mask when etching. As a result, since it is possible to reduce a photolithography process or the like for patterning the semiconductor layer, the number of the manufacturing processes in manufacturing the thin film transistor may be reduced and additionally the manufacturing may be simplified.
Herein, since an ink jet method is used, it is possible to easily form a pattern on the protection film which is isolated like an island.
In addition, since a relief printing method is used, it is possible to form the protection film at a low cost and with high throughput.
Furthermore, since the protection film is set to have a layered structure, it is possible to consecutively deposit the protection film after the film formation on the entire surface of the semiconductor layer and it is possible to relieve the damage to aback channel portion of the semiconductor layer.
In addition, since the formation of the protection film as a stripe pattern in parallel to a wiring pattern of the source electrode is suitable for a case where the relief printing method is used, it is possible to form the protection film with alignment precision and a good yield.
Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, in the embodiments, the same configuration elements have the same reference numerals and a repeated description will be omitted in each embodiment.
In the thin film transistor of the present embodiment, as illustrated in
A method for manufacturing the thin film transistor of the present invention includes a first process to a sixth process as follows. That is, a first process of forming a gate electrode 2 on a substrate 1; a second process of forming a gate insulation film 4 which is formed so as to cover the gate electrode 2, on the gate electrode 2; a third process of forming a source electrode 5 and a drain electrode 6 which are formed on the gate electrode 2; a fourth process of forming a semiconductor layer 7 connected to the source electrode 5 and the drain electrode 6; a fifth process of forming a protection film 8 immediately above the semiconductor layer 7; and a sixth process of patterning the semiconductor layer 7 using the protection film 8 as a mask are provided.
In addition,
A method for manufacturing the active matrix substrate of the present embodiment includes a seventh process of forming an interlayer insulation film 9 and an eighth process of forming a pixel electrode 10, in addition to the first to the sixth processes which are processes for manufacturing the thin film transistor. The active matrix substrate is formed by forming the thin film transistor on the substrate in a matrix form.
Hereinafter, a method for manufacturing of the thin film transistor and a method for manufacturing the active matrix substrate of the present embodiment will be described in detail along the processes.
As the substrate 1 according to the present embodiment, polymethyl methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, polyether sulfone, triacetylcellulose, polyvinyl fluoride film, ethylene-tetrafluoroethylene copolymer resin, weather resistant polyethylene terephthalate, weather resistant polypropylene, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, transparent polyimide, fluorine-based resin, cyclic polyolefin-based resin, glass, quartz and the like can be used. The substrate 1 of the present invention is not limited thereto. Although these may be used alone, a combination substrate 1 which has two or more types layered thereon can be used.
In a case where the substrate 1 according to the present embodiment is an organic film, it is preferable to form a transparent gas barrier layer (not illustrated) in order to improve the durability of the thin film transistor. As the gas barrier layer, examples include aluminum oxide (Al2O3), silicon oxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), silicon carbide (SiC) and diamond-like carbon (DLC). The present invention is not limited thereto. In addition, it is possible to use the gas barrier layer by laminating two or more layers. The gas barrier layer may be formed on only one surface of the substrate 1 where the organic film is used and may be formed on both surfaces. The gas barrier layer can be formed using a vacuum evaporation method, an ion plating method, a sputtering method, a laser ablation method, a plasma CVD (Chemical Vapor Deposition) method, a hot wire CVD method and a sol-gel method. In addition, the present invention is not limited thereto.
First, as illustrated in
Each electrode (gate electrode 2, capacitor electrode 3, source electrode 5, drain electrode 6 and pixel electrode 10) and the wiring connected to each electrode according to the present embodiment can be formed using a conductive material such as aluminum (Al), copper (Cu), molybdenum (Mo), silver (Ag), chromium (Cr), tungsten (W), gold (Au), platinum (Pt), titanium (Ti) and indium tin oxide (ITO). In addition, these materials maybe used in a single layer, laminated layers or as an alloy.
However, it is more preferable to form the gate, the capacitor, the source and the drain with the same material and layered structure in order to reduce the number of the processes.
Each electrode and the wiring can be formed using the vacuum evaporation method, the ion plating method, the sputtering method, the laser ablation method, the plasma CVD method, a photo-CVD method, the hot wire CVD method, a screen printing method, a relief printing method, an ink jet method and the like. However, without being limited thereto, any general method which is publicly known can be used. For example, there is a method where the film of the conductive material is formed on the entire surface of the substrate, a resist film is formed on a necessary pattern forming portion using the photolithography method thereon and an unnecessary portion is removed by etching, or a method where the patterning is directly formed by a printing method using ink of the conductive material, or the like. However, without being limited thereto, any general patterning method which is publicly known can be used.
Next, as illustrated in
As materials used for the gate insulation film 4 according to the present embodiment, examples include inorganic materials such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium aluminate, zirconium oxide, titanium oxide, or polyacrylate such as PMMA (polymethyl methacrylate), PVA (polyvinyl alcohol), PVP (polyvinyl phenol) and the like. However, the materials are not limited thereto. Resistivity of the insulation material is preferably equal to or more than 1011 Ωcm and more preferably equal to or more than 1014 Ωcm in order to suppress a gate leakage current.
The gate insulation film 4 is formed depending on the material, appropriately using a vacuum film formation method such as the vacuum evaporation method, the ion plating method, the sputtering method, the laser ablation method, the plasma CVD method, a photo-CVD method, the hot wire CVD method, or a wet film formation method such as a spin coating method, dip coating method and the screen printing method. The gate insulation film 4 may be used as a single layer, two or more layers. In addition, the composition maybe tilted toward the growth direction.
Next, as illustrated in
Next, as illustrated in
As the semiconductor layer 7 according to the present embodiment, oxide semiconductor material whose main component is metallic oxide can be used. The oxide semiconductor material is an oxide containing one or more elements among zinc (Zn), indium (In), tin (Sn), tungsten (W), magnesium (Mg) and gallium (Ga). For example, examples include materials such as zinc oxide (ZnO), indium oxide (InO), indium zinc oxide (IN—Zn—O), tin oxide (SnO), tungsten oxide (WO) and gallium indium zinc oxide (In—Ga—Zn—O). The structure of the materials may be any of single crystal, polycrystal, microcrystal, mixed crystal of crystal and amorphous, nanocrystal dispersed amorphous, and amorphous.
The semiconductor layer 7 can be formed using the vacuum film formation method such as the CVD method, the sputtering method, a pulsed laser deposition method and the vacuum evaporation method, the sol-gel method where organometallic is used as precursor or a chemical bath sedimentation method, in addition, the wet film formation method such as a method where a solution obtained by dispersing fine crystal and nanocrystal of the metallic oxide is applied. However, the method is not limited thereto.
Next, as illustrated in
In general, since the protection film 8 is formed after patterning the semiconductor layer 7, it is necessary to perform a process that the etching is performed by applying the resist which becomes the mask during the etching, on the semiconductor layer 7, and then the resist is stripped. In contrast, in the present embodiment, since the protection film 8 is formed, the patterning process on the semiconductor layer 7 can be omitted and the patterning of the semiconductor layer 7 can be performed without any damage to the semiconductor layer 7.
Furthermore, as illustrated in
More specifically, as illustrated in
Next, as illustrated in
The material for the protection film 8 may preferably have tolerance with respect to an etchant used in patterning the semiconductor layer 7 or sufficient selection ratio during the etching. For example, as the inorganic material, silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium aluminate, zirconium oxide, titanium oxide or the like can be used. As the organic material, polyacrylate such as PMMA (polymethyl methacrylate), PVA (polyvinyl alcohol), PVP (polyvinyl phenol), fluorine resin and the like can be used. However, the material is not limited thereto. In addition, the inorganic insulation material maybe mixed with the organic insulation material. Since the protection film 8 does not electrically affect the semiconductor layer 7 of the thin film transistor according to the present invention, the resistivity may be equal to or more than 1011 Ωcm and more specifically equal to or more than 1014 Ωcm.
The protection film 8 is formed depending on the material, appropriately using a vacuum film formation method such as the vacuum evaporation method, the ion plating method, the sputtering method, the laser ablation method, the plasma CVD method, a photo-CVD method, the hot wire CVD method, or a wet film formation method such as the ink jet method, the relief printing method, the screen printing method, a microcontact printing method. The protection film 8 may be a multi-layer structure in two or more layers using one or multiple manufacturing methods, the materials as described above. Specifically, when the protection film 8 is patterned like the isolated island as illustrated in
In addition, as illustrated in
Through the above processes, the protection film 8 which has the multi-layer structure can be easily formed. Of course, in this case, as the film of the protection film 8b is further formed in multiple layers, the protection film 8b can also have the multi-layer structure. For example, it is considered that the insulation material which can control the characteristics of the semiconductor layer 7 is used for the layer in contact with the semiconductor layer 7 and the insulation material with high barrier properties is used for the upper layer thereon.
In order to form the active matrix substrate using the thin film transistor according to the present embodiment, as illustrated in
The interlayer insulation film 9 according to the present embodiment can be formed using inorganic materials such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium aluminate, zirconium oxide, titanium oxide, or polyacrylate such as PMMA (polymethyl methacrylate), PVA (polyvinyl alcohol), PS (polystyrene), PVP (polyvinyl phenol) transparent polyimide, polyester, epoxy resin and the like. However, the material is not limited thereto.
In order that the interlayer insulation film 9 may insulate the source electrode 5 and the pixel electrode 10, it is preferable that the resistivity be equal to or more than 1011 Ωcm and more specifically equal to or more than 1014 Ωcm. The interlayer insulation film 9 may have the same material as the gate insulation film 4 or the protection film 8 or may have a different material. In addition, the interlayer insulation film 9 may be used by layering two or more layers.
The interlayer insulation film 9 is formed depending on the material appropriately using a dry film formation method such as the vacuum evaporation method, the ion plating method, the sputtering method, the laser ablation method, the plasma CVD method, the photo-CVD method, the hot wire CVD method, or the wet film formation method such as a spin coating method, a dip coating method, the screen printing method.
The interlayer insulation film 9 has an opening 9a on the drain electrode 6 and can connect the drain electrode 6 and the pixel electrode 10 via the opening 9a. The opening 9a is provided using a well-known known method such as the photolithography method or the etching, at the same time as or after the formation of the interlayer insulation film 9. Since the interlayer insulation film 9 is used, it is possible to form the pixel electrode on the source electrode 5 as well and consequently an aperture ratio of the image display apparatus can be improved.
Next, a conductive material is subject to film formation on the interlayer insulation film 9, patterned in a predetermined pixel shape and the pixel electrode 10 is formed as illustrated in
In addition, as illustrated in
Examples of the display element include an electrophoresis display medium (electronic paper), a liquid crystal display medium, an organic EL, an inorganic EL or the like. As a laminating method of the display element 11, the opposing electrode 12 and the opposing substrate 13, a method of bonding the laminating body which has the opposing substrate 13, the opposing electrode 12 and the display element 11, on the pixel electrode 10, or a method of sequentially laminating the display element 11, the opposing electrode 12 and the opposing substrate 13 on the pixel electrode 10 may be appropriately selected depending on the kind of display element.
As a first embodiment based on the present invention, an active matrix substrate illustrated in
As a substrate 1, an alkali-free glass EAGLE 2000 made by Corning Incorporated was used. ITO was deposited with a film thickness of 100 nm on the substrate 1 using a DC magnetron sputtering method and a patterning was performed for a desired shape using a photolithography method. More specifically, after applying a photosensitive positive photoresist, exposing and developing by alkaline developing agent was performed, and a resist pattern of a desired shape was formed. Etching was further performed using an ITO etching solution to dissolve the unnecessary ITO. Then, the photoresist was removed using a resist stripping solution and a gate electrode 2 and a capacitor electrode 3 of a desired shape were formed (hereinafter, such a patterning method is referred to as a photolithography method and omitted in description).
Next, on the entire surface other than an outward connecting portion of the gate electrode 2 and the capacitor electrode 3 of the substrate 1 where the gate electrode 2 and the capacitor electrode 3 were formed, silicon nitride (SiN) was deposited with a film thickness of 300 nm to become a gate insulation film 4 using a PECVD method.
In succession, ITO was deposited with a film thickness of 100 nm, using a DC magnetron sputtering method, the patterning was performed for a desired shape using the photolithography method and a source electrode 5 and a drain electrode 6 were formed.
Then, as a semiconductor layer 7, indium gallium zinc oxide (In—Ga—Zn—O) with a film thickness of 40 nm was deposited on the entire surface of the substrate using a RF magnetron sputtering method.
In a region forming a channel portion of a thin film transistor on a semiconductor layer 7 subjected to film formation on the entire surface of the substrate, fluororesin was dropped so as to have an isolated island-like pattern, using an inkjet method, so as to overlap the source electrode 5 and a portion of the drain electrode 6, then baking was performed and a protection film 8 was formed.
Then, the substrate 1 was immersed into 0.1 M hydrochloric acid solution, an unnecessary portion of the semiconductor layer 7 was dissolved using the protection film as a mask, and the patterning was performed for the semiconductor layer 7.
Next, a photosensitive acrylic resin was applied with a film thickness of 3 μm, and exposing, developing and baking were performed to form an interlayer insulation film 9.
ITO was deposited thereon with a film thickness of 100 nm using the DC magnetron sputtering method and the patterning was performed using the photolithography method to forma pixel electrode 10. In this manner, the active matrix substrate of the first embodiment based on the present invention was manufactured.
As a second embodiment based on the present invention, an active matrix substrate illustrated in
As a substrate 1, an alkali-free glass eagle 2000 made by Corning Incorporated was used. ITO was deposited with a film thickness of 100 nm on the substrate 1 using a DC magnetron sputtering method and a patterning was performed for a desired shape using a photolithography method. More specifically, after applying a photosensitive positive photoresist, exposing and developing by alkaline developing agent were performed, and a resist pattern of a desired shape was formed. Etching was further performed using an ITO etching solution to dissolve the unnecessary ITO. Then, the photoresist was removed using a resist stripping solution and a gate electrode 2 and a capacitor electrode 3 of a desired shape were formed (hereinafter, such a patterning method is referred to as a photolithography method and omitted in description).
Next, on the entire surface other than an outward connecting portion of the gate electrode 2 and the capacitor electrode 3 of the substrate 1 where the gate electrode 2 and the capacitor electrode 3 were formed, silicon nitride (SiN) was deposited with the film thickness of 300 nm to become a gate insulation film 4 using a PECVD method.
In succession, ITO was deposited with a film thickness of 100 nm, using a DC magnetron sputtering method, the patterning was performed for a desired shape using the photolithography method and a source electrode 5 and a drain electrode 6 were formed.
Then, as a semiconductor layer 7, indium gallium zinc oxide (In—Ga—Zn—O) with a film thickness of 40 nm was deposited on the entire surface of the substrate using a RF magnetron sputtering method.
In a region forming a channel portion of a thin film transistor on a semiconductor layer 7 subjected to film formation on the entire surface of the substrate, fluororesin was printed so as to have a strip pattern in parallel to a wiring pattern of a source electrode 5, using a relief printing method, so as to overlap the source electrode 5 and a portion of the drain electrode 6, then baking was performed and a protection film 8 was formed.
Then, the substrate 1 was immersed into 0.1 M hydrochloric acid solution, an unnecessary portion of the semiconductor layer 7 was dissolved using the protection film 8 as a mask, and the patterning was performed for the semiconductor layer 7.
Next, a photosensitive acrylic resin was applied with a film thickness of 3 μm, and exposing, developing and baking were performed to form an interlayer insulation film 9.
ITO was deposited thereon with a film thickness of 100 nm using the DC magnetron sputtering method and the patterning was performed using the photolithography method to form a pixel electrode 10. In this manner, the active matrix substrate of the second embodiment based on the present invention was manufactured.
As a third embodiment based on the present invention, an active matrix substrate illustrated in
As a substrate 1, an alkali-free glass EAGLE 2000 made by Corning Incorporated was used. ITO was deposited with a film thickness of 100 nm on the substrate 1 using a DC magnetron sputtering method and a patterning was performed for a desired shape using a photolithography method. More specifically, after applying a photosensitive positive photoresist, exposing and developing by alkaline developing agent were performed, and a resist pattern of a desired shape was formed. Etching was further performed using an ITO etching solution to dissolve the unnecessary ITO. Then, the photoresist was removed using a resist stripping solution and a gate electrode 2 and a capacitor electrode 3 of a desired shape were formed (hereinafter, such a patterning method is referred to as a photolithography method and omitted in description).
Next, on the entire surface other than an outward connecting portion of the gate electrode 2 and the capacitor electrode 3 of the substrate 1 where the gate electrode 2 and the capacitor electrode 3 were formed, silicon nitride (SiN) was deposited with a film thickness of 300 nm to form a gate insulation film 4 using a PECVD method.
In succession, ITO was deposited with a film thickness of 100 nm, using a DC magnetron sputtering method, the patterning was performed for a desired shape using the photolithography method and a source electrode 5 and a drain electrode 6 were formed.
Then, as a semiconductor layer 7, indium gallium zinc oxide (In—Ga—Zn—O) with a film thickness of 40 nm was deposited on the entire surface of the substrate using a RF magnetron sputtering method.
In succession, as a lower protection film 8a, SiON film with a film thickness of 80 nm was deposited on the entire surface of the substrate using a RF magnetron sputtering method. In a region forming a channel portion of a thin film transistor on the lower protection film 8a, fluororesin was dropped, using an inkjet method, so as to overlap the source electrode 5 and a portion of the drain electrode 6, baking was performed, and an upper protection film 8b was formed.
Thereafter, using the upper protection film 8b as a mask, etching was performed for an unnecessary portion of the lower protection film 8a by reactive ion etching. Subsequently, the substrate 1 was immersed into 0.1 M hydrochloric acid solution and etching was performed for the unnecessary portion of the semiconductor layer 7.
Next, a photosensitive acrylic resin was applied with a film thickness of 3 μm, and exposing, developing and baking were performed to form an interlayer insulation film 9.
ITO was deposited thereon with a film thickness of 100 nm using the DC magnetron sputtering method, the patterning was performed using the photolithography method and a pixel electrode 10 was formed. In this manner, the active matrix substrate of the third embodiment based on the present invention was manufactured.
As described above, in the method for manufacturing the image display apparatus according to embodiments of the present invention, since the semiconductor layer 7 are patterned using the protection film 8 as the mask, the photolithography process for patterning the semiconductor layer can be reduced and consequently the manufacturing process can be simplified.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-078573 | Mar 2010 | JP | national |
| 2010-078575 | Mar 2010 | JP | national |
This application is a continuation of International Application No. PCT/JP2011/054639, filed Mar. 1, 2011, which is incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2011/054639 | Mar 2011 | US |
| Child | 13629075 | US |
