Current sources and current sinks are commonly used to provide regulated currents in circuits of all types. As shown in
For some applications, it is desirable to use a series of current sinks or sources driven using the same set voltage, Vset. In an arrangement of this type, each current sink or current source defines a separate channel for current flowing to ground. For the currents in each channel to be equal, all duplicated elements must exactly match in value and characteristics. Unfortunately, mismatches inevitably result because manufacturing variations are unavoidable. Though mismatch between sense-resistors can be minimized with careful layout, random offset within each amplifier is more difficult to correct and can contribute directly to mismatch between channel currents. In fact, random offset is often the main contributor to mismatch—particularly where R is small since I=Vset/R+VOS/R. Consider for example, a hypothetical low power implementation where R is 2 Ohms. If Vos is in the range of −10 mV to 10 mV, then VOS/R can be as large as 5 mA. This would be significant for the case where Vset/R is 20 mA (which would not be unusual for low power devices).
For this reason, U.S. patent application Ser. No. 10/970,061 (incorporated in this document by reference) describes a method for sharing a single operational amplifier between a series of channels. As shown in
The present invention includes a pre-charge method for amplifier sharing for multi-channel current sink and current sources. For a representative embodiment, a series of current sinks are controlled using a single operational amplifier. Each current sink includes a MOSFET connected through a sense resistor to ground. A feedback sense node is defined for each current sink as the voltage over the sense resistor. The voltage at the feedback sense node is proportional to the current flowing through the MOSFET. That current is used to drive a load, such as an LED.
For a typical implementation of the pre-charge method, each channel is selected in sequence (e.g., Channel A followed by Channel B, followed by Channel C, followed by Channel A, etc.). As each channel is selected, a two-phase refresh cycle is initiated. During the first phase of the refresh cycle, the amplifier is set into a state that is close to the actual operating condition of the selected channel, before it is used to drive that channel. This is accomplished by first setting the amplifier into a unity gain configuration, with its positive input being driven by the gate of the selected channel MOSFET and its holding capacitor. During the second phase of the refresh cycle, the amplifier is used to adjust the current flowing through the selected channel to a desired level.
Two multiplexers are used to perform channel selection (M1 and M2). As each channel is selected, these multiplexers are configured to:
For the second phase of the refresh cycle, the switch and the multiplexers M3 and M4 are configured to:
In practice, the use of the two-phase refresh cycle minimizes current variations as the operational amplifier is switched between channels.
Selection of channel in a predetermined sequence as described above has many advantages with simplicity of implementation being perhaps the most important. On the other hand, there are also cases where it may be advantageous to select channels in a non-predetermined sequence. As an example, there may be devices in which different channels have different priorities (i.e., one or more channels may be more important than the remaining channels). Alternately, there may be devices in which the number of channels is dynamic and changes over time.
For these reasons, the present invention adds a step in which the next channel is selected algorithmically. The exact algorithm used for selection may be chosen to accomplish any number of goals, including prioritization of channels or support for dynamically changing number of channels. The present invention specifically includes the case where a random selection method is used to choose the next channel.
The present invention includes a pre-charge method for amplifier sharing in multi-channel current sink and current sources.
Channels 302 are selected in an algorithmic (typically) rotating sequence. For the three channel implementation shown, channel 302a would typically be selected, followed by channel 302b, channel 302c and back to channel 302a. It should be appreciated that other selection strategies and algorithms may also be used. Multiplexers M1 and M2 are used to perform channel selection. To select a channel 302, multiplexer M1 is used to connect the channel's current sense node to a node S. Multiplexer M2 is used to connect the channel's MOSFET gate to a node G. A variable shift register (not shown) is typically used to control the channel selection by multiplexers M1 and M2. The shift register is preferably configured to skip over any channel that has been disabled and refresh only those channels that are intended to conduct current. Typically, this is accomplished using a second register that includes one enable/disable bit per channel. To prevent current flow, it is preferable to ground the gates of all disabled channels.
Multi-channel current sink 300 also includes an operational amplifier 304. As each channel 302 is selected, a two-phase refresh cycle is initiated. During the first phase of the refresh cycle, amplifier 304 is set into a state that is close to the actual operating condition of the selected channel 302, before it is used to drive that channel 302. This is accomplished by first setting amplifier 304 into a unity gain configuration, with its positive input being driven by the gate of the selected channel 302 and its holding capacitor. During the second phase of the refresh cycle, amplifier 304 is used to adjust the current flowing through the selected channel 302 to a desired level.
Multiplexers (M3 and M4) and a switch (SW1) are used to implement the two-phase refresh cycle. For the first phase of the refresh cycle, switch SW1 is opened and multiplexers M3 and M4 are configured to select their “A” inputs. The result is the circuit shown in
This circuit is maintained for a period of time (approximately 4 uS for current implementations), allowing the output of amplifier 304 output to charge to the gate voltage of the selected channel 302 (also referred to as pre-charging of operational amplifier 304). For the second phase of the refresh cycle, switch SW1 is closed and the M3 and M4 are configured to select their “B” inputs. The result is the circuit shown in
A small break before make time is set between settings on M3 and M4.
The circuit shown in
The implementations described above are based, in part on the current sink topology of
In the preceding description it is noted that channels are selected in a typically rotating fashion (i.e., first A, then B then C, etc.). For the embodiments being described, each channel is selected algorithmically. A simple example of algorithmic selection is selection in random order or pseudo random order. Using this type of algorithmic selection means that the identity of the next selected channel is unrelated to the identity of the currently selected channel. Over time, this method ensures that each channel is selected an approximately equal number of times.
The random selection scheme may be modified to assign different probabilities to different channels. Over time, this means that the channels are selected in proportion to their assigned probabilities. This method is attractive when one or more channels are “more important” than other channels.
A second method of algorithmic selection chooses channels based on priority. For this method, each channel has an associated priority. The highest priority channel is always selected. The priority of the channels may change over time allowing channels with previously lower priority to be selected. One method that allows this to happen is to dynamically decrement a channel's priority after it has been selected. This means that the priority of non-selected channels increases over time and ensures their eventual selection.