Number | Name | Date | Kind |
---|---|---|---|
T944001 | Hanan et al. | Mar 1976 | |
4495559 | Gelatt, Jr. et al. | Jan 1985 | |
4593363 | Burstein et al. | Jun 1986 | |
4815003 | Putatunda et al. | Mar 1989 | |
4890238 | Klein et al. | Dec 1989 | |
4908772 | Chi | Mar 1990 |
Entry |
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"Partitioning and Placement Technique for CMOS Gate Arrays" by G. Odawara et al; IEEE Trans. on Computer-Aided Design, vol. CAD-6, No. 3, May 1987, pp. 355-363. |
"An Efficient Heuristic Procedure for Partitioning Graphs" by Kermghan et al; The Bell System Technical Journal, Feb. 1970, pp. 291-307. |
"A Linear-Time Heuristic for Improviding Network Partitions" by Fiducco et al; IEEE 19th Design Automation Conf., 1982, pp. 175-181. |