Patent Application
20240370632
The present disclosure relates to performing a design rule check (DRC) on a design for an electronic device, and in particular to determining whether a DRC error corresponds to an actual error in the design that needs to be addressed.
Design rules ensure that a design of an electronic device, such as an integrated circuit, will produce a device with acceptable performance, reliability, manufacturing yield, or combinations thereof. Design rules specify, for example, constraints on width, spacing, areas, aspect ratios, fill density, and the like for elements of integrated circuit, and are usually specific to the process that will be used to manufacture the integrated circuit.
A set of design rules for a process may be referred to as a DRC deck. Performing a design rule check (DRC) comprises evaluating a design to see if it conforms with the design rules in the DRC deck for the process on which the design is to be manufactured. The DRC may be performed by applying the DRC deck to a design database (e.g., a design layout database) including the layout of the electronic device or to a portion (e.g., a block) of the electronic device in the design database.
A DRC result may correspond to a list having entries (i.e., DRC errors) indicating a design rule that was violated, a component of the design that produced the violation, and a number of times that design rule was violated within that component.
The DRC result may include a large number of such entries; however, especially in early stages of the design process, many of those DRC errors may be ignored. Also, in some situations, some DRC errors may be waived.
The process (known as annotating the DRC errors) of determining which DRC errors to ignore or waive, and which should be addressed by altering the design of the electronic device can be overwhelming, which may result in design time and expenditures increasing and in some important DRC errors being overlooked.
Embodiments of the present disclosure relate to performing a Design Rule Check (DRC), and in particular to determining annotations for DRC errors in a DRC result using a neural network and the design database, wherein the annotations indicate whether the corresponding DRC error should be ignored.
In an embodiment, a method of performing a design rule check (DRC) performed by a computer comprises receiving a DRC result comprising a plurality of DRC errors, the DRC result corresponding to a DRC deck comprising a plurality of rules and a design layout database comprising a plurality of components; classifying, using a neural network, each of the plurality of DRC errors according to whether that DRC error should be ignored; and producing a final report including a plurality of respective indications of whether the plurality of DRC errors should be ignored. Each DRC error comprises an indication of a rule of the plurality of rules, an indication of a component of the plurality of components, and a count of the number of times the rule was violated by the component.
In another embodiment, a system for performing a DRC comprises a processor and a neural network. The system is configured to perform steps comprising receiving a DRC result comprising a plurality of DRC errors, the DRC result corresponding to a DRC deck comprising a plurality of rules and a design layout database comprising a plurality of components; classifying, using a neural network, each of the plurality of DRC errors according to whether that DRC error should be ignored; and producing a final report including a plurality of respective indications of whether the plurality of DRC errors should be ignored. Each DRC error comprises an indication of a rule of the plurality of rules, an indication of a component of the plurality of components, and a count of the number of times the rule was violated by the component.
In another embodiment, a non-transient computer-readable medium (CRM) comprises computer programming instructions that, when executed by a processor, perform a method comprising receiving a DRC result comprising a plurality of DRC errors, the DRC result corresponding to a DRC deck comprising a plurality of rules and a design layout database comprising a plurality of components; classifying, using a neural network, each of the plurality of DRC errors according to whether that DRC error should be ignored; and producing a final report including a plurality of respective indications of whether the plurality of DRC errors should be ignored. Each DRC error comprises an indication of a rule of the plurality of rules, an indication of a component of the plurality of components, and a count of the number of times the rule was violated by the component.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various embodiments of the invention and, together with a general description of the invention given above and the detailed description of the embodiments given below, serve to explain the embodiments of the invention. In the drawings, like reference numerals refer to like features in the various views.
Exemplary embodiments of the present disclosure will be described below in more detail with reference to the accompanying drawings. The inventive features may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present claims to those skilled in the art. Throughout the disclosure, like reference numerals refer to like parts throughout the various figures and embodiments.
It will be understood that, although the terms “first” and/or “second” may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For instance, a first element discussed below could be termed a second element without departing from the teachings of the present disclosure. Similarly, the second element could also be termed the first element.
The drawings are not necessarily to scale and in some instances, proportions may have been exaggerated in order to clearly illustrate features of the embodiments.
The DRC process 100 uses a DRC tool 106 to apply a DRC Deck 104 comprising a plurality of design rules to a Design Layout Database 102, and produces a DRC Result 108 indicating one or more DRC errors. A DRC error may indicate which design rule was violated, which object in the Design Layout Database 102 violated that rule, and how many times that object violated that rule. A DRC error may also indicate a stack name indicating a layer of the design (for example, “metal2”), a text description of the rule, or both. An illustrative example of a DRC Result 108 produced by the DRC Tool 106 is provided in
A DRC Result Classifier 110 processes the DRC Result 108 to determine which DRC errors represent issues that may be ignored or waived, as opposed to issues that should be corrected. A DRC error may be ignored or waived when, for example, the object that violated the rule is a test structure, when the design is an intermediate (incomplete) design and the DRC error is likely to be remedied in the course of finalizing design, or when the DRC Deck needs to be updated.
The DRC Result Classifier 110 includes a Preprocessor 112 and a Neural Network 114. The Preprocessor 112 transforms the DRC Result 108 into an encoded form that is more suitable for use as an input to the Neural Network 114. The Neural Network 114 determines whether the DRC errors in the DRC Result 108 should be ignored or not.
Using the Preprocessor 112 and the Neural Network 114, the DRC Result Classifier 110 produces a Final Report 116 that may include all the DRC errors and an indication for each DRC error of whether that DRC error should be ignored. In an embodiment, the DRC Result Classifier 110 may be configurable to output a Final Report 116 including only the DRC errors that should not be ignored.
The Final Report 116 may be reviewed (for example, by one or more designers, some other automated process, or both) and any mistakes identified in the Final Report 116 (such as a DRC error being indicated as ignorable when it should not be, or a DRC error not being indicated as ignorable when it should be) provided to the DRC Result Classifier 110 as Mistake Feedback.
In response to receiving the Mistake Feedback, the DRC Result Classifier 110 may update the DRC Result Dataset 118 that was used to train the Neural Network 114, and may retrain the Neural Network 114 using the updated DRC Result Dataset 118. The retrained Neural Network 114 would be used in subsequent performance of the DRC process 100.
In an embodiment, when the DRC Deck 104 is provided to a user of the DRC process 100 (such as, for example, when a foundry supplies a DRC deck for a process to a client intending to use that process), an initial DRC Result Dataset 118 corresponding to the provided DRC Deck 104, a Neural Network 114 trained according to such an initial DRC Result Dataset 118, or both may also be provided to the user.
Subsequently, the user of the DRC process 100 may update the provided DRC Result Dataset 118 to create a DRC Result Dataset 118 specific to that user, and may retrain the Neural Network 114 to produce a Neural Network 114 specific to that user.
Different DRC Result Datasets 118 may be used for different stages of a design process for a device, respectively, so that respective different Neural Networks 114 may be used in the DRC Result Classifier 110 for the different stages.
At S212, the Classification process 210 pre-processes the DRC Result. The pre-processing transforms the text-based DRC Result into a form more amenable to use by a neural network by encoding text fields in the DRC Result into numerical values.
The encoding of the text fields into numerical values may be performed using, for example, preprocessing functionality provided by scikit-learn (referred to herein as sklearn). In an embodiment, an encoder such as the sklearn LabelEncoder may be used to transforms each unique value in the text field(s) to a corresponding unique integer within a numerical range. In another embodiment, an encoder such as sklearn count vectorization that encodes each unique value in the text field(s) to a corresponding unique Boolean vector may be used to create the encodings, which may allow additional unique values to be added to the encodings later without changing the previous encodings.
In another embodiment, character-based text tokenization may be used to create the encodings for the text values in the DRC Result, which may improve the neural network's ability to take into account similarity between two text values (such as between “Design Rule #1” and “Design Rule #1bis”) and to enable the handling of rules not present in the database that was used to train the neural network. In an embodiment, the character-based text tokenization may produce an encoding for rules, components, or both based on both the name of the rule or component and a description thereof.
The pre-processed DRC Result of
Returning to
In embodiments, the indication of whether the DRC error can be ignored may be a Boolean value indicating either true or false. In another embodiment, the indication of whether the DRC error can be ignored may be a confidence value ranging from 0 to 1.
At S216, the Classification process 210 produces the Final Report 116 by associating results from the Neural Network 114 with the corresponding DRC errors and unencoding the values in the DRC errors to produce entries respectively corresponding to the DRC errors in the Final Report 116. In embodiments, additional information (such as corresponding rule descriptions and component restrictions) may be added to the entries in the Final Report 116. The Final Report 116 may then be provided to a designer or to another tool used in the design process.
The Final Report 116 includes an entry for each DRC Error in the DRC Result 108, the entry including the Rule, Count, and Component information for the DRC Error and the result from the classification of the DRC Error by the Neural Network 114.
In the illustrated embodiment, the result of the classification of the DRC error by the Neural Network 114 indicates whether the error is an error that should be addressed or is an error that should be ignored. In another embodiment, the result of the classification of the DRC error by the Neural Network 114 is a confidence that the error should be ignored (such as may be expressed as a value between 0 to 1, which 0 indicating a high confidence that the DRC error is an actual error and 1 indicating a high confidence that the DRC Error should be ignored).
In the illustrated embodiment, all DRC errors in the DRC Result 108 have a corresponding entry in the Final Report 116. In another embodiment, DRC errors that are not classified as being ignorable (or, in an embodiment producing a confidence value, not classified as being ignorable with a confidence value above a threshold value) have corresponding entries in the Final Report 116, and DRC errors that are classified as being ignorable (or classified as being ignorable with a confidence value above a threshold value) do not have corresponding entries in the Final Report 116.
The Final Report 116 may include an identifier indicating the Neural Network 114 that produced the Final Report 116, the DRC Result Dataset 118 used to train that Neural Network 114, or both, and the Mistake Feedback may include one or more of those indications. In another embodiment, the Final Report 116 may include a unique identifier for itself, and the DRC Result Classifier 110 may maintain a database of which Neural Network 114 produced the Final Report 116 having that unique identifier, the Result Dataset 118 used to train that Neural Network 114, or both. Accordingly, in an environment having multiple distinct Neural Network 114 intended for classification of DRC errors in different contexts, the Update process may identify the Neural Network 114 and DRC Result Dataset 118 to update based on an identifier in the Mistake Feedback.
The Mistake Feedback may include an entry from the Final Report 116 and an indication that the entry was erroneous (e.g., that it was marked “Ignore” when it should not have been, or vice-versa) or an indication of what the result of the classification process should have been. In an embodiment where some DRC errors do not have corresponding entries in the Final Report 116, the Mistake Feedback may include a DRC error and an indication that it should have been included in the Final Report. Entries in the Mistake Feedback may have a format similar to that of entries in the Final Report, such as is shown in
At S222, in the illustrated embodiment wherein the DRC Result Dataset 118 includes entries with encoded text values, as described above, the Update process 220 may pre-process the Mistake Feedback in the same manner as described with respect to S212 of Classification process 210 of
At S224, the Update process 220 updates the DRC Result Dataset 118 used to train the Neural Network 114 that produced the Final Report 116 using the (in some embodiments, pre-processed) Mistake Feedback that relates to that Final Report 116.
Incorporating the Mistake Feedback may include replacing a previous entry in the DRC Result Dataset 118 that the Mistake Feedback indicates is erroneous, adding a new entry to the DRC Result Dataset 118 when an entry in the Mistake Feedback has no corresponding entry in the DRC Result Dataset 118, or both.
For example, when the DRC Result Dataset 118 includes a dataset entry corresponding to a mistake entry in the Mistake Feedback, the flag or value related to whether DRC errors corresponding to that dataset entry may be ignored may be updated with the corresponding value from the mistake entry.
In embodiments, a dataset entry corresponds to a mistake entry when the Rule, Count, and Component in the dataset entry all match the corresponding fields in the mistake entry. In another embodiment, a dataset entry corresponds to a mistake entry when the Rule and Component in the dataset entry both match the corresponding fields in the mistake entry and the Count is similar (for example, within a pre-determined percentage) of the Count in the Mistake entry.
In embodiments, when no dataset entry in the DRC Result Dataset 118 corresponds to a mistake entry, a new data set entry corresponding to the mistake entry (for example, having the same Rule, Count, Component, and value related to ignorability) may be added to the DRC Result Dataset 118.
In other embodiments, whether a corresponding dataset entry exists is not determined, and the DRC Result Dataset 118 is updated by adding new dataset entries corresponding to the mistake entries.
The dataset entries shown in
At S226, the Neural Network 114 is retrained using the updated DRC Result Dataset 118. The updated DRC Result Dataset 118 may include tens of thousands of dataset entries or more; for example, a typical DRC Result Dataset 118 may include over one million dataset entries. As processes for retraining a neural network are widely known in the art, the details thereof are omitted for brevity. The retrained Neural Network 114 may then the used in subsequent performances of the Classification process 210.
The neural network 500 comprises an input layer, a first layer (layer 1), a second layer (layer 2), a third layer (layer 3), and an output layer. The layers are connected using a plurality of synapses, shown as lines in
The input layer includes first, second, and third input nodes 502A, 502B, and 502C, which respectively receive a Rule identifier, a Count, and a Component identifier corresponding to a DRC error.
Each node in the input layer is connected by a unique synapse to every layer 1 nodes 504 in layer 1. Although
Each layer 1 node 504 in layer 1 is connected by a unique synapse to every layer 2 node 506 in layer 2. Although
Each layer 2 node 506 in layer 2 is connected by a unique synapse to every layer 3 node 508 in layer 3. Although
Each layer 3 node 508 in layer 3 is connected by a unique synapse to each of the first and second output nodes 510 in the output layer. Accordingly, hundreds of synapses, each having a corresponding weight determined by training the neural network 500, would be used to connect the layer 3 nodes 508 to the output nodes 510, and two mathematical operations collectively using hundreds of input values would be performed in the output layer.
In embodiments, a mathematical operation performed by each of the layer 1 nodes 504, the layer 2 nodes 506, and the layer 3 nodes 508 includes a convolution and a linear rectification (relu). In embodiments, a mathematical operation performed by each of the output nodes 510 includes a convolution and a sigmoid function. However, embodiments are not limited to using these particular functions.
Although
The apparatus 600 includes a processor 604, a memory 606, storage 608, input/output (I/O) interfaces 610, and a network interface 612. In some embodiments, one or more of the components shown in
The memory 606 and the storage 608 may each include non-transient computer-readable media. The memory 606 may include, for example, volatile memory such as Dynamic Random Access Memory (DRAM), nonvolatile memory such as Flash memory, or combinations thereof, but embodiments are not limited thereto. The storage 608 may include, for example, optical disks, hard disk drives, solid-state drives, or combinations thereof, but embodiments are not limited thereto.
Processor 604 may be configured to support the processes for performing design rule checks described herein. In embodiments, the processes for performing design rule checks are performed by the processor 604 executing computer programming instructions stored in the memory 606, the storage 608, or both.
In embodiments of the apparatus 600 including the accelerator 614, steps of the processes described herein that involve a neural network may be performed in whole or part using the accelerator 614. In embodiments, the accelerator 614 may be a Graphics Processing Unit (GPU), a memory device including processing-in-memory, a vector processor, an array processor, or the like, or combinations thereof.
In embodiments, a user of the apparatus 600 may receive information (such as a Final Report) produced using the processes described herein and may provide input and control to the processes described herein through the I/O interface 610 or through a device connected to the apparatus 600 through the network interface 612.
In embodiments, the design Layout Database 102, DRC Deck 104, or DRC Result Dataset 118 of
As described above, SUMMARY, BENEFITS.
Aspects of the present disclosure have been described in conjunction with the specific embodiments thereof that are proposed as examples. Numerous alternatives, modifications, and variations to the embodiments as set forth herein may be made without departing from the scope of the claims set forth below. Accordingly, embodiments as set forth herein are intended to be illustrative and not limiting.
