The invention concerns a method of fabricating a solar cell made of crystalline silicon and a crystalline-silicon solar cell fabricated by said method.
The object of this invention derives from the fact that both conventional and novel crystalline-silicon solar cells entail the problem of electrically isolating p- and n-doped layers. The present invention solves this problem in a manner that is simple, elegant and cost-effective for industrial production.
In effecting the electrical separation of p- and n-type layers, isolating separation alone is not enough to prevent short circuits. To avoid impairing the efficiency of the solar cell, the recombination velocity at the surface should not be too high at locations where n- and p-type regions border on each other.
Both can be achieved by means of the method presented hereinabove.
To prevent short circuits, in conventional crystalline-silicon solar cells the isolation of the pn junction is brought about by plasma-enhanced etching, by mechanical separation and by the use of lasers.
With more complex cell geometries involving stacked p- and n-type regions (such as, for example, EWT solar cells [J. M. Gee, W. K. Schubert, P. A. Basore, “Emitter Wrap-Through Solar Cells,” 23rd IEEE Photo. Spec. Conf., 1993, pp. 265-70], POWER solar cells [G. Willeke, P. Fath, “The POWER silicon solar cell concept,” 12th EC PVSEC, Amsterdam, 1994, Vol. 1, pp. 766-68; K. Faika et al., “Novel techniques to prevent edge isolation of silicon solar cells by avoiding leakage currents between the aluminum rear contact [sic],” Proc. 16th PVSEC, Glasgow, May 2000, in press; “Recent results in low cost back contact cells,” 16th PVSEC, Glasgow, 2000, in press]), isolation of the pn junction is achieved on the laboratory scale by:
The disadvantages of the known solutions can be summarized as follows:
Additional process steps to separate the p- and n-type regions, especially in the case of more complex cell geometries, are highly disadvantageous for industrial-scale production. The attendant cost has heretofore been one reason why, for example, back-contact solar cells have failed to gain acceptance in industrial production despite their many advantages with regard to modular circuitry.
The object of the present invention, i.e., the elimination of short-circuiting between mutually adjacent p- and n-type [noun missing], is achieved as follows.
A masking paste is applied locally to at least one side of the silicon substrate and is then dried. Dopant diffusion is then performed, the conduction type of the dopant being the opposite of that of the basic doping of the crystalline silicon substrate. In one of the ensuing steps in the fabrication of the solar cell, the electrical contacts are deposited in such a way that at least a portion of the contacts is separated electrically from the rest of the contacts by the masking paste.
To summarize, the method of the invention constitutes a substantial improvement in the simple fabrication of novel solar cells such as back-contact, bifacial and high-voltage solar cells. It will also be a major source of impetus in the production of future low-cost industrial solar cells using thin silicon wafers and the local back-contacting necessitated by that approach. Moreover, it can lead to simplification of the current method of fabricating conventional industrial solar cells.
The advantages of the invention are as follows:
With the use of masking paste, the four process steps of the fabrication method used heretofore:
The solutions proposed in [1]1 include substantially more, and more cost-intensive, process steps. The method described in [2] is suitable only for structured wafers. The technique of codiffusion preferably has to employ cost-intensive evaporation techniques; moreover, no further high-temperature step can be performed after codiffusion. 1TRANSLATOR'S NOTE: Sic; there are no numbered references in our copy.
The invention was tested as follows.
The diffusion-barrier paste was applied to back-contact solar cells measuring 10×10 cm2. The efficiency of these cells was found to be as high as 15.8% (independently confirmed by the EU Joint Research Center in Ispra, Italy). The solar-cell fabrication method was tested successfully with both Cz Si and multicrystalline Si. The invention is explained in more detail below with reference to two exemplary embodiments. Referring to the drawing:
After etching and cleaning steps, the barrier paste (2) is deposited locally on a semiconductor wafer, preferably of crystalline silicon (1). The silicon wafer is then subjected to n+ diffusion. The n-type and p-type contacts (4 and 5) are then deposited. The cell depicted in the drawing is specifically one fabricated by the emitter wrap-through method, i.e., the front-side n-layer is connected by small holes to the n-contact on the back side of the cell.
A thin-layer cell grown on a foreign substrate (3) is provided locally on the front side with masking paste (4) and is then diffused. The contacts (6 and 7) are deposited on the front of the cell in such a way that the n-type and p-type contacts are isolated from each other by the masking paste.
Number | Date | Country | Kind |
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10047556.6 | Sep 2000 | DE | national |
Number | Date | Country | |
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Parent | 10363001 | Oct 2003 | US |
Child | 11936988 | US |