Claims
- 1. A method for fabricating a taper, comprising:
forming a cladding layer over a substrate; forming a core layer on the cladding layer; forming a protective layer on the core layer, the protective layer having an opening; and polishing the protective layer and the exposed region of the core layer using a chemical mechanical polishing (CMP) process to create a depression in the core layer aligned with the opening of the protective layer, a first portion of the core layer having a first surface defining a first part of the depression, the first surface of the first portion to serve as a sloped surface of the taper.
- 2. The method of claim 1 wherein the cladding and core layers are formed using a silicon on insulator (SOI) wafer.
- 3. The method of claim 1 further comprising:
removing the protective layer; and removing a second portion of the core layer that contacts to the first portion so that a third portion of the core layer has a substantially planar surface that is adjacent to the first region.
- 4. The method of claim 3 wherein the first surface of the first region is aligned with the substantially planar surface of the third region.
- 5. The method of claim 3 wherein the second portion of the core layer is removed by etching.
- 6. The method of claim 3 wherein the protective layer is removed during the CMP process.
- 7. The method of claim 3 further comprising removing a fourth portion of the core layer to form a waveguide core.
- 8. The method of claim 7 further comprising forming a second cladding layer on the core layer.
- 9. The method of claim 1 wherein the core layer is formed from a semiconductor material.
- 10. The method of claim 1 wherein the core layer is formed from silica.
- 11. An apparatus for propagating an optical signal, the apparatus comprising:
a cladding layer; and a core layer disposed on a surface of the cladding layer, the core layer having a first surface and a second surface, wherein the first surface is a polished surface that is sloped relative to the second surface, and wherein the second surface is substantially parallel to the surface of the cladding layer.
- 12. The apparatus of claim 11 wherein the cladding and core layers are silicon and insulator layers of a silicon on insulator (SOI) wafer.
- 13. The apparatus of claim 11 wherein the first surface was polished by chemical mechanical polishing (CMP).
- 14. The apparatus of claim 11 further comprising a second cladding layer disposed on the core layer.
- 15. The apparatus of claim 11 wherein the core layer is formed from a semiconductor material.
- 16. The apparatus of claim 11 wherein the core layer is formed from silica.
- 17. The apparatus of claim 11 wherein the core layer has a third surface to couple to an optical fiber.
- 18. An integrated circuit comprising:
a semiconductor substrate; a first cladding layer disposed on the semiconductor substrate; a core layer disposed on a surface of the first cladding layer, the core layer having a first surface, a second surface and a third surface, wherein the first surface is a polished surface and sloped relative to the second surface, the second surface is substantially parallel to the surface of the first cladding layer, and the third surface to connect to a waveguide that is external to the PLC; and a second cladding layer disposed on the core layer.
- 19. The integrated circuit of claim 18 wherein the external waveguide is an optical fiber.
- 20. The integrated circuit of claim 18 wherein the first surface was polished by chemical mechanical polishing (CMP).
- 21. The integrated circuit of claim 18 wherein the core layer comprises a semiconductor material.
- 22. The integrated circuit of claim 18 wherein the core layer comprises silica.
- 23. The integrated circuit of claim 18 wherein the cladding and core layers are silicon and insulator layers of a silicon on insulator (SOI) wafer.
- 24. A system comprising:
an optical signal source; an optical fiber having one end coupled to the optical signal source; and an integrated circuit that includes:
a semiconductor substrate; a first cladding layer disposed on the semiconductor substrate; a core layer disposed on a surface of the first cladding layer, the core layer having a first surface, a second surface and a third surface, wherein the first surface is a polished surface and sloped relative to the second surface, the second surface is substantially parallel to the surface of the first cladding layer, and the third surface to connect to another end of the optical fiber; and a second cladding layer disposed on the core layer.
- 25. The system of claim 24 wherein the external waveguide is an optical fiber.
- 26. The system of claim 24 wherein the first surface was polished by chemical mechanical polishing (CMP).
- 27. The system of claim 24 wherein the core layer comprises a semiconductor material.
- 28. The system of claim 24 wherein the core layer comprises silica.
- 29. The system of claim 24 wherein the cladding and core layers are silicon and insulator layers of a silicon on insulator (SOI) wafer.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] The present invention is related to commonly-assigned and co-filed U.S. patent application Ser. No. ______ [Attorney Docket No. 42.P13842] entitled “Fabrication Of A Waveguide Taper Through Ion Implantation” by M. Salib et al., and to U.S. patent application Ser. No. ______ [Attorney Docket No. 42.P13843] entitled “Epitaxial Growth For Waveguide Tapering” by M. Morse.