1. Field
This invention relates to the field of digital image processing, particularly the reduction of row noise in CMOS image sensors.
2. Related Art
Complementary Metal Oxide Semiconductor (CMOS) image sensors suffer from row noise that is usually due to the random noise that shifts the voltage level(s) in Analog-to-Digital Converter (ADC) and is a well know problem within the field of digital imaging. The shift in voltage level affects the ADC slope and ADC output by creating an offset consistent in the entire row of pixels. Row noise is seen as randomly distributed horizontal lines that appear to be relatively darker or lighter than the surrounding background. The noise becomes much more apparent to the eye due to the high correlation of pixels along the horizontal.
In U.S. Patent (U.S. Pat. No. 6,646,681 B1) Macy, this problem is attacked by a location specific row-by-row based offset correction mechanism. This method estimates the offset caused by random level shifts in the ADC converter by passing through the entire row and the several rows above and below to collect statistics as depicted in
Row noise reduction based on localized row-by-row correction is not effective in eliminating any vertical non-uniformity in sensor response. Such non-uniformities in sensor response can emerge when imaging evenly illuminated scenes, such as skies or photography studio backdrops and show up as shift in light and/or color variations from top to the bottom of the image. The local row noise will be corrected but it will be corrected to the underlying non-uniformity of the sensor response. Also, since the estimated offset is determined for an entire row at a time based on local active area statistics that may contain bad pixels, the possibility for visible image defects due to offset estimation error is increased. The estimation of the offset is susceptible to characteristics of other noise or defects present and the content of the scene being imaged. Any error will look noticeably worse because of the linear correlation of the corrected pixels and the human eyes tendency to impose linear patterns onto an image. For instance, if there happens to be a higher concentration of bad pixels within a certain number of rows, then the statistics will be skewed and the offset estimation will be erroneous. Such error, as affected by bad pixels, will be exaggerated because of the high linear correlation of the row noise correction offset. The method of the current invention provides for a much more robust and reliable estimation of the necessary offset.
In addition to its possibility of offset estimation error, the local active area row-by-row method of row-noise correction has several other significant drawbacks associated with a CMOS imager design, operation and image quality. Such localized row-noise reduction methods require that several rows of pixels be stored in memory during a statistical analysis step thus increasing the amount of physical memory required, the time spent processing the data and the cost to manufacture.
Since localized row-by-row methods passes all lines and pixels of a sensor as if they have uniform color response, it is inappropriate for use with CMOS sensors with Color Filter Arrays (CFA). CFAs, such as the so-called Bayer pattern, pass only one color at each pixel. Since most image sensors have a higher sensitivity to red light than to green or blue light, the response of a pixel with a red filter will be much higher than that of a pixel with a either a blue or green filter even if there is an equal level of red and blue/green signal. Due to this drawback, row-by-row noise correction can only be applied after an interpolation or demosaic step that can dramatically change the statistics required to estimate the offset.
Thus, there exists a need to improve the offset estimation step of row-by-row row-noise reduction methods to reduce the possibility of exaggerating row noise, the cost and complexity of sensor implantation and the visual appearance of vertical variations in sensor response.
A method for reducing row noise in complementary-metal-oxide-semiconductor (CMOS) image sensors is disclosed. Row noise offset is determined on a robust row-by-row basis by collecting statistics within dark or shielded pixels in a row that reduces or eliminates the outlier effects of bad pixels. Here, bad pixels can be dead, hot or have an otherwise inconsistent response as compared to surrounding pixels. This methodology provides for several advantages over determining row noise offset on a localized active area row-by-row basis; reduction of required on chip memory, reduction of possible offset estimation error, application to sensors with color filter arrays prior to color interpolation and elimination of edge detection routines. The reduced requirement of on chip memory can lower the overall cost to produce the image sensor, while the reduced possibility of offset estimation error, application of noise reduction prior to color interpolation and the lack of smoothing or exaggeration of high frequency image content due to edge detection improves image quality.
The present invention provides a method for reducing row noise in complementary metal oxide semiconductor (CMOS) sensors. The method attempts to apply estimated offset levels, based on dark pixel statistics in a row, to the active area pixels in the same row on a row-by-row basis to eliminate random offsets that cause row noise. The present invention also removes the requirement of edge detection routines that can cause smoothing or exaggerating high frequency image content, which can cause edges in images to appear unnatural.
Generally the signal value of a pixel located at row i column j in the shielded region 202 can be expressed as:
Pshielded(i,j)=Reference+Offset(i)+Noise(i,j)
where is it assumed that the noise is approximated as additive and Reference is the desired constant signal value in the shielded region, usually zero or a number close to zero. With enough samples along the horizontal and with the correct statistical estimation methods, the horizontal component of the Noise can be eliminated. This leaves the ith row value in the shielded region as:
R(i)=Reference+Offset(i)+Noise(i)
Once R(i) is determined, the offset and vertical noise correction can be applied to the pixels in the active region of the sensor as:
Pactive Updated(i,j)=Pactive(i,j)−(R(i)−Reference)
where Pactive(i,j) is the raw signal value, or intensity level, read at the pixel located at row i column j. The flow chart depicted in
Starting with sregion=0, the maximum, max, the minimum, min, and the sum, sum are Calculated in block 408. In block 410, the parameter TotalSum is updated to:
TotalSum=TotalSum+sum−max−min.
TotalSum now represents the sum of the intensity values for all shielded pixels in the current sub-region plus the TotalSum for any previous sub-regions, minus the intensity values of any damaged pixels that might be present in the form of dark/dead pixels or bright/hot pixels.
In block 412, sregion is compared to S, the number of sub-regions. If sregion is greater than S, which would indicate the last of the sub-regions had been processed, then the operation continues with block 414. Otherwise the operation continues on with block 408 and by adding one to sregion.
In block 414, Offset is calculated as:
Offset=Reference−TotalSum/(L−2)*S
where the average of the shielded pixels is subtracted from a predetermined Reference. Reference is the desired constant signal value in the shielded region of the sensor. In block 416, the calculated Offset is added to each active pixel in the current row. In block 418, row is compared to the number of rows on the sensor. If row is greater than the number of rows on the sensor to be filtered, then all the rows of the sensor have been processed and the operation terminates. Otherwise, the operation adds one to row and continues on with block 406.
Foregoing described embodiments of the invention are provided as illustrations and descriptions. They are not intended to limit the invention to precise form described. In particular, it is contemplated that functional implementation of invention described herein may be implemented equivalently in hardware, software, firmware, and/or other available functional components or building blocks, and that networks may be wired, wireless, or a combination of wired and wireless. Other variations and embodiments are possible in light of above teachings, and it is thus intended that the scope of invention not be limited by this Detailed Description, but rather by Claims following.
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