Method for solving for converter valve states and valve currents based on valve-side current timing characteristics

Information

  • Patent Grant
  • 12126246
  • Patent Number
    12,126,246
  • Date Filed
    Thursday, September 30, 2021
    3 years ago
  • Date Issued
    Tuesday, October 22, 2024
    a month ago
  • CPC
    • H02M1/0012
    • H02M1/0009
  • Field of Search
    • CPC
    • H02M1/0012
    • H02M1/0009
    • H02M7/537
    • H02M7/538
    • H02M7/5387
    • H02H1/00
    • H02H1/007
    • H02H7/26
    • H02J3/00
  • International Classifications
    • H02M1/00
    • Term Extension
      0
Abstract
The present invention discloses a calculation method for a converter valve state and a valve current based on temporal features of a valve side current, the process is follows: collecting three-phase AC currents, DC currents on a valve side of a converter of a DC transmission system, and trigger pulses of converter valves; establishing a node current equation of the AC currents and valve currents; when detecting a rising edge of a trigger pulse of a converter valve, latching the number of the converter valve; according to the trigger pulses of the converter valves, and amplitude characteristics of the AC currents and characteristics of AC variations, to perform a conducting state and a blocking state judgment of valve states, and obtaining valve states; judging whether each phase has a bypass state; through summing the valve bypass states of the three phases to judge a number of bypass phases; supplementing bypass loop voltage equation; calculating the converter valve currents; when the calculated value of the valve currents is negative, the valve state is corrected to blocking state according to a one-way conductivity of the converter valves, otherwise do not correct; repeating the above steps again to calculate the valve current.
Description
TECHNICAL FIELD

The invention relates to the technical field of electric power systems and their automation, in particular to a calculation method for a converter valve state and a valve current based on temporal features of a valve side current.


TECHNICAL BACKGROUND

Converter valves are the core equipment of LCC-HVDC DC project, which undertake the function of mutual conversion between AC and DC. AC fault easily lead to commutation failure of converter valves. The current distribution of each converter valve is uneven. The valve with commutation failure is in an overcurrent or overheated state for a long time, which is extremely detrimental to the safety of the valve equipment, and will cause equipment to burn out or reduce its service life. From the safety point of view of the converter valves, accurate acquisition of the valve state and valve current during the entire operation process is the precondition for protecting valve equipment and controlling coordination.


Due to the technological design of equipment heat dissipation and insulation etc., it is not possible to install measuring elements inside a converter valve of an actual power grid DC project to directly measure the valve current. Only the DC electrical quantity and the AC electrical quantity measured by the current transformer outside the converter valve can indirectly represent the current conducting state of the converter valve and the operating state of the converter valve. During normal operation, the upper and lower bridge arms of the same phase will not be turned on at the same time. According to the operating law that the current flows in from the high potential valve and flows out from the low potential, the valve current and valve state can be calculated by the polarity characteristics of the measured AC current. However, when an AC fault occurs, the upper and lower arms of the same phase may be turned on at the same time. When a converter valve operates with a single phase bypass or multiple phase bypasses, it is impossible to obtain the current and valve state of the converter valve only by using the polarity characteristics of the AC current.


SUMMARY OF THE INVENTION

The purpose of the present invention is to calculate the above-mentioned defects in the current technology and at the same time to reduce the dependence on voltage, to provide a calculation method for a converter valve state and a valve current based on temporal features of a valve side current. The valve state and valve current obtained by this method may provide strong support for fault analysis and control and protection optimization of DC project.


The purpose of the present invention may be achieved by adopting the following technical solutions:


A calculation method for a converter valve state and a valve current based on temporal features of a valve side current, the calculation method comprising following steps:

    • S1. collecting three-phase AC currents ia, ib, ic and DC currents idH, idN on a converter valve side of a DC transmission system, and trigger pulses FP1, FP2, FP3, FP4, FP5, FP6 of converter valves;
    • S2. according to a topology structure of the converter of the DC transmission system, establishing a node current equation Ai=y of the three-phase AC currents ia, ib, ic, the DC currents idH, idN and valve currents iVTm on the valve side;









{






i

VT

2


+

i

VT

4


+

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VT

6



=

i
dH









i

VT

1


+

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VT

3


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VT

5



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VT

4


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a









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b








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5


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c









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b






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A is a valve current coefficient matrix, i is a valve current vector, y is a current vector at both ends of the valve side, iVTm are respective six converter valve currents, m is a number of six converter valves, m=1, 2, 3, 4, 5, 6;

    • S3. according to the trigger pulses FP1, FP2, FP3, FP4, FP5, FP6 of the converter valves obtained in step S1, when detecting a rising edge of a trigger pulse of a converter valve, latching the number m of the converter valve into a register;
    • S4. according to the trigger pulses FP1, FP2, FP3, FP4, FP5, FP6 of the converter valves obtained in step S1, and amplitude characteristics of the AC currents and characteristics of AC variations, to perform a conducting state and a blocking state judgment of valve states, and obtaining six valve states of the converter valves sVT1, sVT2, sVT3, sVT4, sVT5, SVT6;
    • S5. according to the valve states obtained in step S4, constructing a valve state matrix S:










S
=

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s

VT

1

























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VT

2

























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VT

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s

VT

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VT

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    • in the formula: sVT1, sVT2, sVT3, sVT4, sVT5, SVT6 are the valve states of the six converter valves;

    • S6. by calculating a product of an upper valve state and a lower valve state of each phase, judging whether each phase has a bypass state, valve bypass states Sa, Sb, Sc of each phase are:












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S
a

=


s

VT

1


×

s

V

T

4










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b

=


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VT

3


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s

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6










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c

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2


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VT

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    • in the formula: Sa represents a valve bypass state of phase a, Sb represents a valve bypass state of phase b, Sc represents a valve bypass state of phase c, Sk=1 represents a bypass, Sk=0 represents no bypass, and k is serial numbers of a, b, and c phases;

    • S7. summing the valve bypass states of the three phases to judge a number of bypass phases, where a number of bypass phases Stotal is expressed as follows:

      Stotal=Σ(Sa+Sb+Sc)  (G4);

    • in the formula: Stotal represents the number of bypass phases in the three phases abc;

    • S8. according to the number of bypass phases and corresponding phases obtained in step S7, supplementing a bypass loop voltage equation Cpi=Dp; wherein Cp is a coefficient matrix of the bypass loop voltage equation, i is a valve current vector, Dp is a constant vector, and p is serial number of the bypass phases;

    • S9. according to step S2 and step S8, and in conjunction with step S4, calculating the valve currents iVTm;

    • S10. when the valve currents iVTm calculated in step S9<0, considering a one-way conductivity of the converter valves, correcting the valve states, correcting the valve states to blocking state sVTm=0, otherwise, do not correct;

    • S11. repeating steps S5 to S10 until the valve currents iVTm≥0 is calculated.





Further, processes of step S4 are as follows:

    • S41. when it is detected in step S1 that the trigger pulses of the converter valves are at a high electric level and a conducting state criterion of the converter valves is satisfied, setting the valve states sVTm=1, wherein the conducting state of the converter valves is: an amplitude |ik| of an AC current of the phase where the converter valve numbered m is located is greater than a fixed value of an AC current, namely:

      |ik|>Iset3  (G5)
    • in the formula: ik is a, b, c three-phase AC currents, Iset3 is the AC current fixed value;
    • S42. when the converter valve numbered m is in a conducting state sVTm=1, if the AC current meets a blocking state criterion, then the converter valve numbered m is in a blocking state sVTm=0; otherwise, the converter valve numbered m continues to maintain the conducting state sVTm=1, wherein the blocking state criterion of the converter valve is: the amplitude |ik| of the AC current of the phase where the converter valve numbered m is located is less than a blocking state current threshold fixed value, and a variation rate of the AC current is less than a variation threshold fixed value, namely:












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k



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6

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    • in the formula: Iset4 is the blocking state current threshold fixed value, Iset5 is the variation threshold fixed value;

    • S43. when only an upper valve and a lower valve of a single-phase are conducting, the converter valves operate as a single-phase bypass pair, and the two valves of the bypass pair are judged to be in the conducting state, a single-phase bypass pair judgment condition is: a maximum value of the DC currents minus a maximum value of absolute values of the AC currents is greater than a commutation failure threshold fixed value, and the maximum value of the absolute values of the AC currents is less than a single-phase bypass pair threshold fixed value, namely:












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    • in the formula: Iset1 is the commutation failure threshold fixed value, Iset2 is the single-phase bypass pair threshold fixed value;

    • S44. when the AC and DC currents satisfy formula (G7) of step S43, the converter valves operate as a single-phase bypass pair, wherein a valve state judgment condition of the single-phase bypass pair is:

    • 1) when bypass state flags of all valves sbypass_m=0, if a register signal in step S3 is equal to m, a phase where the converter valve numbered m is located is a bypass phase, setting the bypass state flags of the two valves in the bypass phase equal to 1, keeping the two valves of the bypass phase in the conducting state, namely: sbypass_m=1 and sbypass_(mod(m+3,6))=1, sVTm=1 and SVT(mod(m+3,6))=1;

    • 2) when the bypass status flags of the phase where the converter valve numbered m is located is sbypass_m=1 or sbypass_(mod(m+3,6))=1, keeping the two valves of the phase where the converter valve numbered m is located in the conducting state.





Further, processes of step S8 are as follows:

    • S81. according to the number of bypass phases obtained in step S7, when the number of bypass phases Stotal≤1, the converter valves operate without a bypass pair or one phase bypass pair, at this time, there is no need to construct the bypass loop voltage equation, skip to step S91, otherwise, go to step S82;
    • S82. when the number of bypass phases Stotal=2, it indicates that two phase bypass pairs of the converter valves operate, supplementing the bypass loop voltage equation Cpi=Dp, skip to step S92; otherwise, go to step S83; wherein,
    • 1) if Sa=Sb, then a following relationship exists:

      iVT1+iVT4=iVT3+iVT6  (G8)
    • supplementing the bypass loop voltage equation Cabi=Dab, wherein Cab=[1 0 −1 1 0 −1], Dab=[0], p=ab, Cab is a coefficient matrix of the bypass loop voltage equation when the ab phases bypass, Dab is a constant vector of the bypass loop voltage equation when the ab phases bypass;
    • 2) if Sa=Sc, then a following relationship exists:

      iVT1+iVT4=iVT2+iVT5  (G9)
    • supplementing the bypass loop voltage equation Caci=Dac, wherein Cac=[1 −1 0 1 −1 0], Dac=[0], p=ac, Cac is a coefficient matrix of the bypass loop voltage equation when the ac phases bypass, Dac is a constant vector of the bypass loop voltage equation when the ac phase bypass;
    • 3) if Sb=Sc, then a following relationship exists:

      iVT2+iVT5=iVT3+iVT6  (G10)
    • supplementing the bypass loop voltage equation Cbci=Dbc, wherein Cbc=[0 1 −1 0 1 −1], Dbc=[0], p=bc, Cbc is a coefficient matrix of the bypass loop voltage equation when the bc phases bypass, Dbc is a constant vector of the bypass loop voltage equation when the bc phase bypass;
    • S83. when the number of bypass phases Stotal=3, it indicates that three phase bypass pairs of the converter valves operate, supplementing the bypass loop voltage equation Cpi=Dp, skip to step S92; at the same time, a following relationship exists:









{






i

VT

1


+

i

V

T

4



=


i

V

T

3


+

i

V

T

6











i

VT

1


+

i

V

T

4



=


i

V

T

2


+

i

V

T

5











(

G

11

)









    • supplementing the bypass loop voltage equation Cabci=Dabc, wherein











C
abc

=

[



1



-
1



0


1



-
1



0




1


0



-
1



1


0



-
1




]


,





Dabc=[0 0]T, p=abc, Cabc is a coefficient matrix of the bypass loop voltage equation when the abc phases bypass, Dabc is a constant vector of the bypass loop voltage equation when the abc phases bypass;

    • processes of step S9 are as follows:
    • S91. constructing a state equation based on valve state characteristics ASi=y, inverting its coefficient matrix to calculate the valve current iVTm:

      i=(AS)−1×y  (G12)
    • in the formula: i=[iVT1 iVT2 iVT3 iVT4 iVT5 iVT6]T;
    • S92. combining Ai=y and Cpi=Dp, combining the valve state characteristics S to construct a state equation ESi=z, inverting its coefficient matrix, and calculating the valve current iVTm:

      i=(ES)−1×z  (G13)
    • in the formula: i=[iVT1 iVT2 iVT3 iVT4 iVT5 iVT6]T,







E
=

[



A





C
p




]


,

z
=

[



y





D
p




]


,





p is a serial number of a bypass phase, E is a coefficient matrix formed by the coefficient matrix A and the coefficient matrix Cp, z is a vector formed by the current vector y and the constant vector Dp at both ends of the valve side.


Further, in step S3, when a rising edge of a trigger pulse of a converter valve is detected FPm(t)−FPm(t−Δt)=1, latching the number m of the converter valve into the register; wherein FPm(t) is a trigger pulse signal of the converter valve numbered m at time t, FPm(t−Δt) is a trigger pulse signal of the converter valve numbered m at time (t−Δt), t is a time at a certain moment, Δt is a sampling time interval.


Compared with the current technology, the present invention has the following advantages and effects:


In HVDC transmission systems, there are many theoretical studies based on the converter valve current, such as commutation failure detection. However, the valve current cannot be directly measured and there is no suitable calculation method, so that the research results cannot be directly applied to the actual DC project, and can only stay in the theoretical research stage. According to the AC current and DC current at both ends of the converter valve and the signals that can be measured by the trigger pulse of the converter valve, the present invention can, not only accurately calculate the valve current through the node current equation and the one-way conductivity of the converter valve, but also judge the conducting and blocking state of the converter valve in real time. The monitoring of valve status and the accurate calculation of valve current are particularly important for existing theoretical research in practical project applications, and are of great significance to the protection and control of heavy structure converter valves.





DESCRIPTION OF FIGURES


FIG. 1 is a flow chart of a valve state judgment and a valve current calculation of the present invention, clockVT represents a symbol of a register, t_end represents a running end time;



FIG. 2 is an illustrative diagram of a valve state and a valve current calculation model of the present invention, wherein ia, ib, ic, idH, idN are input ports for collecting current on a valve side of a converter, FP1, FP2, FP3, FP4, FP5, FP6 are collecting input ports for trigger pulses of converter valves, sVT1, sVT2, sVT3, sVT4, sVT5, SVT6 are output ports of valve status signals; iVT1 iVT2 iVT3 iVT4 iVT5 iVT6 are output ports of valve current calculations;



FIG. 3 is an illustrative diagram of a converter valve for a high-voltage DC transmission of the present invention, wherein ia, ib, ic are the a phase, b phase, and c phase of a three-phase AC current, idH is a high-voltage side DC current, idN is a low-voltage side DC current, iVT1 iVT2 iVT3 iVT4 iVT5 iVT6 are valve currents, directions indicated by arrows in the figure is positive currents;



FIG. 4 are waveforms of three-phase AC currents ia, ib, ic, and a DC current id max on a valve side of a converter valve of the present invention, and the DC current id max is the maximum value of the high-voltage side DC current idH and the low-voltage side DC current idN, that is id max=max(idH, idN);



FIG. 5 are trigger pulses of six converter valves of a HVDC power transmission of the present invention, FP1, FP2, FP3, FP4, FP5, FP6 are the trigger pulses of the six converter valves;



FIG. 6 is a current loop diagram of a state judgment of bypass pair of the converter valve of the present invention;



FIG. 7 is a flow chart of a valve state judgment of six pulses of the present invention;



FIG. 8 is a valve state judging flow chart of the converter valve numbered 1 of the present invention;



FIG. 9 is a bypass pair state judging flow chart of the present invention;



FIG. 10 is a valve state waveform diagram based on the variation characteristics of the AC current of the present invention, in the figure, sVT1, sVT2, sVT3, sVT4, sVT5, SVT6 are valve state signals;



FIG. 11 is a flow chart of supplementing bypass equation of the present invention;



FIG. 12 is a valve current waveform diagram calculated based on valve states of the present invention, in the figure, iVT1 iVT2 iVT3 iVT4 iVT5 iVT6 are valve current signals;



FIG. 13 is a valve state waveform diagram considering a one-way conductivity correction of a valve of the present invention, in the figure, sVT1, sVT2, sVT3, sVT4, sVT5, SVT6 are valve state signals;



FIG. 14 is a valve current waveform diagram calculated based on corrected valve states of the present invention, in the figure, iVT1 iVT2 iVT3 iVT4 iVT5 iVT6 are valve current signals.





DETAILED DESCRIPTION

In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.


Embodiments

The invention discloses a calculation method for a converter valve state and a valve current based on temporal features of a valve side current, and the method is used to judge the valve state and calculate the valve current in actual power grid project. The operating conditions of the converter valve after an AC fault change differently. In order to more comprehensively cover the operating conditions of the converter valve after the fault, this embodiment takes a three-phase fault of a six-pulse inverter side commutation bus as an example. The present invention will be further described in detail according to FIGS. 1 and 2.


S1. first, the converter involved in the present invention is briefly described. The commutation topology of this embodiment is shown in FIG. 3. In the figure, six valve arms are numbered in the order in which they are normally opened. VT1 represents the converter valve numbered 1, VT2 represents the converter valve numbered 2, VT3 represents the converter valve numbered 3, VT4 represents the converter valve numbered 4, VT5 represents the converter valve numbered 5, VT6 represents the converter valve numbered 6. Valve VT4, valve VT6, valve VT2 form an upper bridge arm. Valve VT1, valve VT3, valve VT5 form a lower bridge arm. Collecting three-phase AC currents ia, ib, ic and DC currents idH, idN on a valve side of a converter of FIG. 3 of a DC transmission system, and trigger pulses FP1, FP2, FP3, FP4, FP5, FP6 of converter valves. According to the collected signals, the current waveforms of the three-phase AC currents and DC currents on the valve side before and after the fault are obtained as shown in FIG. 4. The trigger pulse waveforms of the six converter valves are shown in FIG. 5;


S2. according to a topology structure of the converter of the DC transmission system in step S1, according to Kirchhoff's law, establishing a node current equation Ai=y of the three-phase AC currents ia, ib, ic, DC currents idH, idN and valve currents iVTm on the valve side;









{






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VT

2


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i

VT

4


+

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VT

6



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dH









i

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1


+

i

VT

3


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VT

5



=

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4


-

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VT

1



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i
a









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VT

6


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VT

3



=

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b









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VT

2


-

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VT

5



=

i
c









(
1
)











wherein


A

=

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1


0


1


0


1




1


0


1


0


1


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1


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1



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=

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V

T

1







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V

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2







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T

3







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5







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6





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b






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A is a valve current coefficient matrix, i is a valve current vector, y is a current vector at both ends of the valve side, iVTm are respective six converter valve currents, m is a number of six converter valves, m=1, 2, 3, 4, 5, 6;


S3. according to the trigger pulses FP1, FP2, FP3, FP4, FP5, FP6 of the converter valves collected in step S1, when a rising edge of a trigger pulse of a converter valve is detected FPm(t)−FPm(t−Δt)=1, latching the number m of the converter valve into the register; wherein FPm(t) is a trigger pulse signal of the converter valve numbered m at time t, FPm(t−Δt) is a trigger pulse signal of the converter valve numbered m at time (t−Δt), t is a time at a certain moment, Δt is a sampling time interval;


For example: when the rising edge of the trigger pulse of the converter valve numbered 1 is detected, the number 1 is stored in the register;


S4. combining steps S1 and S3, according to trigger pulses of the converter valves, the amplitude characteristics of the AC currents and the variation characteristics of the AC currents, performing a conducting state and a blocking state judgment of valve states, obtaining the valve states sVT1, sVT2, sVT3, sVT4, sVT5, SVT6. The valve state judgment of this method mainly uses the amplitude characteristics of the AC current. However, when the converter valves only have same-phase upper and lower arms conducting to form a single-phase bypass pair, as shown in FIG. 6, at this time, the three-phase AC current is 0, the AC and DC currents are completely isolated, and the AC currents cannot be used to judge the valve state. Therefore, it is necessary to judge the valve state of the single-phase bypass pair separately, wherein the flow chart of the complete valve state judgment is shown in FIG. 7. The figure includes a sub-module for judging the valve states of the six converter valves and a sub-module for judging the state of the single-phase bypass pair. The flow chart of the sub-module for judging the valve state of the six converter valves, taking valve VT1 as an example, is shown in FIG. 8. The sub-module for judging the state of the single-phase bypass pair is shown in FIG. 9. According to the flow charts of FIGS. 7, 8, and 9, the waveforms of the six valve states obtained based on the variation characteristics of the AC current are shown in FIG. 10. sVT1, sVT2, sVT3, sVT4, sVT5, SVT6 represent the valve states of the six converter valves respectively;


In this embodiment, with reference to the flow chart of the valve state judgment in FIG. 7, step S4 specifically comprises the following steps:


S41. according to step S1, taking the valve VT1 as an example, the valve state judgment flow chart of the valve VT1 is shown in FIG. 8. When it is detected that the trigger pulse of the VT1 converter valve is at a high electric level and a conducting state criterion of the converter valve is satisfied, setting the valve state sVT1=1. Wherein the conducting state criterion of the converter valve is: the amplitude |ia| of the AC current of the phase a where the valve VT1 is located is greater than the AC current fixed value. That is:

|ik|>Iset3  (2)

in the formula: ia is the a phase AC current; Iset3 is an AC current fixed value.


S42. according to step S41, when the valve VT1 is in the conducting state (sVT1=1), if the AC current satisfies the blocking state criterion, then the valve VT1 is in the blocking state (svT1=0). Otherwise, valve VT1 continues to remain in the conducting state (sVT1=1). Wherein the blocking state criterion of the converter valve is: the amplitude |ia| of the AC current of phase a where the valve VT1 is located is less than a blocking state current threshold fixed value, and the variation rate of the AC current is less than a variation threshold fixed value. That is:












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k



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k

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-

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t



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set

5






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    • in the formula: Iset4 is the blocking state current threshold fixed value, Iset5 is the variation threshold fixed value;

    • S43. according to step S1, step S41 and step S42, when only an upper valve and a lower valve of a single-phase are conducting, the converter valves operate as a single-phase bypass pair, and the two valves of the bypass pair are judged to be in the conducting state. A maximum value of the DC currents minus a maximum value of absolute values of the AC currents is greater than a commutation failure threshold fixed value, and the maximum value of the absolute values of the AC currents is less than a single-phase bypass pair threshold fixed value. That is:












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i
a



"\[RightBracketingBar]"


,



"\[LeftBracketingBar]"


i
b



"\[RightBracketingBar]"


,



"\[LeftBracketingBar]"


i
c



"\[RightBracketingBar]"



)

<

I

s

e

t

2






,





(
4
)









    • in the formula: Iset1 is the commutation failure threshold fixed value, Iset2 is the single-phase bypass pair threshold fixed value.

    • S44. according to S1, step S3 and step S43, when the AC and DC currents satisfy the formula (4) of step S43, the converter valve operates as a single-phase bypass pair and the flow chart of state judgment under the bypass pair condition is shown in FIG. 9. The valve state of the single-phase bypass pair is judged as:

    • 1) When the bypass state flags of all valves are sbypass_m=0, if the register signal in step S3 is equal to 1 or 4, phase a bypasses. Then the bypass state flags sbypass_1=1 and sbypass_4=1, the valve state sVT1=1 and sVT4=1;

    • Otherwise: if the register signal in step S3 is equal to 3 or 6, phase b bypasses. Then sbypass_3=1 and sbypass_6=1, sVT3=1 and sVT6=1;

    • Otherwise: if the register signal in step S3 is equal to 3 or 6, phase c bypasses. Then sbypass_2=1 and sbypass_5=1, sVT2=1 and sVT5=1;

    • 2) When the bypass status flag is sbypass_1=1 or sbypass_4=1, maintaining the two valves of phase a continue to be in the conducting state;

    • Otherwise: when the bypass status flag is sbypass_3=1 or sbypass_6=1, maintaining the two valves of phase b continue to be in the conducting state;

    • Otherwise: when the bypass status flag is sbypass_2=1 or sbypass_5=1, maintaining the two valves of phase c continue to be in the conducting state;

    • S5. according to the valve states obtained in step S4, constructing a valve state matrix S:












S
=

[




s

VT

1

























s

VT

2

























s

VT

3

























s

VT

4

























s

VT

5

























s

VT

6





]





(
5
)









    • in the formula: sVT1, sVT2, sVT3, sVT4, sVT5, SVT6 are the valve states of the six converter valves;

    • S6. according to step S5, by calculating a product of an upper valve state and a lower valve state of each phase, judging whether each phase has a bypass state, valve bypass states Sa, Sb, Sc of each phase are:












{





S
a

=


s

VT

1


×

s

V

T

4










S
b

=


s

V

T

3


×

s

V

T

6










S
c

=


s

V

T

2


×

s

V

T

5











(
6
)









    • in the formula: Sa represents a valve bypass state of phase a, Sb represents a valve bypass state of phase b, Sc represents a valve bypass state of phase c, Sk=1 represents a bypass, Sk=0 represents no bypass, and k represents three phases of a, b, and c;

    • S7. according to step S6, summing the valve bypass states of the three phases to judge a number of bypass phases. A number of bypass phases Stotal is expressed as follows:

      Stotal=Σ(Sa+Sb+Sc)  (7);

    • in the formula: Stotal represents the number of bypass phases in the three phases abc;

    • S8. according to the number of bypass phases and the corresponding phases obtained in step S7, when Stotal>1, there are two or more bypass pairs in the converter valves, the valve current cannot be calculated directly according to the node current equation of the converter valves according to formula (1), or the equation solution is not unique, so it is necessary to supplement the bypass loop voltage equation Cpi=Dp. The flow chart of the supplementing judgment is shown in FIG. 11, wherein Cp is a coefficient matrix of the bypass loop voltage equation, i is a valve current vector, Dp is a constant vector, and p is serial number of the bypass phases;





In this embodiment, the flow chart of supplementing the bypass loop voltage equation is shown in FIG. 11. Step S8 specifically comprises the following steps:

    • S81. according to the number of bypass phases obtained in step S7, when the number of bypass phases Stotal≤1, there is no need to construct the bypass loop voltage equation, skip to step S91; otherwise, go to step S82;
    • S82. according to step S7 and step S81, when the number of bypass phases Stotal=2, it indicates that two phase bypass pairs of the converter valves operate, skip to step S92; otherwise, go to step S83.


If: Sa=Sb, then a following relationship exists:

iVT1+iVT4=iVT3+iVT6  (8)

    • supplementing the bypass loop voltage equation Cabi=Dab, wherein Cab=[1 0 −1 1 0 −1], Dab=[0], Cab is a coefficient matrix of the bypass loop voltage equation when the ab phases bypass, Dab is a constant vector of the bypass loop voltage equation when the ab phases bypass;
    • when in the bypass condition of Sa=Sc and Sb=Sc, it is only needed to modify the corresponding bypass phases in the formula (8).
    • S83. according to step S7, step S81 and step S82, when the number of bypass phases Stotal=3, it indicates that three phase bypass pairs of the converter valves operate, skip to step S92; at the same time. Then a following relationship exists:









{






i

VT

1


+

i

VT

4



=


i

V

T

3


+

i

VT

6











i

VT

1


+

i

VT

4



=


i

V

T

2


+

i

VT

5











(
9
)









    • in supplementing the bypass loop voltage equation Cabci=Dabc,











c
abc

=

[



1



-
1



0


1



-
1



0




1


0



-
1



1


0



-
1




]


,





Dabc=[0 0]T, Cabc is a coefficient matrix of the bypass loop voltage equation when the abc phases bypass, Dabc is a constant vector of the bypass loop voltage equation when the abc phases bypass;

    • S9. according to step S2 and step S8, and in conjunction with step S4, calculating the converter valve currents iVTm, obtaining the valve currents iVT1 iVT2 iVT3 iVT4 iVT5 iVT6 calculated on the basis of the valve state obtained based on the variation characteristics of the AC currents, comparing the calculated valve current with the simulated value in DC project, The waveform is shown in FIG. 12. It is found that there is a significant difference between the calculated value and the simulated value, and there is a situation where the calculated value of the valve current has a negative value, and the calculation result needs to be corrected;


In this embodiment, in conjunction with FIGS. 1 and 11, step S9 specifically comprises the following steps:

    • S91. according to step S2, step S4 and step S81, constructing a state equation ASi=y based on valve state characteristics, and calculating valve current iVTm. Wherein:










A

S

i

=



[



0



s

VT

2




0



s

VT

4




0



s

VT

6







s

VT

1




0



s

VT

3




0



s

VT

5




0





-

s

VT

1





0


0



s

VT

4




0


0




0


0



-

s

VT

3





0


0



s

VT

6






0



s

VT

2




0


0



-

s

VT

5





0



]

[




i

VT

1







i

VT

2







i

VT

3







i

VT

4







i

VT

5







i

VT

6





]

=

[




i

d

H







i

d

N







i
a






i
b






i
c




]






(
10
)









    • in the formula,











A

S

=

[



0



s

VT

2




0



s

VT

4




0



s

VT

6







s

VT

1




0



s

VT

3




0



s

VT

5




0





-

s

VT

1





0


0



s

VT

4




0


0




0


0



-

s

VT

3





0


0



s

VT

6






0



s

VT

2




0


0



-

s

VT

5





0



]


,





AS is the coefficient matrix.

    • inverting the coefficient matrix AS. Calculating valve current iTVm:

      i=(AS)−1×y  (11)
    • in the formula: i=[iVT1 iVT2 iVT3 iVT4 iVT5 iVT6]T.
    • S92. according to step S2, step S4, step S81 and step S83, combining Ai=y and Cpi=Dp, combining the valve state characteristics S to construct a state equation ESi=z, inverting its coefficient matrix, and calculating the valve current iVtm.


For example: when Sa=Sb, combining equations (1) and (8) to construct the state equation EabSi=zab:











E

a

b



Si

=



[



0



s

VT

2




0



s

VT

4




0



s

VT

6







s

VT

1




0



s

VT

3




0



s

VT

5




0





-

s

VT

1





0


0



s

VT

4




0


0




0


0



-

s

VT

3





0


0



s

VT

6






0



s

VT

2




0


0



-

s

VT

5





0





s

VT

1




0



-

s

VT

3






s

VT

4




0



-

s

VT

6






]

[




i

VT

1







i

VT

2







i

VT

3







i

VT

4







i

VT

5







i

VT

6





]

=

[




i
dH






i
dN






i
a






i
b






i
c





0



]






(
12
)









    • in the formula,












E

a

b



S

=

[



0



s

VT

2




0



s

VT

4




0



s

VT

6







s

VT

1




0



s

VT

3




0



s

VT

5




0





-

s

VT

1





0


0



s

VT

4




0


0




0


0



-

s

VT

3





0


0



s

VT

6






0



s

VT

2




0


0



-

s

VT

5





0





s

VT

1





-

s

VT

2





0



s

VT

4





-

s

VT

5





0



]


,







i
=

[




i

VT

1







i

VT

2







i

VT

3







i

VT

4







i

VT

5







i

VT

6





]


,


z

a

b


=


[




i
dH






i
dN






i
a






i
b






i
c





0



]

.






Inverting the coefficient matrix EabS to calculate the valve current iVTm:

i=(EabS)−1×zab  (13)

    • in the formula: i=[iVT1 iVT2 iVT3 iVT4 iVT5 iVT6]T,








E

a

b


=

[



A





C

a

b





]


,


z

a

b


=

[



y





D

a

b





]


,





p=ab, Eab is a coefficient matrix formed by the coefficient matrix A and the coefficient matrix Cab, zab is a vector formed by the current vector y and the constant vector Dab at both ends of the valve.


The similar situations occur for other bypass conditions.

    • S10. according to step S9, when the valve currents iVTm (m=1, 2, 3, 4, 5, 6) calculated in step S9<0, considering a one-way conductivity of the converter valves, in a specified positive direction, the current of the converter valves can only be a positive value, correcting the valve states at this time, and correcting the valve state to blocking state sVTm=0, otherwise, do not correct;
    • S11. repeating steps S5 to S10 until the valve currents iVTm≥0 is calculated. The corrected valve state considering the unidirectional conductivity of the valve is shown in FIG. 13, sVT1, sVT2, sVT3, sVT4, sVT5, SVT6 are the corrected valve states of the six converter valves; recalculating the valve currents iVT1, iVT2, iVT3, iVT4, iVT5, iVT6 based on the corrected valve states, comparing the calculated valve currents with the simulated values after the valve states are corrected, and the waveform is shown in FIG. 14. It is found that the calculated values are consistent with the simulated values, indicating the effectiveness of this method.


To sum up, a calculation method for a converter valve state and a valve current based on temporal features of a valve side current proposed in this embodiment uses trigger pulse signals of the converter valves and the variation characteristics of the AC current amplitude to judge the valve states; based on the valve states, the valve currents are calculated by combining a topological relationship between the AC and DC currents and the valve currents. Considering the one-way conductivity of the valves to correct the valve states, and the valve currents are recalculated so as to obtain the valve states and valve currents of the entire operation process. According to FIG. 14, the calculated value of the valve currents are consistent with the simulated values in actual DC power grid, which verifies the effectiveness of the method of the present invention. This method may be applied to practical project, and is very important for project fault analysis and control coordination.


The above-mentioned embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited by the above-mentioned embodiments, and any other changes, modifications, substitutions, combinations, simplifications should be equivalent replacement manners, which are all included in the protection scope of the present invention.

Claims
  • 1. A method for determining a converter valve state and a valve current based on temporal features of a valve side current, for use in fault analysis and control and protection optimization of DC project, characterized in that, the calculation method comprises following steps: S1. collecting three-phase AC currents ia, ib, ic, and DC currents idH, idN on a converter valve side of a DC transmission system, and trigger pulses FP1, FP2, FP3, FP4, FP5, FP6 of converter valves;S2. according to a topology structure of the converter of the DC transmission system, establishing a node current equation Ai=y of the three-phase AC currents ia, ib, ic, the DC currents idH, idN and valve currents iVTm on the valve side;
  • 2. The calculation method for a converter valve state and a valve current based on temporal features of a valve side current according to claim 1, characterized in that, processes of step S4 are as follows: S41. when it is detected in step S1 that the trigger pulses of the converter valves are at a high electric level and a conducting state criterion of the converter valves is satisfied, setting the valve states SVTm=1, wherein the conducting state criterion of the converter valves is: an amplitude |ik| of an AC current of the phase where the converter valve numbered m is located is greater than an AC current fixed value, namely: |i|>Iset3  (G5)in the formula (G5): ik is a, b, c three-phase AC currents, Iset3 is the AC current fixed value;S42. when the converter valve numbered m is in a conducting state SVTm=1, if the AC current meets a blocking state criterion, then the converter valve numbered m is in a blocking state SVTm=0; otherwise, the converter valve numbered m continues to maintain the conducting state SVTm=1, wherein the blocking state criterion of the converter valve is: the amplitude |ik| of the AC current of the phase where the converter valve numbered m is located is less than a blocking state current threshold fixed value, and a variation rate of the AC current is less than a variation threshold fixed value, namely:
  • 3. The calculation method for a converter valve state and a valve current based on temporal features of a valve side current according to claim 1, characterized in that, processes of step S8 are as follows: S81. according to the number of bypass phases obtained in step S7, when the number of bypass phases Stotal≤1, the converter valves operate without a bypass pair or one phase bypass pair, at this time, there is no need to construct the bypass loop voltage equation, skip to step S91, otherwise, go to step S82;S82. when the number of bypass phases Stotal=2, it indicates that two phase bypass pairs of the converter valves operate, supplementing the bypass loop voltage equation Cpi=Dp, skip to step S92; otherwise, go to step S83; wherein,1) If Sa=Sb, then a following relationship exists: iVT1+iVT4=iVT3+iVT6  (G8)supplementing the bypass loop voltage equation Cabi=Dab, wherein Cab=[1 0 −1 1 0 −1], Dab=[0], p=ab, Cab is a coefficient matrix of the bypass loop voltage equation when the ab phases bypass, Dab is a constant vector of the bypass loop voltage equation when the ab phases bypass;2) If Sa=Sc, then a following relationship exists: iVT1+iVT4=iVT2+iVT5  (G9)supplementing the bypass loop voltage equation Caci=Dac, wherein Cac=[1 −1 0 1 −1 0], Dac=[0], p=ac, Cac is a coefficient matrix of the bypass loop voltage equation when the ac phase bypass, and Dac is a constant vector of the bypass loop voltage equation when the ac phase bypass;3) If Sb=Sc, then a following relationship exists: iVT2+iVT5=iVT3+iVT6  (G10)supplementing the bypass loop voltage equation Cbci=Dbc, Cbc=[0 1 −1 0 1 −1], Dbc=[0], p=bc, Cbc is a coefficient matrix of the bypass loop voltage equation when the bc phase bypass, and Dbc is a constant vector of the bypass loop voltage equation when the bc phase bypass;S83. when the number of bypass phases Stotal=3, it indicates that three phase bypass pairs of the converter valves operate, supplementing the bypass loop voltage equation Cpi=Dp, skip to step S92; at the same time, a following relationship exists:
  • 4. The calculation method for a converter valve state and a valve current based on temporal features of a valve side current according to claim 1, characterized in that, in step S3, when a rising edge of a trigger pulse of a converter valve is detected FPm(t)−FPm(t−Δt)=1, latching the number m of the converter valve into the register; wherein FPm(t) is a trigger pulse signal of the converter valve numbered m at time t, FPm(t−Δt) is a trigger pulse signal of the converter valve numbered m at time (t−Δt), t is a time at a certain moment, Δt is a sampling time interval.
Priority Claims (1)
Number Date Country Kind
202110011319.4 Jan 2021 CN national
PCT Information
Filing Document Filing Date Country Kind
PCT/CN2021/122020 9/30/2021 WO
Publishing Document Publishing Date Country Kind
WO2022/148074 7/14/2022 WO A
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Entry
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Related Publications (1)
Number Date Country
20230396143 A1 Dec 2023 US