Number | Name | Date | Kind |
---|---|---|---|
4853872 | Shimoi | Aug 1989 | |
4924378 | Hershey et al. | May 1990 | |
4937864 | Robert et al. | Jun 1990 | |
5023907 | Johnson et al. | Jun 1991 | |
5175847 | Mellott | Dec 1992 | |
5204897 | Wyman | Apr 1993 | |
5260999 | Wyman | Nov 1993 | |
5363503 | Gleeson | Nov 1994 | |
5375206 | Hunter et al. | Dec 1994 | |
5390297 | Barber et al. | Feb 1995 | |
5548645 | Ananda | Aug 1996 | |
5553143 | Ross et al. | Sep 1996 | |
5568552 | Davis | Oct 1996 | |
5579222 | Baines et al. | Nov 1996 |
Entry |
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Dracula.RTM. Integrated Circuit (IC) Layout Verification System, Cadence Design Systems, Inc., Jul. 1991. |