This application claims priority to Korean Patent Application No. 10-2023-0130417, filed on Sep. 27, 2023, and all the benefits accruing therefrom under 35 U.S.C. § 119, the content of which in its entirety is herein incorporated by reference.
Embodiments of the invention relate to a display device, and more particularly to a method of compressing stress data in a display device, an encoder for compressing the stress data, a display driver including the encoder, and a display device including the encoder.
As a display device, such as an organic light emitting diode (OLED) display device, operates over time, driving transistors and/or OLEDs of pixels included in the display device may be degraded. If the pixels are degraded, the pixels may not emit light with desired luminance, and image sticking may be perceived in the display device. To reduce or eliminate the image sticking caused by the degradation of the pixels, the display device may store stress data representing accumulated degradation amounts of the pixels, and may compensate input image data based on the stress data.
However, as a resolution of a display panel increases, a size of a stress data memory for storing the stress data is increased.
Some embodiments provide a method of compressing stress data in a display device.
Some embodiments provide an encoder compressing stress data in a display device.
Some embodiments provide a display driver including the encoder.
Some embodiments provide a display device including the encoder.
According to embodiments, a method of compressing stress data in a display device includes dividing the stress data into block stress data for a pixel block, generating a plurality of compressed codes by encoding the block stress data in a plurality of encoding modes, determining whether the plurality of encoding modes are available encoding modes for the block stress data based on code lengths of the plurality of compressed codes and a number of available bits for the pixel block, selecting a final encoding mode among the available encoding modes based on quantization values of the available encoding modes, and generating a compressed bitstream for the pixel block based on a compressed code corresponding to the final encoding mode among the plurality of compressed codes.
In embodiments, the plurality of encoding modes may differ from each other in at least one selected from an encoding algorithm and a quantization value.
In embodiments, the generating the plurality of compressed codes by encoding the block stress data in the plurality of encoding modes may include generating a pulse code modulation (PCM) code, as one of the plurality of compressed codes, by performing a quantization operation on the block stress data.
In embodiments, the generating the plurality of compressed codes by encoding the block stress data in the plurality of encoding modes may include generating a predictive PCM code based on reconstructed block stress data for an adjacent pixel block adjacent to the pixel block, and generating a differential PCM (DPCM) code, as one of the plurality of compressed codes, based on the PCM code and the predictive PCM code.
In embodiments, the generating the plurality of compressed codes by encoding the block stress data in the plurality of encoding modes may include generating an entropy code, as one of the plurality of compressed codes, by performing entropy coding on the DPCM code.
In embodiments, the method may further include determining whether a copy mode is an available encoding mode by comparing a code length of the entropy code with a number of sub-pixels included in the pixel block.
In embodiments, the DPCM code for the pixel block may include a first color DPCM code for first color sub-pixels included in the pixel block, a second color DPCM code for second color sub-pixels included in the pixel block, and a third color DPCM code for third color sub-pixels included in the pixel block. In such embodiments, the generating the plurality of compressed codes by encoding the block stress data in the plurality of encoding modes may further include generating a first difference DPCM code by subtracting the first color DPCM code from the second color DPCM code, generating a second difference DPCM code by subtracting the first color DPCM code from the third color DPCM code, and generating, as one of the plurality of compressed codes, a color difference DPCM code including the first color DPCM code, the first difference DPCM code and the second difference DPCM code.
In embodiments, the number of available bits for the pixel block may correspond to a sum of a number of unused bits for a previous pixel block and a number of bits allocated to the pixel block.
In embodiments, the number of bits allocated to the pixel block may be determined based on a number of bits of the block stress data and a target compression rate.
In embodiments, the determining whether the plurality of encoding modes are the available encoding modes may include with respect to an encoding mode among the plurality of encoding modes, comparing a code length of a compressed code corresponding to the encoding mode among the plurality of compressed codes with the number of available bits, determining that the encoding mode is an available encoding mode when the code length is less than or equal to the number of available bits, and determining that the encoding mode is not the available encoding mode when the code length is greater than the number of available bits.
In embodiments, the method may further include determining whether the block stress data is specific pattern data.
In embodiments, the specific pattern data may include at least one selected from white pattern data having a same value for all sub-pixels included in the pixel block, and check pattern data having a same value for same color sub-pixels included in the pixel block.
In embodiments, the selecting the final encoding mode may include selecting an available encoding mode having a lowest quantization value among the available encoding modes as the final encoding mode.
In embodiments, the selecting the final encoding mode may include checking a lowest quantization value among the quantization values of the available encoding modes, comparing a difference between a previous quantization value of a final encoding mode for a previous pixel block and the lowest quantization value with a reference quantization difference value, selecting an available encoding mode having the lowest quantization value among the available encoding modes as the final encoding mode when a value obtained by subtracting the lowest quantization value from the previous quantization value is less than or equal to the reference quantization difference value, and selecting an available encoding mode having a quantization value higher than the lowest quantization value among the available encoding modes as the final encoding mode when the value obtained by subtracting the lowest quantization value from the previous quantization value is greater than the reference quantization difference value.
In embodiments, the compressed bitstream for the pixel block may include a mode bit representing the final encoding mode.
In embodiments, when the final encoding mode is a PCM mode, the compressed bitstream may further include a PCM code having one bit for each sub-pixel included in the pixel block.
In embodiments, when the final encoding mode is a DPCM mode, the compressed bitstream may further include an intra prediction mode bit representing a direction in which a DPCM code is calculated, and the DPCM code having two bits for each sub-pixel included in the pixel block.
In embodiments, when the final encoding mode is an entropy coding mode, the compressed bitstream may further include an intra prediction mode bit representing a direction in which a DPCM code is calculated, and an entropy code which is generated by performing entropy coding on the DPCM code and has variable bits for each sub-pixel included in the pixel block.
In embodiments, when a code length of an entropy code generated by encoding the block stress data in an entropy coding mode among the plurality of encoding modes is equal to a number of sub-pixels included in the pixel block, the final encoding mode may be determined as a copy mode. In such embodiments, when the final encoding mode is the copy mode, the compressed bitstream may include only the mode bit and an intra prediction mode bit.
In embodiments, when the block stress data is white pattern data having a same value with respect to all sub-pixels included in the pixel block, the final encoding mode may be determined as a white mode. In such embodiments, when the final encoding mode is the white mode, the compressed bitstream may further include a value bit representing the same value.
In embodiments, when the block stress data is check pattern data having a same first value with respect to first color sub-pixels included in the pixel block, a same second value with respect to second color sub-pixels included in the pixel block and a same third value with respect to third color sub-pixels included in the pixel block, the final encoding mode may be determined as a check mode. In such embodiments, when the final encoding mode is the check mode, the compressed bitstream may further include a first value bit representing the same first value, a second value bit representing the same second value and a third value bit representing the same third value.
According to embodiments, an encoder, which compresses stress data in a display device, includes a plurality of encoding circuits which generates a plurality of compressed codes by encoding block stress data for a pixel block in a plurality of encoding modes, a rate control circuit which determines whether the plurality of encoding modes are available encoding modes for the block stress data based on code lengths of the plurality of compressed codes and a number of available bits for the pixel block, and selects a final encoding mode among the available encoding modes based on quantization values of the available encoding modes, and a bitstream generation circuit which generates a compressed bitstream for the pixel block based on a compressed code corresponding to the final encoding mode among the plurality of compressed codes.
In embodiments, the plurality of encoding circuits may include a pulse code modulation (PCM) circuit which generates a PCM code as one of the plurality of compressed codes by performing a quantization operation on the block stress data, a differential PCM (DPCM) DPCM circuit which generates a DPCM code as one of the plurality of compressed codes based on the PCM code and a predictive PCM code, and an entropy coding circuit which generates an entropy code as one of the plurality of compressed codes by performing entropy coding on the DPCM code.
In embodiments, the encoder may further include a pattern determination circuit which determines whether the block stress data is at least one selected from white pattern data having a same value for all sub-pixels included in the pixel block, and check pattern data having a same value for same color sub-pixels included in the pixel block.
According to embodiments, a display driver of a display device includes a stress data generation circuit which generates stress data by accumulating input image data, an encoder which generates a compressed bitstream by encoding the stress data, a stress data memory which stores the compressed bitstream, a decoder which restores the stress data by decoding the compressed bitstream stored in the stress data memory, a data compensation circuit which generates output image data by compensating the input image data based on the restored stress data, and a data driver which provides data signals to a plurality of pixels of the display device based on the output image data. In such embodiments, the stress data is divided into block stress data for each pixel block. In such embodiments, the encoder includes a plurality of encoding circuits which generates a plurality of compressed codes by encoding the block stress data in a plurality of encoding modes, a rate control circuit which determines whether the plurality of encoding modes are available encoding modes for the block stress data based on code lengths of the plurality of compressed codes and a number of available bits for the pixel block, and selects a final encoding mode among the available encoding modes based on quantization values of the available encoding modes, and a bitstream generation circuit which generates the compressed bitstream for the pixel block based on a compressed code corresponding to the final encoding mode among the plurality of compressed codes.
According to embodiments, a display device includes a display panel including a plurality of pixels, a scan driver which provides scan signals to the plurality of pixels, a stress data generation circuit which generates stress data by accumulating input image data, an encoder which generates a compressed bitstream by encoding the stress data, a stress data memory which stores the compressed bitstream, a decoder which restores the stress data by decoding the compressed bitstream stored in the stress data memory, a data compensation circuit which generates output image data by compensating the input image data based on the restored stress data, and a data driver which provides data signals to the plurality of pixels based on the output image data. In such embodiments, the stress data is divided into block stress data for each pixel block. In such embodiments, the encoder includes a plurality of encoding circuits which generates a plurality of compressed codes by encoding the block stress data in a plurality of encoding modes, a rate control circuit which determines whether the plurality of encoding modes are available encoding modes for the block stress data based on code lengths of the plurality of compressed codes and a number of available bits for the pixel block, and selects a final encoding mode among the available encoding modes based on quantization values of the available encoding modes, and a bitstream generation circuit which generates the compressed bitstream for the pixel block based on a compressed code corresponding to the final encoding mode among the plurality of compressed codes.
As described above, in a method of compressing stress data, an encoder, a display driver and a display device according to embodiments, block stress data for each pixel block may be compressed in an optimal encoding mode among a plurality of encoding modes. Further, when the block stress data is specific pattern data, a compress bitstream containing a specific value rather than a compressed code may be generated. Accordingly, a size of a stress data memory may be minimized while minimizing a data loss of stress data.
Illustrative, non-limiting Embodiments will be more clearly understood from the following detailed description in conjunction with the accompanying drawings.
an entropy coding mode is selected.
The invention now will be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments are shown. This invention may, however, be embodied in many different forms, and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals refer to like elements throughout.
It will be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
It will be understood that, although the terms “first,” “second,” “third” etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, “a first element,” “component,” “region,” “layer” or “section” discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, “a”, “an,” “the,” and “at least one” do not denote a limitation of quantity, and are intended to include both the singular and plural, unless the context clearly indicates otherwise. Thus, reference to “an” element in a claim followed by reference to “the” element is inclusive of one element and a plurality of the elements. For example, “an element” has the same meaning as “at least one element,” unless the context clearly indicates otherwise. “At least one” is not to be construed as limiting “a” or “an.” “Or” means “and/or.” As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top,” may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The term “lower,” can therefore, encompasses both an orientation of “lower” and “upper,” depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The terms “below” or “beneath” can, therefore, encompass both an orientation of above and below.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Hereinafter, embodiments of the invention will be described in detail with reference to the accompanying drawings.
Referring to
In an embodiment, a plurality of compressed codes may be generated by encoding the block stress data BSD in a plurality of encoding modes (S105) as shown in
In some embodiments, as one of the plurality of compressed codes, a PCM code may be generated by performing a quantization operation on the block stress data BSD (S110) as shown in
In an embodiment, for example, as illustrated in
In an embodiment, as one of the plurality of compressed codes, a DPCM code may be generated based on the PCM code and a predictive PCM code (S115) as shown in
In an embodiment, for example, as illustrated in
When the vertical direction is determined as the direction in which the DPCM code DPCM_CODE is calculated, as illustrated in
In an embodiment, when the horizontal direction is determined as the direction in which the DPCM code DPCM_CODE is calculated, as illustrated in
In an embodiment, when the right-down direction is determined as the direction in which the DPCM code DPCM_CODE is calculated, as illustrated in
In an embodiment, when the left-down direction is determined as the direction in which the DPCM code DPCM_CODE is calculated, as illustrated in
In an embodiment, as one of the plurality of compressed codes, an entropy code may be generated by performing entropy coding on the DPCM code DPCM_CODE (S120) as shown in
In an embodiment, for example, as illustrated in
In an embodiment, as one of the plurality of compressed codes, a color difference DPCM code may be generated by calculating differences between the DPCM code DPCM_CODE for a reference color and the DPCM codes DPCM_CODE for other colors (S125) as shown in
In an embodiment, for example, as illustrated in
In another embodiment, for example, as illustrated in
In still another embodiment, for example, as illustrated in
In an embodiment, it may be determined whether the plurality of encoding modes are available encoding modes for the block stress data BSD based on code lengths of the plurality of compressed codes and the number of available bits for the pixel block (S130), as shown in
In some embodiments, for at least one encoding mode of the plurality of encoding modes, the code length of the compressed code (e.g., the DPCM code DPCM_CODE, the entropy code or the color difference DPCM code DPCM_D_R, DPCM_D_G and DPCM_D_B) corresponding to the encoding mode (e.g., the DPCM mode, the entropy coding mode or the color difference DPCM mode) may be compared with the number of available bits (S135). If the code length is greater than the number of available bits (S135: YES), the encoding mode may be determined to be an encoding mode that is unavailable for the block stress data BSD (S140). If the code length is less than or equal to the number of available bits (S135: NO), it may be determined that the encoding mode is the available encoding mode for the block stress data BSD (S145).
In some embodiments, the plurality of encoding modes may further include a copy mode. In a case where the entropy code has one bit for each of all sub-pixels, the block stress data BSD may be encoded in the copy mode. Thus, it may be determined whether the copy mode is the available encoding mode by comparing the code length of the entropy code with the number of sub-pixels included in the pixel block (S150). If the code length of the entropy code is equal to the number of sub-pixels, this means that the entropy code has one bit for each of all sub-pixels, and thus it may be determined that the copy mode is the available encoding mode for the block stress data BSD. In this case, that the entropy code has one bit for each of all sub-pixels may mean that the DPCM code DPCM_CODE for each of all sub-pixels has the same value of ‘0’, and thus a compressed bitstream in the copy mode may not include a separate code as illustrated in
Further, in some embodiments, the plurality of encoding modes may further include a specific pattern mode that encodes the block stress data BSD to a specific value when the block stress data BSD is specific pattern data. In an embodiment, it may be determined whether the block stress data BSD is the specific pattern data, and it may be determined whether the specific pattern mode is the available encoding mode (S155) as shown in
In some embodiments, the specific pattern data may include white pattern data having the same value for all sub-pixels included in the pixel block. That is, it may be determined whether the block stress data BSD is the white pattern data. If the block stress data BSD is the white pattern data, it may be determined that a white mode is the available encoding mode for the block stress data BSD (S160). In an embodiment, for example, as illustrated in
In an embodiment, the specific pattern data may include check pattern data having a same value for the same color sub-pixels included in the pixel block. That is, it may be determined whether the block stress data BSD is the check pattern data. If the block stress data BSD is the check pattern data, it may be determined that a check mode is the available encoding mode for the block stress data BSD (S165). In an embodiment, for example, as illustrated in
In an embodiment, a final encoding mode may be selected among the available encoding modes based on quantization values of the available encoding modes (S170), as shown in
In another embodiment, for example, in a case where seven encoding modes having mode numbers from 0 to 4 are not the available encoding modes, and twenty-one encoding modes having mode numbers from 5 to 15 are the available encoding modes, one of the DPCM mode and the entropy coding mode having a mode number of 5 and the lowest quantization number of 2 among the twenty-one encoding modes may be selected as the final encoding mode. In this case, the code length of the DPCM mode with the quantization value of 2 and the code length of the entropy coding mode with the quantization value of 2 may be compared with each other, and the encoding mode having a smaller code length between the DPCM mode and the entropy coding mode may be selected as the final encoding mode.
In an embodiment, the PCM code PCM_CODE generated in PCM mode with a quantization value of 7 may have one bit for each sub-pixel, and may have only twenty-four bits for the pixel block. Thus, the PCM mode having the mode number of 15 and the quantization value of 7 may always be the available encoding mode. Therefore, if all other encoding modes are not the available encoding modes, the PCM mode having the mode number of 15 may be selected as the final encoding mode.
In some embodiments, the final encoding mode may be selected in a way such that a quantization value for a current pixel block is not reduced by more than a reference difference compared with a quantization value for a previous pixel block. Accordingly, defects in a compensated image caused by an excessive difference in quantization values between adjacent pixel blocks may be effectively prevented. In an embodiment, for example, as illustrated in
In an embodiment, a compressed bitstream for the pixel block may be generated based on the compressed code corresponding to the final encoding mode among the plurality of compressed codes (i.e., a compression code encoded in the final encoding mode) (S195) as shown in
In an embodiment, for example, when the final encoding mode is the PCM mode, as illustrated in
In an embodiment, when the final encoding mode is the DPCM mode (or the color difference DPCM mode), as illustrated in
In an embodiment, when the final encoding mode is the entropy coding mode, as illustrated in
In an embodiment, when the code length of the entropy code ENTROPY_CODE is equal to the number of sub-pixels included in the pixel block, the copy mode may be determined as the final encoding mode. When the final encoding mode is the copy mode, as illustrated in
In an embodiment, when the block stress data BSD is the white pattern data in which the stress data for all sub-pixels included in the pixel block have the same value, the white mode may be determined as the final encoding mode. When the final encoding mode is the white mode, as illustrated in
In an embodiment, when the block stress data BSD is the check pattern data having a same first value for the first color sub-pixels (e.g., the red sub-pixels) included in the pixel block, a same second value for the second color sub-pixels (e.g. the green sub-pixels) included in the pixel block, and a same third value for the third color sub-pixels (e.g. the blue sub-pixels) included in the pixel block, the check mode may be determined as the final encoding mode. When the final encoding mode is the check mode, as illustrated in
As described above, in the method of compressing the stress data according to embodiments, the block stress data BSD for each pixel block may be encoded in an optimal encoding mode among the plurality of encoding modes (e.g., the PCM mode, the DPCM mode, the entropy coding mode, the color difference DPCM mode, the copy mode, the white mode and the check mode). In such embodiments, since the stress data is compressed into the compressed bitstream BS while minimizing the data loss, and the compressed bitstream BS is stored in a stress data memory instead of the stress data, the size of the stress data memory may be minimized.
Referring to
The encoder 200 may generate a plurality of compressed codes PCM_CODE, DPCM_CODE and ECODE by encoding block stress data BSD for each pixel block in a plurality of encoding modes. In some embodiments, the plurality of encoding circuits 210, 220 and 230 of the encoder 200 may include a PCM circuit 210, a DPCM circuit 220 and an entropy coding circuit 230.
The PCM circuit 210 may generate a PCM code PCM_CODE by performing a quantization operation on the block stress data BSD. Here, the quantization operation may be an operation of removing a number of lower bits corresponding to a quantization value from the stress data for each sub-pixel included in the block stress data BSD. The PCM circuit 210 may provide the PCM code PCM_CODE to the DPCM circuit 220 and the bitstream generation circuit 260.
The DPCM circuit 220 may generate a DPCM code DPCM_CODE based on the PCM code PCM_CODE and a predictive PCM code PCODE. In some embodiments, the DPCM circuit 220 may further generate a color difference DPCM code based on the DPCM code DPCM_CODE. In some embodiments, the DPCM circuit 220 may include a reconstruction circuit 222, a prediction circuit 224 and a subtractor 226.
The reconstruction circuit 222 may generate reconstructed block stress data RBSD for an adjacent pixel block by reconstructing a compressed bitstream BS (or the DPCM code DPCM_CODE) for the adjacent pixel block adjacent to the pixel block. In some embodiments, the reconstruction circuit 222 may perform a dithering operation to add lower bits that were removed by the quantization operation to the reconstructed block stress data RBSD.
The prediction circuit 224 may determine a direction in which the DPCM code DPCM_CODE for the pixel block is calculated based on the PCM code PCM CODE for the pixel block (or the block stress data BSD for the pixel block) and the reconstructed block stress data RBSD for the adjacent pixel block, and may provide the subtractor 226 with an intra prediction mode bit indicating the determined direction and the predictive PCM code PCODE corresponding to the determined direction. In an embodiment, for example, the prediction circuit 224 may (previously) calculate DPCM codes DPCM_CODE for the pixel block in a vertical direction, a horizontal direction, a right-down direction and a left-down direction, and may select a direction in which a value of the DPCM code DPCM_CODE for the pixel block (e.g., a maximum value or an average value of the DPCM codes DPCM_CODE for sub-pixels included in the pixel block) is minimized among the vertical direction, the horizontal direction, the right-down direction and the left-down direction.
The subtractor 226 may generate the DPCM code DPCM_CODE for the pixel block based on the PCM code PCM_CODE for the pixel block and the predictive PCM code PCODE for the adjacent pixel block. In an embodiment, for example, the subtractor 226 may generate the DPCM code DPCM_CODE for each pixel by subtracting the predictive PCM code PCODE (or the PCM code PCM_CODE) for an adjacent pixel from the PCM code PCM CODE for the pixel. The subtractor 226 may provide the DPCM code DPCM_CODE to the entropy coding circuit 230 and the bitstream generation circuit 260, and may provide a code length DPCM_CL of the DPCM code DPCM_CODE to the rate control circuit 250.
The entropy coding circuit 230 may generate an entropy code ECODE by performing entropy coding on the DPCM code DPCM_CODE. In some embodiments, the entropy coding circuit 230 may perform Golomb coding as the entropy coding, but is not limited thereto. The entropy coding circuit 230 may provide the entropy code ECODE to the bitstream generation circuit 260, and may provide a code length ECODE_CL of the entropy code ECODE to the rate control circuit 250.
Although
The pattern determination circuit 240 may determine whether the block stress data BSD is at least one selected from white pattern data having a same value for all sub-pixels included in the pixel block, and check pattern data having a same value for the same color sub-pixels included in the pixel block. When the block stress data BSD is the white pattern data, the pattern determination circuit 240 may notify the rate control circuit 250 that the white mode is an available encoding mode, and may provide the same value for all sub-pixels to the bitstream generation circuit 260. Further, when the block stress data BSD is the check pattern data, the pattern determination circuit 240 may notify the rate control circuit 250 that the check mode is an available encoding mode, and may provide the same values for respective color sub-pixels to the bitstream generation circuit 260.
The rate control circuit 250 may determine whether the plurality of encoding modes are available encoding modes for the block stress data BSD based on the code lengths DPCM_CL and ECODE_CL of the plurality of compressed codes DPCM_CODE and ECODE and the number of available bits for the pixel block. In some embodiments, the number of available bits for the pixel block may correspond to a sum of the number of unused bits for a previous pixel block and the number of bits allocated to the pixel block. In an embodiment, for example, if the code length DPCM_CL of the DPCM code DPCM CODE is less than or equal to the number of available bits, it may be determined that the DPCM mode is the available encoding mode. In such an embodiment, if the code length ECODE_CL of the entropy code ECODE is less than or equal to the number of available bits, it may be determined that the entropy coding mode is the available encoding mode. Since the code length of the PCM code PCM_CODE is fixed according to the quantization value, the code length of the PCM code PCM_CODE may not be compared with the number of available bits, and the PCM mode having a predetermined quantization value (e.g., a quantization value of 7 as illustrated in
In an embodiment, the rate control circuit 250 may select a final encoding mode among the available encoding modes based on quantization values of the available encoding modes, and may provide a mode selection signal MS indicating the final encoding mode to the bitstream generation circuit 260. In some embodiments, the rate control circuit 250 may select an available encoding mode having the lowest quantization value among the available encoding modes as the final encoding mode. In other embodiments, the rate control circuit 250 may select an available encoding mode having a quantization value higher than the lowest quantization value as the final encoding mode when the lowest quantization value is lower by more than a reference quantization difference value than a previous quantization value of a final encoding mode for a previous pixel block.
The bitstream generation circuit 260 may generate a compressed bitstream BS for the pixel block based on the compressed code encoded in the final encoding mode. In an embodiment, for example, when the final encoding mode is the PCM mode, the bitstream generation circuit 260 may generates the compressed bitstream BS including a mode bit MB and a PCM code PCM_CODE as illustrated in
As described above, the encoder 200 according to embodiments may compress the block stress data BSD for each pixel block in an optimal encoding mode among the plurality of encoding modes (e.g., the PCM mode, the DPCM mode, the entropy coding mode, the color difference DPCM mode, the copy mode, the white mode and the check mode). In such embodiments, since the stress data is compressed into the compressed bitstream BS while minimizing the data loss, and the compressed bitstream BS is stored in a stress data memory instead of the stress data, the size of the stress data memory may be minimized.
Referring to
The display panel 310 may include a plurality of data lines, a plurality of scan lines, and the plurality of pixels PX connected to the plurality of data lines and the plurality of scan lines. In some embodiments, each pixel PX may include a light emitting element, and the display panel 310 may be a light emitting display panel. In an embodiment, for example, the light emitting element may be, but is not limited to, an organic light emitting diode (OLED), a nano light emitting diode (NED), a quantum dot (QD) light emitting diode, a micro-light emitting diode, an inorganic light emitting diode, or any other suitable light emitting device. In other embodiments, the display panel 310 may be a liquid crystal display (LCD) panel, or any other suitable display panel.
The scan driver 320 may generate the scan signals SS based on a scan control signal SCTRL received from the controller 350, and may sequentially provide the scan signals SS to the plurality of pixels PX through the plurality of scan lines on a row-by-row basis. In some embodiments, the scan control signal SCTRL may include, but is not limited to, a scan start signal and a scan clock signal. In some embodiments, the scan driver 320 may be integrated or formed in the display panel 310. In other embodiments, the scan driver 320 may be implemented as one or more integrated circuits.
The data driver 340 may generate the data signals DS based on the output image data ODAT and the data control signal DCTRL received from the controller 350, and may provide the data signals DS to the plurality of pixels PX through the plurality of data lines. In some embodiments, the data control signal DCTRL may include, but is not limited to, an output data enable signal, a horizontal start signal, and a load signal. In some embodiments, the display driver 330 including the data driver 340 and the controller 350 may be implemented as a single integrated circuit, and the single integrated circuit may be referred to as a timing controller embedded data driver (TED) integrated circuit. In other embodiments, the data driver 340 and the controller 350 may be implemented as separate integrated circuits.
The controller 350 (e.g., a timing controller) may receive input image data IDAT and a control signal CTRL from an external host processor (e.g., an application processor (AP), a graphics processing unit (GPU) or a graphics card). In some embodiments, the input image data IDAT may be RGB image data including red image data, green image data and blue image data. In some embodiments, the control signal CTRL may include, but is not limited to, a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal and a master clock signal. The controller 350 may generate the output image data ODAT by compensating the input image data IDAT based on stress data SD. Further, the controller 350 may control an operation of the data driver 340 by providing the output image data ODAT and the data control signal DCTRL to the data driver 340, and may control an operation of the scan driver 320 by providing the scan control signal SCTRL to the scan driver 320.
In the display device 300 according to embodiments, the display driver 330 or the controller 350 may generate a compressed bitstream BS by compressing or encoding the stress data SD, may store the compressed bitstream BS, may restore the stress data SD by decoding the stored compressed bitstream BS, and may generate the output image data ODAT by compensating the input image data IDAT based on the restored stress data SD. To perform these operations, the controller 350 may include the stress data generation circuit SDGC, the encoder ENC, the stress data memory SDM, the decoder DEC and the data compensation circuit DCC.
The stress data generation circuit SDGC may generate the stress data SD by accumulating the input image data IDAT. The encoder ENC may encode the stress data SD to generate the compressed bitstream BS. The encoder ENC may be an encoder 200 illustrated in
The decoder DEC may read the compressed bitstream BS from the stress data memory SDM, and may decode the read compressed bitstream BS to restore the stress data SD. The data compensation circuit DCC may generate the output image data ODAT by compensating the input image data IDAT based on the restored stress data SD. The data driver 340 may provide the data signals DS to the plurality of pixels PX based on the output image data ODAT. Accordingly, degradation of the plurality of pixels PX may be compensated, and an afterimage may be effectively prevented in the display device 300.
Referring to
The processor 1110 may perform various computing functions or tasks. The processor 1110 may be an application processor (AP), a micro-processor, a central processing unit (CPU), etc. The processor 1110 may be coupled to other components via an address bus, a control bus, a data bus, etc. Further, in some embodiments, the processor 1110 may be further coupled to an extended bus such as a peripheral component interconnection (PCI) bus.
The memory device 1120 may store data for operations of the electronic device 1100. For example, the memory device 1120 may include at least one non-volatile memory device such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase change random access memory (PRAM) device, a resistance random access memory (RRAM) device, a nano floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, a ferroelectric random access memory (FRAM) device, etc., and/or at least one volatile memory device such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a mobile dynamic random access memory (mobile DRAM) device, etc.
The storage device 1130 may be a solid state drive (SSD) device, a hard disk drive (HDD) device, a CD-ROM device, etc. The I/O device 1140 may be an input device such as a keyboard, a keypad, a mouse, a touch screen, etc., and an output device such as a printer, a speaker, etc. The power supply 1150 may supply power for operations of the electronic device 1100. The display device 1160 may be coupled to other components through the buses or other communication links.
In the display device 1160, block stress data for each pixel block may be compressed in an optimal encoding mode among a plurality of encoding modes. Further, when the block stress data is specific pattern data, a compress bitstream containing a specific value rather than a compressed code may be generated. Accordingly, a size of a stress data memory may be minimized while minimizing a data loss of stress data.
Embodiments of the inventions may be applied any electronic device 1100 including the display device 1160, for example, a television (TV), a digital TV, a three-dimensional (3D) TV, a smart phone, a wearable electronic device, a tablet computer, a mobile phone, a personal computer (PC), a home appliance, a laptop computer, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital camera, a music player, a portable game console, a navigation device, etc.
The invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of the invention to those skilled in the art.
While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit or scope of the invention as defined by the following claims.
Number | Date | Country | Kind |
---|---|---|---|
10-2023-0130417 | Sep 2023 | KR | national |