The present invention relates generally to a method of controlling a grid side converter of a wind turbine and a system suitable therefore. Further, the present invention relates to a wind turbine.
In order to electrically connect a wind turbine generator to a power grid, several power connection arrangements may be used. A typical power connection arrangement (e.g. for a full scale converter based turbine) comprises a generator side converter, a DC (direct current) link, a grid side converter and a grid transformer which are placed between the wind turbine generator and the power grid in this order. The generator side converter controls the generator power and transfers it to the grid through the DC-link and the grid side converter. The control of the grid side converter should be carried out such that the quality of the electrical power supplied to the grid is kept within predetermined tolerance ranges even during abnormal grid voltage conditions like symmetric/asymmetric voltage dip and swell conditions. In case of abnormal grid voltage conditions, support of reactive power may be needed to fulfil the grid requirements. That is, the power which is supplied to the grid needs to have, besides an active power component, a reactive power component. During normal working conditions, the reactive power component might be required depending on the grid support requirement. The reactive power support is getting increasingly important due to the grid code requirements that are getting stricter along the increase of wind power penetration.
It is therefore an object to provide a method of controlling a wind turbine which is capable of supporting the demanded power quality even during abnormal voltage conditions. Further, this method should be easy to realize.
According to an embodiment of the present invention, a method of controlling a grid side converter of a wind turbine is provided, wherein an output of the grid side converter is connected or connectable via a power line to an input of a grid transformer, the method comprising: a) determining a converter volt-sec occurring at the output of the grid side converter based on a converter voltage occurring at the output of the grid side converter; b) determining a volt-sec error between the determined/actual converter volt-sec and a converter volt-sec reference, wherein the converter volt-sec reference is determined based on an active power reference, a reactive power reference, a line current and a line voltage occurring at the input of the grid transformer (or at wind turbine terminals); and c) controlling, based on the determined volt-sec error, the grid side converter such that the volt-sec error is (partially or fully) compensated. The term ‘volt-sec’ stands for volt-seconds. It is a vector entity and is equivalent to flux in AC machines. According to an embodiment of the present invention, this process may be supported by volt-sec prediction, as will become apparent later on.
According to an embodiment of the present invention, the converter volt-sec reference is determined based on an active power volt-sec reference, a reactive power volt-sec reference, a line current and a line voltage.
According to an embodiment of the present invention, the active power volt-sec reference is determined based on a difference between an active power reference demanded at the input of the grid transformer (or at wind turbine terminals) and an active power occurring at the input of the grid transformer (or at wind turbine terminals).
According to an embodiment of the present invention, the reactive power volt-sec reference is determined based on a difference between a reactive power reference demanded at the input of the grid transformer (or at wind turbine terminals) and a reactive power occurring at the input of the grid transformer (or at wind turbine terminals).
According to an embodiment of the present invention, the active power volt-sec reference and the reactive power volt-sec reference are respectively frozen if the amplitude of the line current occurring at the input of the grid transformer exceeds a predetermined threshold value.
According to an embodiment of the present invention, the active power and the reactive power are determined based on the line current and the line voltage occurring at the input of the grid transformer.
According to an embodiment of the present invention, determining the converter volt-sec reference comprises generating a first volt-sec reference in dependence on the active power volt-sec reference and the reactive power volt-sec reference.
According to an embodiment of the present invention, the first volt-sec reference is generated as a αβ frame volt-sec vector.
According to an embodiment of the present invention, determining the converter volt-sec reference comprises generating a second volt-sec reference by adding a grid volt-sec to the first volt-sec reference.
According to an embodiment of the present invention, the grid volt-sec is determined based on at least one of the line current and the line voltage occurring at the input of the grid transformer.
According to an embodiment of the present invention, determining the converter volt-sec reference comprises predicting a converter volt-sec which should occur in the next sampling cycle based on the second volt-sec reference, an angular velocity of the line voltage occurring at the input of the grid transformer and a sampling period of the grid side converter, and using the predicted converter volt-sec as converter volt-sec reference.
According to an embodiment of the present invention, controlling of the grid side converter is carried out by supplying, in dependence on the determined volt-sec error, pulse width modulation signals to the grid side converter which adjust the output voltage of the grid side converter accordingly.
According to an embodiment of the present invention, the compensation of the volt-sec error (Δφc) is carried out using a PWM switching technique in the linear region of grid side converter operation, and using an over-modulation technique in the non-linear region of the grid side converter operation. Therefore unlike in conventional approaches of current controls, this embodiment naturally extends the grid side converter operation to better utilize the DC-link. Moreover, volt-sec error (Δφc) compensation technique naturally fits very well to space vector modulation.
According to an embodiment of the present invention, a controlling system for controlling a grid side converter of a wind turbine is provided, an output of the grid side converter being connected or connectable via a power line to an input of a grid transformer. The controlling system comprises an inner control loop and an outer control loop. The inner control loop comprises: a converter volt-sec determining unit which determines a converter volt-sec occurring at the output of the grid side converter based on a converter voltage occurring at the output of the grid side converter; a volt-sec error determining unit determining a volt-sec error between the determined converter volt-sec and a converter volt-sec reference; and a controlling unit which controls, based on the determined volt-sec error, the grid side converter such that the volt-sec error is compensated, wherein the outer control loop is configured to determine the converter volt-sec reference based on active power demand and reactive power demand (active and reactive power reference), a line voltage and a line current occurring at the input of the grid transformer (or at wind turbine terminals).
According to an embodiment of the present invention, the outer control loop comprises an active power volt-sec reference determining unit and a reactive power volt-sec reference determining unit which determines an active power volt-sec reference and a reactive power volt-sec reference based on (1) an active power reference and active power occurring at the input of the grid transformer (or at wind turbine terminals) (2) a reactive power reference and reactive power occurring at the input of the grid transformer (or at wind turbine terminals).
According to an embodiment of the present invention, the active power volt-sec reference determining unit determines the active power volt-sec reference based on a difference between an active power reference and an active power occurring at the input of the grid transformer (or at wind turbine terminals).
According to an embodiment of the present invention, the reactive power volt-sec reference determining unit determines the reactive power volt-sec reference based on a difference between a reactive power reference and a reactive power occurring at the input of the grid transformer (or at wind turbine terminals).
According to an embodiment of the present invention, the outer control loop comprises a current limiting unit which causes the active power volt-sec reference and the reactive power volt-sec reference to be respectively frozen if the amplitude of the line current occurring at the input of the grid transformer exceeds a predetermined threshold value.
According to an embodiment of the present invention, the outer control loop comprises an active power determining unit and a reactive power determining unit which determine the active power and reactive power based on the line current and the line voltage occurring at the input of the grid transformer, respectively.
According to an embodiment of the present invention, the outer control loop comprises a αβ frame volt-sec vector generating unit which generates a first volt-sec reference as a αβ frame volt-sec vector in dependence on the active power volt-sec reference, the reactive power volt-sec reference and an angle of the line voltage.
According to an embodiment of the present invention, the outer control loop comprises a second volt-sec reference generating unit which generates a second volt-sec reference by adding a grid volt-sec to the first volt-sec reference.
According to an embodiment of the present invention, the outer control loop comprises a grid volt-sec determining unit which determines the grid volt-sec based on at least one of the line current and the line voltage occurring at the input of the grid transformer.
According to an embodiment of the present invention, the outer control loop comprises a converter volt-sec reference predicting unit which predicts a converter volt-sec for the next sampling cycle based on the second volt-sec reference, an angular velocity of the line voltage occurring at the input of the grid transformer and a sampling period of the grid side converter, and outputs the predicted converter volt-sec as converter volt-sec reference.
According to an embodiment of the present invention, the inner control loop comprises a PWM unit which controls, in dependence on the determined volt-sec error, the output voltage of the grid side converter by supplying pulse width modulation signals to the grid side converter.
According to an embodiment of the present invention, a wind turbine is provided comprising a power generator (AC machine) and a grid side converter, wherein the power generator is connected to the grid side converter via a generator side converter and a DC-link connecting the generator side converter with the grid side converter, and wherein the wind turbine comprises a controlling system for controlling the grid side converter of the wind turbine.
According to an embodiment of the present invention, in order to compensate the volt-sec error (i.e. to compensate the volt-sec error between the determined converter volt-sec and a converter volt-sec reference, also referred to as “volt-sec (volt-seconds) compensation”), any PWM technique can be used. Among various PWM techniques, space vector modulation (SVM) is known for its various advantages. The volt-sec compensation approach naturally fits with the SVM technique.
According to an embodiment of the present invention, the outer control loop may be operated at low bandwidth, whereas the inner control loop may be operated at high bandwidth which helps to obtain good dynamic response. The inner control loop may simply comprise or consist of a volt-sec compensation block which can be executed very fast.
According to an embodiment of the present invention, almost all currents, voltages and volt-secs which are used by the embodiments of the present invention are respectively vectors.
According to an embodiment of the present invention, a PLL (phase locked loop) is used with positive and negative sequence separator. It is also referred to as PLL with positive and negative sequence calculator (PNSC).
According to an embodiment of the present invention, an active power p and reactive power q are calculated using the expressions p=1.5(vαiα+vβiβ) and q=1.5(vαiβ−vβiα) where [vα,vβ] are actual or positive sequence grid voltages and [iα, iβ] are actual or positive sequence line currents. Here, α and β indicate the α and β components of the current and voltage signals in the stationary αβ frame, respectively.
In the scope of the embodiments of the present invention, the term “volt-sec” stands for “volt-seconds”. “Volt-sec” means a vector entity, the unit of which being volt*second. In AC power generators, the term “volt-sec” is equivalent to the term “flux”.
According to an embodiment of the present invention, depending on regulation and system requirements, controlling the active power p to the active power reference p* is given priority over controlling the reactive power q to the reactive power reference q*, or vice versa. That is, according to an embodiment of the present invention, depending on the situations, the active power reference p* and the reactive power reference q* may take priority one over the other. For example, when grid support is required, q* may take priority over p*, and in conditions where active power control is required to reduce mechanical stress on the turbine drivetrain/structure, p* may take priority over q*. Of course, it is also possible to give the same priority to both controlling the active power and the reactive power. Many other situations are possible.
In the following, further aspects of embodiments of the present invention will be described.
As has become apparent in the preceding description, embodiments of the present invention provide a grid side converter control philosophy to directly control the real and reactive power transacted with the grid. Due to the simplicity of the proposed close loop control, it can be easily implemented on two-level converters as well as on multi-level converters. The proposed close loop control is capable of riding through grid symmetric/asymmetric voltage dip and swell conditions. This ensures a better connectivity of the turbine with the grid under fault conditions. Further, the approach is computationally simple to realize. With respect to conventional controls, the proposed control requires lesser controllers.
According to an embodiment of the present invention, reactive power needed during a low voltage grid fault ride through event is generated by setting a reactive power reference to a desired value and by limiting an active power reference based on grid side converter current limits. In the low voltage condition, a chopper resistor located in a DC-link may also be used such that active power coming from the generator can be dissipated in the chopper resistor. The same can be applied to high voltage condition.
According to an embodiment of the present invention, a PLL algorithm may be used to estimate the grid angle (γ) and the angular speed (ω) of the grid voltage. The PLL algorithm may be implemented using synchronous rotating frame (SRF) technique and may use moving average (MA) technique to eliminate negative sequence and harmonics components from the grid voltage. Thus, the grid angle (γ) and the angular speed (ω) may be calculated based on the positive sequence voltage. However, the grid angle (γ) and the angular speed (ω) may also be calculated based on the negative sequence voltage. There are many other methods of estimating the grid angle (γ) and the angular speed (ω) of the grid voltage which may be used.
According to embodiments of the present invention, the grid side converter controlling method is able to easily handle symmetric/asymmetric grid voltage swell and dip conditions. Further, the hardware/software structure for realizing the grid side converter controlling method is the same for balanced/unbalanced grid voltages.
According to an embodiment of the present invention, SVM technique may be used to control the grid side converter which can be seamlessly integrated into techniques such as bus-clamping, three phase symmetry and half-wave symmetry PWM. These techniques can help to significantly improve converter performance.
According to an embodiment of the present invention, the switching frequency of the grid side converter is kept constant during operation.
According to an embodiment of the present invention, the proposed algorithm can be easily applied to multilevel inverters as grid side converters. With the use of multilevel inverters, the line filter size and weight may be reduced and cost saving can be achieved.
The following advantages may be achieved by using embodiments of the present invention:
a) A tight control of power and voltage can be achieved due to the use of volt-second based approach.
b) The proposed control method performs well in LVRT (low voltage ride through) and HVRT (high voltage ride through) in both symmetric and asymmetric fault conditions. This is one of the main advantages, compared to conventional DPC (direct power control) approaches. Further, the hardware/software structure for realizing the proposed grid side converter control method is the same for balanced/unbalanced grid conditions.
c) A good dynamic response of the grid side control (fast controlling speed) can be achieved due to an inherently fast inner loop.
d) The proposed control method can be easily operated up to six-step operation which can help to achieve faster dynamic response due to better utilization of the DC-link. This is due to the fact that in the normal modulation range up to 90.7% of the installed DC-link capacity can be utilized. However, through operation in overmodulation region till six-step operation 100% of the installed DC-link capacity can be used. The volt-sec error is significantly large in a dynamic grid condition. Thus, a fast dynamic performance of the grid side controller is needed. This fast dynamic performance can be achieved in view of the simplicity of the proposed control method. The proposed algorithm ensures that the volt-sec balance is maintained even in a dynamic condition e.g. grid faults. As far as details of overmodulation and six-step techniques which may be employed by embodiments of the present invention are concerned, the following references should be cited: (1) N. Mohan, T. M. Undeland, and W. P. Robbins, Power electronics: converters, applications, and design. Hoboken, N.J.: John Wiley and Sons, third ed., 2003. (2) J. Holtz, “Pulsewidth modulation-a survey,” Industrial Electronics, IEEE Transactions on, vol. 39, pp. 410-420, October 1992. (3) J. Holtz, W. Lotzkat, and A. M. Khambadkone, “On continuous control of pwm inverters in overmodulation range including six-step,” IEEE Transaction on Power Electronics, vol. 8, pp. 546-553, 1993.
e) Due to the use of volt-second compensation, the proposed algorithm is inherently suitable to space vector modulation (SVM) which can be easily applied to two-level or multilevel based grid side converters.
f) The switching frequency of the grid side converter can be kept constant, in contrast to some DPC based control algorithms where the switching frequency is not constant. Constant switching frequency leads to simplicity of a grid filter design. This also helps to limit and reduce the switching loss occurring in power converters.
g) The proposed approach is computationally simple.
h) The proposed concept can easily be used together with synchronous SVM technique which helps to eliminate the subharmonics and interharmonics included within the voltage signal output by the grid side converter. These harmonics are difficult to be filtered by a grid side filter and may create a number of problems for grid control and grid connected applications.
i) Since the proposed concept uses volt-sec as basis, it is inherently suitable for the SVM. The implementation of bus-clamping is very easy for SVM. With bus-clamped SVM, the proposed concept can achieve 33% switching loss reduction. In bus clamping one of the phase legs is not switched at all for a given switching period while still forming the given reference vector with discrete switching states. As far as details of SVM based bus clamping techniques which may be employed by embodiments of the present invention are concerned, the following references should be cited: (1) A. Beig, G. Narayanan, and V. Ranganathan, “Space vector based synchronized pwm algorithm for three level voltage source inverters: principles and application to v/f drives,” IECON 02 [Industrial Electronics Society, IEEE 2002 28th Annual Conference of the], vol. 2, pp. 1249-1254, November 2002. (2) G. Narayanan and V. T. Ranganathan, “Synchronised bus-clamping pwm strategies based on space vector approach for modulation up to six-step mode,” Power Electronic Drives and Energy Systems for Industrial Growth, 1998. Proceedings. 1998 International Conference on, vol. 2, pp. 996-1001, December 1998. (3) G. Narayanan and V. T. Ranganathan, “Synchronised pwm strategies based on space vector approach. i. principles of waveform generation,” Electric Power Applications, IEE Proceedings, vol. 146, pp. 267-275, May 1999. (4) G. Narayanan and V. T. Ranganathan, “Two novel synchronized busclamping pwm strategies based on space vector approach for high power drives,” Power Electronics, IEEE Transactions on, vol. 17, pp. 84-93, January 2002.
j) Due to absence of cross coupling term, the proposed controller is more robust especially considering grid choke saturation and frequency variations.
According to an embodiment of the present invention, the compensation of the volt-sec error (volt-sec error Δψ) is understood as follows: According the faraday's law, the voltage vector equals the change of the volt-sec vector over time, i.e. v=dψ/dt. It can be equivalently written as Δψ=vΔt, i.e. the volt-sec error Δψcan be compensated by holding the voltage vector v for the small time period Δt. This explains the principle of volt-sec error based implementation of SVM.
In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the invention. In the following description, various embodiments of the invention are described with reference to the following drawings, in which:
In normal condition, it can be assumed that the grid voltage ug is constant. In general, for any grid condition ug can be considered as the grid reference voltage for the grid converter control. The voltage ux changes if the line current ig changes. The line current ig itself changes with respect to the demanded power which has to be supplied by the grid side converter 202 to the low voltage side 204 of the grid transformer. Thus, the voltage ue has to be adapted due to a change of the demanded power, ig and therefore ux changes.
In order to adapt the voltage ue, the grid side converter 202 has to be controlled accordingly. In the following, methods/systems for controlling the grid side converter 202 are described which are capable of supporting the demanded power quality even during abnormal voltage conditions, and which are easy to realize.
The unit 322 for determining the converter volt-sec reference φpc* may comprise several subunits, as will become apparent below in conjunction with
As can be derived from
The controlling system 600 comprises an inner control loop arrangement 610 and an outer control loop arrangement 612. The inner control loop arrangement 610 comprises: a converter volt-sec determining unit 614 which determines a converter volt-sec φe occurring at the output 606 of the grid side converter 602 based on a converter voltage uc occurring at the output 606 of the grid side converter 602. The converter volt-sec φc may for example be determined using the following formula:
φc=∫ucdt
That is, the converter volt-sec φc may be obtained by integrating the measured converter voltage uc occurring at the output 606 of the grid side converter 602 over the time. The converter volt-sec φc may also be estimated through converter duty ratios and the DC-link voltage. The converter volt-sec φc may also be calculated with different approaches.
The inner control loop arrangement 610 further comprises a volt-sec error determining unit 616 determining a volt-sec error Δφc (i.e. a difference between the converter volt-sec φc and a converter volt-sec reference φpc* (φpc* is the target volt-sec to be output by the grid side converter 602)). The volt-sec difference Δφc is also referred to as “volt-sec error”. Part of the inner control loop arrangement 610 is also a controlling unit 618 which controls, based on the determined volt-sec error Δφc, the grid side converter 602 such that the volt-sec error Δφc is compensated. The controlling unit 618 is essentially a PWM unit which determines the duty ratios for the power switches of the grid side converter 602.
The outer control loop arrangement 612 comprises several units for determining the converter volt-sec reference φpc* based on active power reference p*, reactive power reference q*, line current ig and a line voltage ug occurring at the input 608 of the grid transformer 640. These units will be described in the following.
The outer control loop arrangement 612 comprises an active power volt-sec reference determining unit 620 and a reactive power volt-sec reference determining unit 622 which determine an active power volt-sec reference φxq*(projection of the volt-sec φx* on the q-axis) and a reactive power volt-sec reference φxd* (projection of the volt-sec φx* on the d-axis) based on an active power reference p* and a reactive power reference q* demanded at the input 608 of the grid transformer 640 (or at wind turbine terminals), respectively.
The active power volt-sec reference determining unit 620 determines the active power volt-sec reference φxq* based on a difference between an active power reference p* and an active power p occurring at the input 608 of the grid transformer 640 (or at wind turbine terminals). The difference between an active power reference p* and an active power p is calculated by an active power difference calculating unit 642. The active power reference p* is generated by a DC link voltage controller unit 646 and supplied to the active power difference calculating unit 642. The DC link voltage controller unit 646 is itself driven by a difference between a DC link voltage reference Vdc* and the DC link voltage Vdc determined by a DC voltage difference calculating unit 648. The DC-link controller can be implemented in many different ways but the output of the controller is p*. The active power reference p* can be reduced under certain conditions e.g. grid support. This can be done through a modification block (not shown).
The reactive power volt-sec reference determining unit 622 determines reactive power volt-sec reference φxd* based on a difference between a reactive power reference q* and a reactive power q occurring at the input 608 of the grid transformer 640 (or at wind turbine terminals). The difference between a reactive power reference q* and a reactive power q is calculated by a reactive power difference calculating unit 644. The reactive power reference q* is mainly determined based on grid support requirements.
The outer control loop arrangement 612 comprises a current limiting unit 624 which causes the active power volt-sec reference φxq* and the reactive power volt-sec reference φxd* to be respectively frozen if the amplitude of the line current ig occurring at the input 608 of the grid transformer 640 exceeds a predetermined threshold value.
The outer control loop arrangement 612 further comprises a unit 626 comprising an active power determining subunit and a reactive power determining subunit which determine the active power p and reactive power q based on the line current ig and the line voltage ug occurring at the input 608 of the grid transformer 640, respectively. The unit 626 further comprises an amplitude determining subunit which determines the amplitude of the line current ig which is supplied to the current limiting unit 624.
The amplitude of the line current ig may for example be calculated based on the following equation:
|ig|√{square root over (igα2+igβ2)},
wherein igα is the α-component of the line current, and igβ is the β-component of the line current. However, the line current ig may also be calculated in a different manner.
The active power p may for example be calculated based on the following equation:
p=1.5*(vgα+igα++vgβ+igβ+),
wherein vgα+ is the positive sequence α-component of the line voltage ug, vgβ+ is the positive sequence β-component of the line voltage ug, igα+ is the positive sequence α-component of the line current ig, and vgβ+ is the positive sequence β-component of the line current ig. In general ‘+’ indicates the positive sequence component of the respective currents/voltages. The active power p may also be calculated in a different manner.
The reactive power q may for example be calculated based on the following equation:
q=1.5*(vgα+igβ+−vgβ+igα+),
wherein vgα+ is the positive sequence α-component of the line voltage ug, vgβ+ is the positive sequence β-component of the line voltage ug, igα+ is the positive sequence α-component of the line current ig, and vgβ+ is the positive sequence β-component of the line current ig. The reactive power q may also be calculated in a different manner.
In the above equations, it is shown above that only positive sequence voltages and currents are used to calculate active and reactive power. However, the embodiments of the present invention are not restricted thereto: it is also possible to use the negative sequence voltage and current to calculate the active and reactive power. Hence, either positive sequence or negative sequence or the combination can be used to calculate the active and reactive power.
The outer control loop arrangement 612 further comprises an αβ frame volt-sec vector generating unit 628 which generates a first volt-sec reference φx* as an αβ frame volt-sec vector in dependence on the active power volt-sec reference φxq* and the reactive power volt-sec reference φxd*.
The outer control loop arrangement 612 comprises a second volt-sec reference generating unit 630 which generates a second volt-sec reference φc* by adding a grid volt-sec φg to the first volt-sec reference φx*. The unit 626 further comprises a grid volt-sec determining subunit which determines the grid volt-sec φg based on at least one of the line current ig and the line voltage ug occurring at the input 608 of the grid transformer 640.
The grid volt-sec is for example determined based on the following equation:
φgβ∫ugdt
That is, the grid volt-sec φg may be obtained by integrating the measured converter voltage ug occurring at the input 608 of the grid transformer 640 over the time. However, the grid volt-sec φg may also be calculated in a different manner.
The outer control loop arrangement 612 comprises a converter volt-sec reference predicting unit 632 which predicts a next sampling cycle converter volt-sec φpc* based on the second volt-sec reference φc* and an angle difference Δθs. Δθs is calculated based on an angular velocity ωg of the line voltage ug occurring at the input 608 of the grid transformer 640 according to the equation Δθs=ωg*Ts, wherein Ts is the sampling period/cycle of the grid side converter 602. The volt-sec reference predicting unit 632 outputs the predicted converter volt-sec φpc* as converter volt-sec reference. The angular velocity ωg of the line voltage ug is determined by a PLL (Phase Locked Loop) unit 650.
The PLL unit 650 also determines, based on the line voltage ug occurring at the input 608 of the grid transformer 640, a grid angle γg+ which is the angle of the positive sequence voltage. The grid angle γg+ is used to transform the volt-sec reference from the dq frame representation (the active power volt-sec reference φxq* and the reactive power volt-sec reference φxd*) into the αβ frame representation. If the power control with negative sequence is desired as well, a grid angle γg− which is the angle of the negative sequence voltage can also be easily calculated and used to transform the negative sequence volt-sec reference from the dq frame representation (the respective negative sequence active power volt-sec reference φxq* and the reactive power volt-sec reference φxd*) into the αβ frame representation.
Use of the volt-sec reference predicting unit 632 leads to more accurate grid side converter response especially when the switching frequency is low; it also helps to obtain better dynamic response. However, it should be noted that the volt-sec reference predicting unit 632 is not absolutely necessary but its presence improve the performance.
In the following description, making reference to
The PLL unit 650 receives three phase voltages Ua, Ub, Uc extracted from the line voltage ug occurring at the input 608 of the grid transformer 640. The three phase voltages Ua, Ub, Uc are transformed into the αβ frame in order to obtain an α-axis component Uα of the line voltage ug, and a β-axis component Uβ of the line voltage ug using an abc/αβ transforming unit 800.
A first αβ/qd transforming unit 802 transforms the line voltage components Uα and Uβ into the dq frame using the voltage vector phase angle γg+, e.g. in accordance with
wherein ULD is the d-axis component of the positive sequence line voltage in the d/q frame, and ULQ is the q-axis component of the positive sequence line voltage in the d/q frame.
Further, a second αβ/qd transforming block 804 transforms the line voltage components Uα and Uβ into the dq frame using the negative voltage vector phase angle −γg+, e.g. in accordance with
where ULD_NEG is the d-axis component of the negative sequence line voltage in the d/q frame, and ULQ_NEG is the q-axis component of the negative sequence line voltage in the d/q frame.
The line voltage components ULD, ULQ are fed into a first half cycle moving average function unit 806, and the line voltage components ULD_NEG, ULQ_NEG are fed into a second half cycle moving average function unit 808. The half cycle moving average function units 806, 808 respectively process the input signals ULD, ULQ/ULD_NEG, ULQ_NEG according to the following equation
wherein y is the moving average of the respective input signal, x(t) is the input signal, T is the time of a sampling cycle, and t is the integration parameter (time). The half cycle moving average function unit 806 serves for cancelling negative sequence effects and harmonics effects.
In order to implement the half cycle moving average function units 806, 808, a buffer may respectively be used which holds data of a half cycle, wherein the output of the half cycle moving average function units 806, 808 is the average of the half cycle data stored within the buffer. The signal ULD_MA output by the half cycle moving average function unit 806 represents the d-axis component of the positive sequence line voltage of a half cycle moving average. The signal ULQ_MA output by the half cycle moving average function unit 806 represents the q-axis component of the positive sequence line voltage of a half cycle moving average. The signal ULD_MA_NEG output by the half cycle moving average function unit 808 represents the d-axis component of the negative sequence line voltage of a half cycle moving average. The signal ULQ_MA_NEG output by the half cycle moving average function unit 808 represents the q-axis component of the negative sequence line voltage of a half cycle moving average.
A normalization block 810 normalizes the signals ULD_MA and ULQ_MA. in accordance to
ULD
—
NOM=ULD
—
MA/√{square root over ((ULD—MA2+ULQ—MA2))},
ULQ
—
NOM=ULQ
—
MA/√{square root over ((ULD—MA2+ULQ—MA2))}
in order to generate the normalized output signals ULD_NOM and ULQ_NOM. The normalization process may be used to eliminate the influence of the voltage amplitude on the phase lock loop control. Thus, the PLL unit 650 has the same performance for different line voltages ug on different platforms.
The normalized output signals ULD_NOM and ULQ_NOM are fed into a mapping unit 812 which maps these signals to a function value of a function F which may be seen as function of the phase error Δθ between the actual voltage phase angle (i.e. the phase angle of the current line voltage as represented by ULD_NOM and ULQ_NOM) and the estimated voltage vector phase angle (i.e. the fed back estimate for the line voltage phase angle γg+) according to
F(Δθ)=tan(Δθ),−Δθ1<Δθ<Δθ1
F(Δθ)=tan(Δθ1)=ωLim,Δθ1<Δθ<π
F(Δθ)=tan(−Δθ1)=−ωLim,−π<Δθ<−Δθ1
where Δθ1 is a pre-defined threshold value. The phase error Δθ is for example determined according to tan(Δθ)=ULD_NOM/ULQ_NOM.
The function F is illustrated in
The output of the mapping unit 812 is compared to a reference value ULD_REF (d-axis reference value; it is normally zero if the voltage sensor delay is not considered) by a comparing unit 816, and a corresponding comparison result is fed into a PI controller unit 814.
An adding unit 818 adds to the output of the PI controller unit 814 the nominal voltage frequency (50/60 Hz) in order to obtain the estimated angular speed ωg of the voltage vector in the dq frame. The PI controller unit 814 changes (by acceleration or deceleration) the estimated angular speed ωg such that, in dependence on the phase error Δθ, the estimated phase angle γg+ (in the dq frame) meets up with the voltage vector angle.
An integrating unit 820 generates an estimated phase angle γg+ of the voltage vector by integration of the angular speed ωg in the dq frame.
In the above description of the PLL unit 650, the positive sequence voltage has been used in order to determine the estimated phase angle γg+ and the angular speed ωg. That is, the signals ULD_NOM and ULQ_NOM have been used to determine γg+ and ωg. However, it should be mentioned that, in order to determine γg+ and ωg, also the signals ULD_MA_NEG and ULQ_MA_NEG could be used. In other words, the estimated phase angle γg+ and the angular speed ωg can also be determined using negative sequence voltages.
In other words, according to an embodiment of the present invention, the working principle of the embodiment of
While embodiments of the invention have been particularly shown and described with reference to specific embodiments, it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. The scope of the invention is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced.
Number | Date | Country | Kind |
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PA 2010 70365 | Aug 2010 | DK | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/DK2011/050310 | 8/16/2011 | WO | 00 | 6/12/2013 |
Number | Date | Country | |
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61374646 | Aug 2010 | US |