Claims
- 1. A method of converting a pulse train of electrical signals having a frequency within a known frequency range into digital signals comprising the steps of
- deriving with a phase-locked loop the frequency of the pulse train of electrical signals and for producing therefrom clock pulses having a predetermined amplitude at a frequency which is preselected integer of the frequency of the electrical signal;
- deriving an analog input signal to be measured from the pulse train of electrical signals;
- receiving and counting clock pulses with a pulse scaling means for producing count enabling signals;
- detecting with a peak detecting means including a comparator having a pair of inputs and an output wherein one of the pair of inputs is adapted to receive the analog input signal and the other of said pair of inputs is adapted to have applied thereto an analog output signal voltage wherein the output of said comparator is operatively coupled to said pulse scaling means to enable said pulse scaling means;
- producing with a digital counting means responsive to the count enabling signals from said pulse scaling means by changing count direction for producing discrete digital output signals, said digital counting means including a latch registering means for storing the digital output signal when said digital counting means changes its count direction;
- applying the discrete digital output signals from the digital counting means to a digital-to-analog converter which converts the same into an analog output signal voltage and for applying the same to the other input of the comparator; and
- comparing with said comparator the analog input signal with the analog output signal voltage and for enabling the pulse scaling means which enables the digital counting means as long as the analog input signal is of a greater magnitude than the analog output signal voltage from the digital-to-analog converter, and when this condition is reversed, the digital counting means is reversed in counting direction and the binary value of the digital counting means at the time of the reversal in counting direction is stored in said latch registering means.
- 2. The method of claim 1 further comprising the step of
- applying the digital signals stored in the latch registering means as a digital output signal to a memory.
- 3. The method of claim 2 further comprising the step of
- processing the digital output signals with a computer processing unit for producing digital signals representing at least one of the amplitude, read-over-write ratio, signal-to-noise ratio, and average widths of the pulse train of the electrical signals.
Parent Case Info
This is a division of application Ser. No. 654,809 filed Sept. 26, 1984.
US Referenced Citations (2)
Number |
Name |
Date |
Kind |
4204260 |
Nysen |
May 1980 |
|
4560940 |
van der Schans |
Dec 1985 |
|
Divisions (1)
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Number |
Date |
Country |
Parent |
654809 |
Sep 1984 |
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