The present invention relates to a method of driving a display apparatus in which the gradation scale is represented by a subfield structure. More particularly, the present invention relates to a method of driving a display apparatus such as a plasma display in which each subfield has at least an address period and a light period.
Description is made below with an example of a plasma display (simply referred to as a PDP hereinafter). The present invention, however, is not limited to a PDP but applicable to any type of display apparatus as long as the gradation scale is represented by a subfield structure and each subfield has at least an address period and a light period.
Since information about a PDP has been disclosed in, for example, Japanese Unexamined Patent Publication (Kokai) No.7-271325, a detailed description is omitted here and only an outline of the structure and the driving method is given.
FIG.1 is a block diagram that shows a structure of a display apparatus that uses a three-electrode type PDP 101. Address electrodes A1 . . . , Am of the PDP 101 are connected to an address driver 105, respectively, and address pulses are applied in the address period by the address driver 105. Y electrodes Y1, Y2, . . . , Yn are connected to a Y scan driver 102, respectively. A Y common driver 103 is connected to the Y scan driver 102. The Y scan driver 102 applies generated address pulses to the Y electrodes sequentially in the address period, and in the sustain discharge period, applies the sustain pulses generated in the Y common driver 103 to the Y electrodes in common. X electrodes are connected in common to all the display lines of the panel and sustain pulses are applied in common in the sustain period by an X common driver 104. These driver circuits are controlled by a control circuit 106. The control circuit 106 comprises a display data control portion 107 and a panel drive control portion 109. The display data control portion 107 expands the display data supplied from the outside on a frame memory 108, converts it into the data for the subfield structure to represent the gradation scale of PDP, and outputs it to the address driver 105. The panel drive control portion 109 generates control signals using the vertical sync. signals (VSYNC) and the horizontal synch. signals (HSYNC) and applies them to each portion.
FIG.2 is a diagram that shows an example of drive waveforms of a PDP. These waveforms represent a subfield in the so-called “address/sustain period separated type-write address method.” In this example, a subfield comprises a reset period, an address period, and a sustain discharge period.
In the reset period, first, all the Y electrodes are set to 0 V level, and at the same time entire surface write pulses of Vs +Vw voltage are applied to the X electrodes, pulses of Vaw voltage are applied to the address electrodes and, thus, the reset discharge is caused to occur in all the cells regardless of the previous display conditions. Subsequently, the potential of the X electrodes and the address electrodes becomes 0 V, and discharge is caused to occur in all the cells because the voltage of the wall charges themselves exceeds the discharge start voltage. Because there is no difference in potential between electrodes, no wall charges are generated by these discharges, and the discharges end with the self-neutralization of space charges. This discharge is the so-called self-neutralization discharge. By this self-neutralization discharge, all the cells reach a uniform state without wall charges. This reset period acts so that all the cells reach an identical state regardless of the lighting conditions in the previous subfield, and contributes to the stable address discharge that follows.
In the next address period, address discharges are caused to occur line-sequentially in order to set each cell to a state in correspondence with the display data. First, scan pulses of —VY are applied to the Y electrodes and, in synchronization with this, address pulses of Va voltage are applied selectively to the address electrodes that correspond to the cells that will carry out sustain discharges, that is, those to be lit, in the address electrodes, then discharges are caused to occur between the address electrode and the Y electrode of the cell to be lit, and this serves as the priming (pilot) to cause discharge to occur immediately between the X electrode and the Y electrode. The former discharge is called “priming address discharge” and the latter, “main address discharge.” This causes the wall charges sufficient for the sustain discharge to accumulate on the X electrode and the Y electrode of the selected cell on the selected line.
Similar operations are carried out sequentially on the other display lines and the display data is written to the entire display lines.
In the next sustain discharge period, the sustain discharge pulses of Vs voltage (about 180 V) are applied to the X electrodes and the Y electrodes in turn to cause the sustain discharge to occur and the image display of a subfield is attained. In this “address/sustain period separated type-write address method,” the brightness of each subfield is determined by the number of sustain pulses to be applied in the sustain period, that is, the length of the sustain period.
The drive waveforms in FIG.2 are only examples, and there are various other methods. For example, there is a method in which a pulse that changes gradually is applied to decrease the light emission due to the reset discharge so that the display contrast is improved, or another method in which wall charges are left uniformly in the reset period and address discharge is caused to occur in the cell that is not lit in the address period, and so on.
In the display apparatus that uses a PDP, a frame is composed of plural subfields and the subfields to be lit are combined for each cell to represent the gradation scale. FIG.3 shows an example in which a frame is composed of the eight subfields SF1 through SF8. Each subfield comprises the reset period, the address period, and the sustain discharge period, respectively. There can be a case in which a difference appears in the total between the period of the display data supplied from the outside and that of all the subfields, and in such a case, a rest period is provided in the frame. For example, there are two methods for TV display, that is, the Vsync frequency can be 60 Hz or 50 Hz. If the plasma display apparatus is manufactured for 60 Hz and when the apparatus is used at 50 Hz, a rest period is provided to adjust the period of a frame. In this rest period, no display operation is performed and the length of the rest period is determined in accordance with the display data supplied from the outside. It may be a case where the length remains constant after being determined once, but there can be another case where the total number of pulses, that is, the sum of sustain pulses in all the cells in a frame, is controlled for power control, or another case where the number of the sustain pulses is adjusted in order to keep the brightness ratio among subfields constant regardless of the display load of each subfield, and so on, in other words, when the sustain period (light period) is varied, the length of the rest period is varied according to the display data. As described later, there may be a case where a reset period is not provided to some subfields to improve the display contrast or to abbreviate the reset period.
The brightness ratio among subfields is typically set to, for example, 1: 2: 4: 8: . . . , where each term is a power of 2, and this brightness ratio has advantages in that the largest number of levels of the gradation scale can be attained with a small number of subfields. For example, if there are four subfields, 16 levels of the gradation scale from 0 through 15 are available, if there are six subfields, 64 levels of the gradation scale from 0 through 63, and if there are eight subfields, 256 levels, from 0 through 255, are available.
When the gradation scale is attained by the subfield method in a display apparatus of “address/sustain period separated type-write address method”, the sustain periods where light emission takes place are separate from each other because an address period exists in each subfield, and a problem of the degradation of display quality such as flicker and color false contour is caused depending on the displayed image, because the lengths of the sustain periods are not equal. In Japanese Unexamined Patent Publication (Kokai) No.3-145691, an art to suppress flicker has been disclosed, in which the most brightness-weighted subfield is arranged in the center and other subfields are arranged on both sides in order of brightness weight in the subfield structure of a frame, with the above-mentioned brightness ratio, each term of which is set to a power of 2. This art, however, cannot provide a sufficient quality of display.
Therefore, the present applicants have disclosed a driving method in which the disturbance of halftones is suppressed by providing plural subfields having a similar brightness and by combining the subfields to be lit adequately according to the level of the gradation scale.
Generally, it is known that it is a characteristic of human eyes to detect flicker with a frequency lower than 60 Hz. In the NTSC method, the Vsync frequency is 60 Hz, but it is 50 Hz in the PAL/SECAM methods employed in Europe, and so on. In a plasma display, images with a high quality are required even in operations with a frequency of 50 Hz. It was found that flicker is not a problem when the arts disclosed in the above-mentioned Japanese Unexamined Patent Publication (Kokai) No. 3-145691 and Japanese Unexamined Patent Publication (Kokai) No. 7-271325 are applied to the plasma display apparatus using the NTSC method to improve the quality of image, but in the case of the plasma display apparatus using the PAL method, flicker remains a problem even when the above-mentioned arts are applied. These phenomena are described with reference to
FIG.5 shows the resulting graph of the frequency analysis of the variation of the light emission intensity in the frame structure in
As described above, the plasma display apparatus that operates at a frequency of 50 Hz generates a strong flicker and thus a problem in the image quality occurs.
Moreover, as shown in
Among various items that relate to the image quality, the above-mentioned flicker and the degradation of the contour in animation are problems relating to the subfield method. The problem of the degradation of the contour in animation, for example, results in the color false contour, in which the contour of a moving part is colored, when animation is shown on the color display apparatus. The art disclosed in Japanese Unexamined Patent Publication No.7-271325 suppresses the occurrence of color false contour, but if a plasma display apparatus to which this art is applied is driven at a frequency of 50 Hz, the problem of flicker occurs. It is thus found impossible to improve every item relating to the image quality with a limited number of subfields.
The present invention will solve the above-mentioned problems and the first object is to realize a driving method with less flicker even when the apparatus is driven at a frequency of 50 Hz and the second object is to realize a driving method employing the subfield method that improves many items relating to the image quality.
As shown in
It is recommended that the next two most brightness-weighted subfields (subfields that have the brightness Bn−2 and Bn−3 among n subfields) are also arranged at an interval of about half the length of a frame so that the two subfields are positioned almost at the midpoint between the most brightness-weighted subfields, respectively.
If there are no subfields with the same weight in pairs, it is impossible to arrange the two most weighted subfields at the interval of half the length of the frame. Moreover, if the rest period exists and is continuous as conventionally, it is also impossible to arrange the two most weighted subfields at the interval of half the length of the frame. Even if the interval is not half the length of the frame exactly, however, flicker can be suppressed if the interval is approximately half the length of the frame.
FIG.8 shows the resulting graph of the frequency analysis of the variation of the light emission intensity when a total of ten subfields, that is, subfields of 24, 16, 8, and 4 brightness weight in pairs, respectively, and subfields of 2 and 1 brightness weight each, respectively, are provided similarly as in the frame structure in
In the method of driving a display apparatus in the second aspect of the present invention, the rest period is divided into plural rest periods and the divided periods are arranged between plural different subfields. According to the second aspect of the present invention, when the rest period occurs, it is divided into plural periods and arranged in different positions between subfields, therefore, flicker does not increase if the rest period is provided or the rest period is lengthened because the changes in position of the light emission period of each subfield are small and the increase of the component of a low frequency of the variation of the light emission intensity can be reduced.
In order not to change the position of the light emission period of each subfield, it is preferable to divide the rest period so that the number of the divided rest periods is equal to that of the subfields and to provide each subfield with a divided rest period.
Moreover, if a frame is divided into two subframes, that is, a front frame and a rear frame, and one of the two most brightness-weighted subfields is provided in the front frame and the other subfield in the rear frame, and the interval of the start timings of the front frame and the rear frame is fixed, the interval of the two most brightness-weighted subfields is maintained at about half the length of the frame. In this case, it is preferable to provide the two most brightness-weighted subfields at the beginning of the front and the rear frames, respectively.
In the method of driving a display apparatus in the third aspect of the present invention in which the brightness of each subfield is determined by the number of applied pulses to be lit in the light period, the brightness of each subfield is determined by the number of pulses to be lit in the light period and the original clock frequency is varied to generate the execute signal at least either in the address period or the light period when the total number of pulses to be lit in a frame is varied.
According to the third aspect of the present invention, since the original clock frequency is varied, it is possible to vary the number of pulses to be lit without changing the address period and the light period of each subfield and to maintain the relation among the light periods of each subfield constant.
It is preferable to vary only the original clock frequency of the light period to vary only the frequency of the pulse to be lit applied in the light period, when the original clock frequency is varied.
In the method of driving a display apparatus in the fourth aspect of the present invention, plural arrangement orders of plural subfields in a frame are stored in memory according to the types of still image, animations, and so on, and an arrangement order of subfields selected from among the plural arrangement orders stored according to the determined type of the image is used for display.
As described above, it is impossible to improve every item relating to the image quality with a limited number of subfields. According to the fourth aspect of the present invention, images of high quality can be displayed constantly, since the most appropriate arrangement order of subfields is used according to the type of the image.
The present invention will be more clearly understood from the description as set below, with the reference to the accompanying drawings, wherein:
FIG.1 is a diagram that shows the structure of the drive circuit of the plasma display apparatus (PDP apparatus).
FIG.2 is a time chart that shows the drive waveforms of the plasma display apparatus (PDP apparatus).
FIG.3 is a time chart of the address/sustain discharge separated type-address method for the gradation scales in the plasma display apparatus (PDP apparatus).
FIG.5 is a diagram that shows the frequency component of the light emission in the frame structure in
FIG.8 is a diagram that shows the frequency component of the light emission of the present invention.
FIG.10 is a diagram that shows the frequency component of the light emission in the first embodiment.
FIG.16 is a diagram that shows the structure of the panel drive control portion in the sixth embodiment.
FIG.17 is a diagram that describes the variation in frequency of the sustain pulse period in the sixth embodiment.
FIG.18 is a diagram that shows the structure of the control circuit in the seventh embodiment of the present invention.
FIG.19 is a flow chart that shows the control sequence in the seventh embodiment.
As shown in
FIG.10 shows the result of the frequency analysis of the variation of the light emission intensity in the frame structure in the first embodiment and it is found that the component of 50 Hz is lower than that of 0 Hz, as low as the 100 Hz level.
In the frame structure in the third embodiment, a total of 10 subfields, that is, subfields of 24, 16, 8, and 4 brightness weight in pairs, respectively, and subfields of 2 and 1 brightness weight each, respectively, are provided and after subfields of 24, 8, 4, 16, 1, and 2 brightness weight are arranged in this order, the first rest period is provided, and then subfields of 24, 8, 4, and 16 brightness weight are arranged in this order and finally, the second rest period is provided. In other words, the rest period is divided into two and arranged between subfields apart from each other. The two subfields of 24 brightness weight are arranged after the rest period (before the previous subfield of 24 brightness weight, there exists the rest period of the previous frame), and when the length of the rest period varies, the lengths of the first and the second rest periods are varied so that the positions of the sustain periods of the two subfields of 24 brightness weight do not change.
Therefore, the results of the frequency analysis of the variation of the light emission intensity in the frame structure in the third embodiment are almost the same as those in the first embodiment as shown in
Therefore, the results of the frequency analysis of the variation of the light emission intensity in the frame structure in the third embodiment are almost the same as those in the first embodiment as shown in
Therefore, the results of the frequency analysis of the variation of the light emission intensity in the frame structure in the fifth embodiment are almost the same as those in the first embodiment as shown in
Therefore, the results of the frequency analysis of the variation of the light emission intensity in the frame structure in the sixth embodiment are almost the same as those in the first embodiment as shown in
In order to realize the driving method in the sixth embodiment, the panel drive control portion 109 in the drive circuit of the PDP apparatus in
The period of the clock thus generated determines the basic period of the control signal output of the scan driver control portion 110 and the common driver control portion 111, and the output period of the Y scan driver control signal and the X/Y common driver control signal is varied by varying the clock period.
FIG.17 is a diagram that describes the variation of the sustain pulse period in the sixth embodiment, and also shows a case where the period of the clock signal in the sustain period is multiplied by a factor 3. In order to reduce the number of sustain pulses to one third, the period of the clock signal in the sustain period is trebled. In accordance with this, the execute time required to generate the sustain pulses to be applied to the X electrodes and the Y electrodes is also trebled and the period of the sustain pulse is trebled. The length of the sustain period, however, is the same therefore the number of sustain pulses generated in the sustain period is reduced to one third. It is possible in this way to vary the number of sustain pulses while keeping the length of the sustain period constant. Therefore, the position of the sustain period of each subfield does not change even when the number of sustain pulses is varied, the way the light emission intensity varies in a frame is constant, and only the absolute value varies.
FIG.18 is a block diagram that shows the structure of the control circuit to carry out the method of driving the plasma display apparatus in the seventh embodiment of the present invention. In the seventh embodiment, a movement detect portion 130 is provided in the control circuit 106 in the drive circuit of the PDP apparatus in
In the case of the still images, the display data varies slightly between the previous frame and the next frame, but it varies considerably in the case of non-still images such as animation. Therefore, the images are judged as still images when the difference is small and non-sill images when the difference is large, and the judgment result is put out to the panel drive control portion 109 as detect signals.
FIG.19 is a flow chart that shows the frame structure control sequence in the panel drive control portion 109. In step 201, whether the images are still images or not is judged from the detect signals. When judged as still images, the frame structure for the still images is set in step 202. The frame structure for still images has, for example, the frame structure in the first embodiment as shown in
As described previously, it is impossible to improve every item relating to the image quality with a limited number of subfields, but it is possible to display images of good quality constantly in the seventh embodiment because a proper frame structure is employed according to the types of images to be displayed.
As described above, according to the present invention, the occurrence of flicker can be suppressed even when the plasma display apparatus of the subfield method is driven at a frequency of 50 Hz. Moreover, when the number of sustain pulses is varied because of the power control, and so on, the quality of image is not degraded because the position of the sustain period, that is, the light emission period, of each subfield does not change. Furthermore, it is possible to display images of good quality constantly regardless of the image types.
Number | Date | Country | Kind |
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2001-17471 | Jan 2001 | JP | national |
This application is a Continuation Application of and claims parent benefit under 35 U.S.C. §120 to application Ser. No. 09/985,780, filed Nov. 6, 2001, now pending, and claims priority benefit of Japanese Application No. 2001-17471, filed Jan. 25, 2001.
Number | Date | Country | |
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Parent | 09985780 | Nov 2001 | US |
Child | 11504636 | Aug 2006 | US |