The present invention relates to a method of driving a panel display and a drive for carrying out the method, and in particular, to a method of driving an organic EL panel, and a drive for carrying out the method.
As shown in
In common operation to cause the organic EL panel to emit light for displaying, the switching means SWcn of the respective scanning lines COMn is turned ON (connected to a grounding potential VG) and OFF (connected to the cathodic power supply potential VC) in such a manner as to have operation waveforms shown in
Since emitted light luminance of the organic EL element PEm,n is dependent on a current value, values of current supplied to the respective data lines SEGm are required to be constant values equal to each other in order to avoid display unevenness.
In order to obtain a constant current, it is desirable that the driving circuit is under small effects of its dependency on an output voltage of the constant current source, a power supply voltage, manufacturing variations in constituent elements thereof, or so on.
A common structure of the organic EL element is as shown in
However, when causing all the elements in panel rows to emit light, a large current of several tens of mA flows in the direction of the grounding potential VG in the scanning lines COMn via the switching means SWc1-SWcn.
Even in the case of the scanning lines COMn using a resistance material such as an Al cathodic wiring, there flows a large current corresponding to the panel element connected thereto and a current value necessary for light emission, so that a voltage applied to the panel element PEm,n positioned at a more distal end in relation to the grounding potential VG becomes very high.
Assuming that resistance of the scanning lines COMn is Rm,n, a current flowing through the resistance is Icm,n, ON resistance of the switching means SWcn is SWrn, and a voltage applied to the organic EL element PEm,n when all the panel elements emit light is Vm,n as shown in
Vm,n=VC+SWrn*Ic1,n+R1,n*Ic1,n+R2,n*Ic2,n+ . . . +Rm,n*Icm,n
Herein, assuming that light-emitting display panel rows are 128 rows, resistance between the panel elements is Rm,n=r (Ω), and a current supplied to respective data lines SEGm is Im=i (A), the following equation results:
That is, there occurs a potential as high as 8256 ri (V) owing to the resistance component of the scanning lines COMn.
Thus, since the farther from the grounding potential VG the EL element PEm,n is positioned at a distal end, the smaller a potential difference ΔV11 applied to the respective constant current sources 11 becomes, there have been cases where it becomes impossible to supply a constant current, depending on conditions such as dependency of the respective constant current sources 11 on output voltage, a constant current value, and a drive power supply voltage Vs.
Further, there is a tendency of an increase in the number of bits of a driver IC following an increase in the size of a panel screen, and such an increase in the number of the bits poses a problem in that not only deterioration in display unevenness, due to manufacturing variations, is brought about but also constant current characteristic dependent on resistance on the panel described above becomes susceptible to occurrence of faults.
The invention has been developed to resolve the problems encountered in the past, and it is an object of the invention to provide a method of driving a display panel, capable of preventing light emission faults from occurring to a panel by implementing stable supply of a constant current, and a drive for carrying out the method.
The invention provides in its first aspect a method of driving a display panel made up of (n×m) pieces of display elements each disposed at respective crossover points of a matrix, formed of n rows of scanning lines and m columns of data lines, wherein a current value of respective variable current sources for driving the respective data lines is controlled by comparing a potential of the respective data lines with a reference potential and based on results of such comparison.
Further, in accordance with a second aspect of the invention, there is provided a drive of a display panel comprising means for assuming during a display period of present display data a current correction value for each of the data lines in a succeeding display period on the basis a position of the date line, the number of the display elements, and a fixed value determined by the position of the date line, and current correction means for correcting a current value of the respective variable current sources on the basis of results of such assumption.
Embodiments of the invention are described in detail hereinafter with reference to the accompanying drawings.
Operation of the circuit of a configuration as described above is described hereinafter. Normal operation to cause the panel to emit light for displaying is executed by turning switching means SWcn of respective scanning lines COMn ON (connected to a grounding potential VG) and OFF (connected to a cathodic power supply potential VC) in such a manner as to have operation waveforms shown in
At this time, a current at as large as several ten mA flows through the respective scanning lines COMn in the direction of the grounding potential VG via the switching means SWcn1-SWcn, respectively. Accordingly, a voltage applied to the panel element PEm,n disposed at a distal end from the grounding potential VG becomes very high.
Assuming that resistance of the scanning line COMn is Rm,n, a current flowing through the resistance is Icm,n, ON resistance of the switching means SWcn is SWrn, ON resistance of the switching means SWsm is SWrm and a voltage applied to the organic EL element PEm,n when the panel in whole emits light is Vm,n, the following equation results:
Vm,n=VC+SWrn*Ic1,n+R1,n*Ic1,n+R2,n*Ic2,n+ . . . +Rm,n*Icm,n+SWrm*Icm,n
so that when the applied voltage Vm,n of the respective data lines SEGm becomes higher than an output voltage of the voltage regulator 13, a decrease in current is detected by the respective comparators 14m made up of the differential amplifier, thereby increasing current of the respective variable current sources by the agency of the respective current control circuits 15m.
Further, when an excessive increase in current causes the voltage to drop, and Vm,n becomes lower than the output voltage of the voltage regulator 13, an increase in current is detected by the respective comparators 14m, thereby decreasing the current of the respective variable current sources by the agency of the respective current control circuits 15m.
The current control circuit 15m comprises an NMOS transistor switch 15ms, an NMOS resistance 15mn with the gate thereof connected to the data line voltage Vm,n in common with the gate of a PMOS resistance 15mp, and other resistances, and an output 15mout of the current control circuit 15m is set such that when the switch 15ms is ON, the transistor 12Sm can supply necessary current corresponding to the data line voltage Vm,n (A resistance ratio of the current control circuit 15m is set such that the transistor 12Sm for current adjustment operates in a liner region when it is within a range of the voltage Vm,n, requiring current adjustment. The output 15mout is changed by the NMOS resistance 15mn and PMOS resistance 15mp changing respective resistance values correspondingly to the voltage Vm,n, thereby adjusting a current value of the PMOS transistor 12Sm).
When the voltage Vm,n of the data line SEGm becomes higher than an output voltage 13 out of the voltage regulator 13 (that is, when a voltage between the source and drain of the PMOS transistor 12Mm becomes lower, resulting in a decrease of current), the decrease of current is detected by the comparator 14m made up of the differential amplifier. The comparator 14m turns ON the NMOS transistor switch 15ms of the current control circuit 15m, whereupon a current 115m flows in the current control circuit 15m, and the output voltage 15mout of the current control circuit 15m becomes lower, so that the PMOS transistor 12Sm of the variable current source 12 is turned into ON state, thereby increasing the current of the variable current source 12.
Thus, since the current can be increased or decreased by detecting variation in current, due to insufficiency in potential applied to the current source, the present embodiment is effective for reducing light emission faults of the panel.
Operation of the circuit of the drive in
Display data in a display period between time t4 and t5 are normally transferred in a period between time t2 and t3 and are latched before stored in a register, and the light-emitting bit number detection circuit 16 detects the number d of display elements in a subsequent display period from the display data. The respective VO detection circuits 17m assume and detect a voltage generated depending on panel resistance for each of the data lines on the basis of the display data.
Assuming that, for example, in case all m bits emit light (d=m) as shown in
Similarly, the following equations result:
V2,1=V1,1+R2,1*(m−1)*I.
V3,1=V2,1+R3,1*(m−2)*I.
V4,1=V3,1+R4,1*(m−3)*I
V5,1=V4,1+R5,1*(m−4)*I
Assuming that resistance Rm,n between the respective data lines is all identical, the following equation results:
V1,1=α*m(α is a constant).
Similarly, the following equations result:
V2,1=α*(2m−1)
V3,1=α*(3m−3)
V4,1=α*(4m−6)
V5,1=α*(5m−10)
Accordingly, only a value A found from Vm,n=α*A is sufficient for detection by the respective VO detection circuits 17m.
If the value A of any of the data line SEGm becomes higher than a level value B (the value B is a value pre-calculated from the voltage ΔV12 applied to the respective variable current sources 12, a panel resistance value, and the dependency on the constant current value) set in the current correction circuit 18m, the current is increased by +10 μA by the agency of the current correction circuit 18m. Further, if the value A of the data line SEGm becomes higher than a level value C set in the current correction circuit 18m, the current is further increased by +10 μA (20 μA in total) by the agency of the current correction circuit 18m.
Thus, current correction to be made for a succeeding display period is determined during a preceding display period, thereby enabling a current as desired to be applied immediately upon start of a display period.
The current correction circuit 18m comprises a plurality of digital comparators 18mdc1, 18mdc2 . . . , thereby presetting correction levels B, C, . . . , respectively. Respective outputs of the digital comparators control switching circuits 18SW1, 18SW2, . . . , respectively, thereby changing over respective voltages of the PMOS transistors 12Sm1, 12Sm2 of the variable current source 12 between a power supply voltage Vs and an output voltage of a constant voltage regulator 18mvr. The constant voltage regulator 18mvr outputs the voltage for controlling the PMOS transistors 12Sm1, 12Sm2, respectively. This control voltage is set so as to enable, for example, the PMOS transistor 12Sm1 to allow a current of 10 μA to flow therethrough.
The VO detection circuits 17m each are provided with an adder-subtractor, executing binary calculation. If a display position corresponds to an m-th bit from the side of the switching means SWcn1-SWcn, the following calculation is made based on the number d (binary number) of bits, as detected by the light-emitting bit number detection circuit 16:
A=m*d−β(β is a fixed value determined by m)
If, for example, a value A of any of the data lines SEGm becomes larger than the level value B as set in the current correction circuit 18m (that is, it is determined that the voltage Vm,n of the data line SEGm as calculated from the number of the light-emitting elements causes the constant current to decrease), the switching circuit 18SW1 is changed over by the comparator 18mdc1, and the constant voltage regulator 18mVR operates such that the output voltage thereof controls the gate of the PMOS transistors 12Sm1, thereby outputting the constant current.
If the value A of the data line SEGm becomes larger than the level value C as set in the current correction circuit 18m (that is, it is determined that the voltage Vm,n of the data line SEGm calculated from the number of the light-emitting elements causes the constant current to further decrease), the switching circuit 18SW2 is changed over by the comparator 18mdc2, and the constant voltage regulator 18mvr operates such that the output voltage thereof controls the gate of the PMOS transistors 12Sm2, and a current is further added to the current described above, thereby outputting the constant current.
Thus, since current can be increased by pre-assuming a decrease in current, due to the panel resistance, and detecting the same, it is possible to implement not only stable supply of current during the display period, but also fine adjustment of the current, so that the present embodiment is more effective for reducing light emission faults of the panel.
Number | Date | Country | Kind |
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2003-106985 | Apr 2003 | JP | national |
Number | Name | Date | Kind |
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6545652 | Tsuji | Apr 2003 | B1 |
6617801 | Ishizuka et al. | Sep 2003 | B2 |
6922182 | Sase | Jul 2005 | B2 |
Number | Date | Country |
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09-292858 | Nov 1997 | JP |
2000-187467 | Jul 2000 | JP |
2001-042828 | Feb 2001 | JP |
Number | Date | Country | |
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20040201554 A1 | Oct 2004 | US |