1. Field of the Invention
The present invention relates to a method of driving an active matrix liquid crystal display device of in-plane switching mode.
2. Related Background Art
Conventional liquid crystal display devices undesirably produce image sticking, in which, when leaving an unchanging image on a screen for a long period of time, a faint remnant of the image remains even after a new image has replaced it. A driving method used to overcome this problem is offset correction to correct the grayscale dependence of voltage drop induced by a gate signal. Another driving method for reducing the image sticking and eliminating flicker in a twisted nematic (TN) liquid crystal display device is as follows. In a grayscale where a source signal has a large amplitude, the voltage of a common signal and the center voltage of the source signal are set to such values as to compensate the voltage drop inducted by a gate signal. In a grayscale where the source signal has a small amplitude, on the other hand, the center voltage of the source signal is set to a value higher than the above center voltage of the source signal for compensating the voltage drop induced by the gate signal. This method is disclosed in Japanese Unexamined Patent Application Publication No. 2001-337310, pp. 2–5, and illustrated in FIG. 8–9, for example.
However, if the driving method described in the above application is applied to a liquid crystal cell of in-plane switching (IPS) mode, it is unable to prevent the image sticking. The liquid crystal cell of the IPS mode has electrodes parallel to each other, which is different from that of the TN mode having electrodes opposite to each other, and a residual DC voltage is more likely to be retained in the IPS mode than in the TN mode, causing the image sticking.
In view of the foregoing, it is an object of the present invention to provide a method of driving a liquid crystal display device capable of reducing image sticking in a liquid crystal display device of IPS mode, not by a conventional offset correction of setting an optimum value of Vcom for preventing unequal DC components between a pixel electrode voltage and a common electrode voltage, but by setting an offset value for preventing residual vertical DC voltages and image sticking.
To these ends, according to one aspect of the present invention, there is provided a method of driving a liquid crystal display device of in-plane-switching (IPS) mode for applying an electric field substantially parallel to a substrate surface, having a pair of substrates, a liquid crystal layer placed between the pair of substrates, a plurality of gate lines placed above one of the pair of substrates, a plurality of source lines placed to cross the gate lines with an insulative layer interposed therebetween, a switching element placed in a near proximity to a crossing point of the gate lines and the source lines, and a pixel electrode connected to the source lines through the switching element, to which a signal voltage required for image display is supplied by the source line through the switching element, the method including a step of setting an average value of the signal voltage in such a way that an average value of a positive polarity voltage and a negative polarity voltage of the pixel electrode varies with a grayscale to be displayed, and a step of inputting the average value of the signal voltage to the pixel electrode. This method is capable of minimizing image sticking in IPS liquid crystal display devices.
In the above method, the average value of the signal voltage may be an average of two values of grayscale reference voltages input to a source line drive circuit for generating the signal voltage from an external unit.
According to another aspect of the present invention, there is provided a liquid crystal display device of in-plane-switching (IPS) mode for applying an electric field substantially parallel to a substrate surface, including a pair of substrates, a liquid crystal layer placed between the pair of substrates, a plurality of gate lines placed above one of the pair of substrates, a plurality of source lines placed to cross the gate lines with an insulative layer interposed therebetween, a switching element placed in a near proximity to a crossing point of the gate lines and the source lines, and a pixel electrode connected to the source lines through the switching element, to which a signal voltage required for image display is supplied by the source line through the switching element, wherein an average value of the signal voltage supplied by the source line is set in such a way that an average value of a positive polarity voltage and a negative polarity voltage of the pixel electrode varies with a grayscale to be displayed. This IPS liquid crystal display device is capable of minimizing image sticking.
In the above liquid crystal display device of in-plane-switching mode, the average value of the signal voltage may be an average of two values of grayscale reference voltages input to a source line drive circuit for generating the signal voltage from an external unit.
The above and other objects, features and advantages of the present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus are not to be considered as limiting the present invention.
A transmissive liquid crystal display device applies an electric field to liquid crystal filled between two substrates and controls the alignment of liquid crystal molecules according to the strength of the electric field, thereby adjusting the amount of light passing through the substrate to produce an image with a desired brightness. In an active matrix liquid crystal display device with a switching element comprising a thin film transistor (TFT) and so on, in-plane switching (IPS) mode that applies an electric field parallel to a substrate to liquid crystal is used as a technique to obtain an extremely wide viewing angle. The IPS mode operation can minimize viewing-angle-based grayscale inversion and deterioration in contrast ratio.
Referring first to
The TFT array susbtrate 100 has a plurality of gate lines 1 placed on an insulative substrate 101, an insulative layer 2 placed over the gate lines, a source line 3 placed to cross the plurality of gate lines 1, and an insulative layer 4 placed over the source line 3. The gate lines 1 and the source line 3 are connected to a switching element such as TFT placed at their crossing point. A V-shaped comb-type pixel electrode 6 consisting of a plurality of electrodes placed parallel to the source line 3 is connected to the switching element 5. A V-shaped comb-type common electrode 7 also consists of a plurality of electrodes, placed parallel to and alternating with the plurality of electrodes of the pixel electrode 6. The pixel electrode 6 is formed by a metal such as chromium (Cr), aluminum (Al), and molybdenum (Mo), or a transparent conductive film such as Indium Tin Oxide (ITO). A storage capacitor line 8, formed by a metal such as chromium (Cr), aluminum (Al), and molybdenum (Mo), is connected to the common electrode 7 through a through-hole. The TFT array substrate 100 and the color filter substrate 200 are placed face to face and a liquid crystal layer 9 is interposed between, which makes up a liquid crystal panel 10. Further, a backlight and other components are set to the liquid crystal panel 10, thereby producing a liquid crystal display device. A voltage is applied to the liquid crystal layer 9 between the pixel electrode 6 and the common electrode 7, and an electric field substantially parallel to the substrate is thus applied to the liquid crystal layer 9.
In a standard liquid crystal display device of the IPS mode, an active area of the liquid crystal is surrounded by lamination of dielectric films, such as an alignment layer (PI) 61, an protective layer (OC) 62, a color material of a color filter (CF) 63, a glass material of an insulative substrate 101, and so on, as shown in
Referring then to
The circuit shown in
The operation of a voltage of pixel electrode (hereinafter as a pixel voltage 31) will be explained hereinafter with reference to
If a positive pulse with a higher voltage than a threshold voltage of the switching element 5 is applied to the gate electrode 21, the switching element 5 turns on, that is, it turns to a high level, in which a source electrode 22 and the drain electrode 23 have electrical continuity. The signal voltage 32 on the source line 3 is thereby sent to the pixel electrode 6. The signal voltage 32 is an alternating voltage with the center voltage of Vso and the amplitude of Vsa. The amplitude Vsa is in accordance with the grayscale to be displayed. The pixel voltage 31 rises in synchronization with the gate voltage 33, as shown in
A voltage drop ΔVgd of the pixel voltage 31 due to the feedthrough is expressed by:
ΔVgd=ΔVg×Cgd/(Clc+Cgd+Cst) Formula 1
where ΔVg is a change in the gate voltage.
After the pixel voltage 31 is kept at a constant value for one frame period, in the second frame period, upon the gate voltage 33 turning again to the high level, the pixel voltage 31 turns to a level of the signal voltage 32 with reverse polarity to the previous (first) frame period. Then, in synchronization with the gate voltage 33 turning back to the low level, the pixel voltage 31 drops as in the first frame period, and further drops by ΔVgd due to the feedthrough.
Of the elements of Formula 1, Clc is dependent on the signal voltage (grayscale voltage). The value of the capacitance Clc with the liquid crystal thus varies according to the grayscale of image applied to the liquid crystal. Cst and Cgd have little voltage dependence.
Referring now to
A method of setting Vso will be explained below. Referring to
Now, a unit of generating 256 levels of the signal voltages 32 will be explained below. Referring to
For example, 15 divided resistors 43 are connected between the input terminal 41 with the first grayscale reference voltage (Vref0) and the input terminal 41 with the second grayscale reference voltage (Vref1). From output terminals 45 placed at each connection of the divided resistors 43, 15 signal voltages of different levels, which are, the signal voltages indicating the first screen voltage (Vs0), the second screen voltage (Vs1) to the sixteenth screen voltage (Vs15), divided by the 15 divided resistors are respectively output. With the signal voltages between all Vref, it is able to generate 256×2 levels of signal voltages; 256 levels at the positive polarity side and 256 levels at the negative polarity side. A given voltage is selected from those signal voltages in a selection circuit 46 and output to the liquid crystal panel 10 through the output terminal 44.
Table 1 shows the grayscale reference voltage Vref input to the source line drive circuit 11, and the amplification Vsa and the center voltage Vso of the signal voltage 32 output from the source line drive voltage 11 according to this embodiment. For example, in the case of the grayscale of 255, the center voltage Vso of the signal voltage 32 input to the source line drive circuit 11 is 7.435V, which is the average of the grayscale reference voltages Vref0=14.670V and Vref15=0.200V. In the grayscale of 0, Vso is 7.355V, the average of Vref7=7.985V and Vref8=6.725V. These set values are determined by a test of examining the degree of image sticking with varying Vref. The set values may be adjusted according to the specifications of the liquid crystal display device. This method can prevent DC component from remaining in the dielectric lamination films, thereby minimizing the image sticking.
This embodiment shows a case where the difference (Vso255−Vso127) between Vso at the grayscale of 255 (Vso255) and Vso at the grayscale of 127 (Vso127) is 480 mV, and the difference (Vso0−Vso127) between the Vso at the grayscale of 0 (Vso0) and Vso127 is 400 mV. In other cases, however, either or both of these values can be substantially 0 mV or negative. These values may vary with the combination or the interface state of the alignment layer 61, the protective layer 62, and the material of the color filter 63.
In the liquid crystal display device according to this embodiment, as in standard liquid crystal display devices, adjustment of Vcom is performed with an intermediate grayscale image at the grayscale of 127, which is the intermediate value between the grayscales of 0 and 255. If the liquid crystal display device uses a dot-inversion driving method and so on, it displays a checkered pattern, for example, and adjusts the value of Vcom in such a way that the pixel area with minimum flicker has an optimum Vcom. Hence, though substantially no flicker occurs at the grayscale of 127, flicker is likely to occur at the other grayscales since their Vcom values are off the optimum Vcom value. The flicker of images can be prevented by dot-inversion driving that reverses the polarity from pixel to pixel as shown in
As described above, the present invention provides a method of driving a liquid crystal display device capable of minimizing image sticking in an IPS liquid crystal display device by setting an average value of the signal voltages in such a way that an average value of a positive polarity voltage and a negative polarity voltage of the signal voltages supplied to the pixel electrode varies with grayscale.
From the invention thus described, it will be obvious that the embodiments of the invention may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are intended for inclusion within the scope of the following claims.
Number | Date | Country | Kind |
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2003-098579 | Apr 2003 | JP | national |
Number | Date | Country |
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11-282431 | Oct 1999 | JP |
2001-337310 | Dec 2001 | JP |
Number | Date | Country | |
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20040196243 A1 | Oct 2004 | US |