The present invention relates generally to the field of microprocessors, and more particularly but not exclusively to caching within and in relation to microprocessors and activities of microprocessors.
Reliance on software-based data systems is increasing every year both as data becomes more important and as languages provide more options for obtaining additional value from the data and systems. Timely access to data in the data systems therefore is of critical importance. Caching is a widely understood method of providing a short-term storage location for quick data access in data systems.
A cache is typically used to speed up certain computer operations by temporarily placing data, links, or a temporary copy of predetermined data, in a specific location where it may be readily accessed more rapidly than in a normal storage location such as a hard disk for instance. A cache is also understood to be a block of memory for temporary storage of data likely to be used again. For example, specific data in a data system that is stored on a storage disk operational with the data system, may be cached temporarily in high-speed memory so that it may be identified and accessed (i.e., read and written) more quickly than if the same data were to need to be obtained directly from the storage disk itself. In another example, a processing device (i.e., microprocessor) may use an on-board memory cache or localized memory cache to store temporary data specific for use during certain processing operations. While different cache clients of a data system routinely access and use cache, such as but not limited to microprocessors, central processing unit (CPU), operating systems, and hard drives, other technologies also access cache functions such as web-based technologies including web browsers and web servers for instance. These types of accessing, using and processing elements, which are coupled or in communication with a cache memory, are collectively referred to herein as cache client(s).
Operationally, cache memory is readily and quickly accessible by the microprocessor of a data system (i.e., computer, computer system, and similar devices controlled by one or more microprocessors) based upon instructions from operations of the system. When a cache client seeks to locate or access data stored in the data system, the cache client communicates with the cache to determine if the data sought is available in the cache and whether there is an associated data tag. If the sought data and its proper data tag are identified in the cache, a “cache hit” has occurred and the datum (or data) in the cache is used. If the sought data and its proper data tag are not identified in the cache, a “cache miss” has occurred and the other non-cache storage locations are searched for the specific data and data tag. Once the sought data is found after a cache miss, the found data is usually inserted in the cache and is then available for a subsequent request more timely from the cache.
For example, in a cache hit, a web browser program following a first check of its local cache on a local computer identifies a local copy of the contents of the sought web page (i.e., data or datum) of the data tag which is a particular uniform resource locator (URL). Once identified, the browser could load the web page for display to the user more quickly than newly accessing, downloading and displaying the contents from the actual URL.
Contradistinctively, a cache miss occurs in the example where a web browser program following a first check of its local cache on a local computer fails to identify a local copy of the contents of the sought web page of a the data tag which is a particular uniform resource locator (URL) as the copy is not available in the cache. Once the data is identified and obtained elsewhere, whether in the system or externally, the browser could thereafter load the web page to be displayed to the user and also provide the cache with the data and an associated data tag. Thereafter, if there is a subsequent request of the web page, a cache hit may occur and the display to the user could occur more quickly than newly accessing, downloading and displaying the contents from the actual URL. From
Unfortunately, a cache has limited storage resources and as more data is populated in the cache, at a predetermined point, the cache will become full. Once a cache is full, no new entries may be added unless first certain previously cached data is be removed (i.e., an entry is ejected or “cast out”) from the cache. The heuristic used to select the entry to eject or cast out is known as the replacement policy. As used herein the terms “entry,” “data buffer,” and “buffer” are intended to be used interchangeably unless otherwise expressly excepted.
Various traditional replacement policies have been attempted. For instance one common replacement policy is to replace the least recently used (LRU) buffer. While this basic LRU policy provides for replacement of data within constrained resource limits, it essentially requires that every buffer in the cache first be scanned to determine which is used least before casting out the least used entry. Further, even this basic policy has proven expensive and time-consuming to simply add new data to the cache.
An alternative replacement policy, based on similar least used characteristics, requires a user to maintain a data structure such as a binary tree defining the entries so that search time may be reduced. However, even with this policy approach, the data structure must be constantly rebalanced and tuned each time data is to be retrieved.
A further alternative replacement policy may be include complex algorithmic approaches which measure, compute and compare various characteristics of each buffer such as use frequency versus stored content size, latencies and throughputs for both the cache and the origin, and the like. Though the additional complexity may improve the choice of the selected entry to be replaced, the efficiency, expense and time involved in its operation is often prohibitive.
These approaches using standard LRU queues often perform linearly and may also create contention on the latching/locking for the LRU queues.
Therefore, it is highly desired to be able to provide an optimal solution which overcomes the shortcomings and limitations of the present art and more particularly provides a method and system for efficiently selecting a cache entry for cast out without first requiring a comparative and complete review of all of the cached entries or otherwise maintaining data structures recognizing a complete grouping of cached entries, and yet provides timely and improved replacements, efficiencies and access to data.
The present invention, in accordance with its various implementations herein, addresses such needs.
In various implementations of the present invention, a method and system are provided for efficiently identifying a cache entry for cast out in relation to scanning a predetermined sampling subset of pseudo-randomly sampled cached entries and determining a least recently used (LRU) entry from the scanned cached entries subset, thereby avoiding a comprehensive review of all of or groups of the cached entries in the cache at any instant.
In one or more implementations, the present invention is a method for identifying a data entry of a cache for cast out, comprising steps of: defining a sample of data entries of the cache as a linked-list chain of data entries, evaluating one or more data entries in the linked-list chain in relation to one or more predetermined characteristics, and identifying a least recently used data entry for cast out.
In other implementations, a subset of the data entries in a cache are randomly sampled, assessed by timestamp in a doubly-linked listing and a least recently used data entry cast out is identified.
In other implementations, a data system having an instantiable computer program product for identifying a data entry of a cache coupled with one or more cache clients for cast out from one or more data entries in a cache containing from a data storage device of a data system having a centralized processing unit (CPU) is provided.
The present invention relates generally to a method and system for efficiently identifying a cache entry for cast out in relation to scanning a predetermined sampling subset of pseudo-randomly sampled cached entries and determining a least recently used (LRU) entry from the scanned cached entries subset, thereby avoiding a comprehensive review of all of or groups of the cached entries in the cache at any instant.
The following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements. Various modifications to the preferred embodiments and the generic principles and features described herein will be readily apparent to those skilled in the art. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features described herein.
As used herein, as will be appreciated, the invention and its agents, in one or more implementations, separately or jointly, may comprise any of software, firmware, program code, program products, custom coding, machine instructions, scripts, configuration, and applications with existing software, applications and data systems, and the like, without limitation.
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In the event the data entries in a cache are determined to be consistent at 320, the number of preallocated control blocks is determined at 330 as each preallocated control block exists in relation to tracking data entries for the cache. Once the number of preallocated blocks is determined, the number of data entries is determined as equal to the number of preallocated control blocks. It is assumed that the number of preallocated control blocks does not exceed the resource limit of the cache.
At 340, the expected number of data entries is compared with the actual number of data entries by determining if there is unused space in the cache.
In the event there is unused space in the cache at 341, there exists one or more available control blocks for new data entries which are intended to be added at 342. If there also exists new data to be entered at 342, after the new data entry is readied to be added to the cache at 343, the new data entry is assigned an available control block at and added to the cache, at 344. Additionally, after the process has determined a cast out of a data entry and identified a new data entry to be added at 376, the new data entry undertakes similar steps at 377 to be added to the cache.
In the event there is no unused space in the cache at 345, there is no additional resources available to add a new data entry until a cast out of an existing data entry can be performed. Similarly, even where there may exist available unused control blocks at 342, if there is no new data entry to add at 342 then no new data entry will be added at 346.
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Once the least recently used data entry is identified, the scan starting point is set to the control block subsequent to (i.e., following) the last control block scanned in the sample. As a result, the next scan will generally contain a completely different sampling of the cache data entries in various implementations.
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Advantageously, the various implementations provide for the situation where the designated scan starting point (i.e., pointer) may not be an “in use” control block and the process will still proceed. For instance, in such a situation, though the designating scan starting point is not an “in use” control block, such a block (i.e. a “not in use” block) can only exist where data entries are available in the cache (i.e., when the cache is not full). Accordingly, when the cache is not full, there is no need to cast out data entries from the cache.
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The present invention in one or more implementations may be implemented as part of a data system, an application operable with a data system, a remote software application for use with a data storage system or device, and in other arrangements.
Advantageously, for example, it will be recognized by those skilled in the art that the quality of the results of the present invention are in relation to the absolute number of entries sampled, and not in relation to the size of the cache or the percentage of all entries sampled. By example, if the sample size is 100 entires, the probability that the selected entry for cast out as being among approximately the least recently used 5% of all of the entries is greater than or equal to 99.4%, independent of the size of the cache, assuming a truly random sample.
It will be appreciated by those skilled in the art that the term “least recently used” in the context of the present invention and its various implementations is not intended to be exactly or absolutely descriptive of any selected cache entry for cast out in relation to a comprehensive listing of entries in the cache memory at a particular instant of time. Rather the term is intended to be generally descriptive that the selected entry for cast out is approximately a least recently used entry in the context of the entire cache memory and is the least recently used entry within the sample, particularly in relation to a selection based on a pseudo-random selection process.
Although the present invention has been described in accordance with the embodiments shown, one of ordinary skill in the art will readily recognize that there could be variations to the embodiments and those variations would be within the spirit and scope of the present invention. Accordingly, many modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the appended claims.
Various implementations of a data retrieving method and system have been described. Nevertheless, one of ordinary skill in the art will readily recognize that various modifications may be made to the implementations, and any variations would be within the spirit and scope of the present invention. For example, the above-described process flow is described with reference to a particular ordering of process actions. However, the ordering of many of the described process actions may be changed without affecting the scope or operation of the invention. Accordingly, many modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the following claims.