Claims
- 1. A method of manufacturing a silicon body having a weakly doped n-type top layer and an adjoining highly doped n-type base layer, comprising the steps of:
- providing a doped first n-type silicon slice with a doping concentration of less than about 10.sup.15 cm.sup.-3, said first silicon slice having a polished surface;
- providing a doped second n-type silicon slice with a doping concentration greater than the doping concentration of the first silicon slice, the second silicon slice having a phosphorous doping as a first doping impurity and either an antimony or arsenic doping as a second doping impurity at a doping concentration greater than the phosphorous doping concentration, said second silicon slice also having a polished surface;
- bringing the polished surfaces of the first and second silicon slices into contact with each other and heating said first and second silicon slices while the polished surfaces are in contact with each other at a temperature and for a time sufficient to bond said polished surfaces, said temperature and time being sufficiently high also to diffuse the phosphorous first doping impurity from the second silicon slice into the first silicon slice to form a boundary layer in the first silicon slice having a doping concentration higher than the doping concentration elsewhere in the first silicon slice, the boundary layer assuring a low contact resistance between the first and second silicon slices, the phosphorous first doping impurity having a doping concentration sufficiently high to overdope any boron diffusion into the boundary layer from boron contamination of the polished surfaces, the second doping impurity diffusing more slowly than phosphorous into the boundary layer to provide a steep doping concentration profile between the first and second silicon slices.
- 2. The method of claim 1 wherein the doping concentration of phosphorous in the second silicon slice is about 5.times.10.sup.16 cm.sup.-3.
- 3. The method of claim 1 wherein the doping concentration of phosphorous in the second silicon slice is equal to or greater than about 10.sup.17 cm.sup.-3.
- 4. The method of claim 1 wherein the doping concentration of the second doping impurity in the second silicon slice is equal to or greater than about 10.sup.18 cm.sup.-3.
- 5. The method of claim 1 wherein the doping concentration of the second doping impurity in the second silicon slice is on the order of 5.times.10.sup.19 cm.sup.-3.
- 6. The method of claim 1 wherein the first doping impurity is present throughout the provided second silicon slice.
- 7. The method of claim 1 wherein the second doping impurity is present throughout the provided second slice.
- 8. The method of claim 1 wherein the first silicon slice is doped with phosphorous.
- 9. The method of claim 1 wherein the second silicon slice is obtained from a silicon rod drawn from a melt.
- 10. The method of claim 1 wherein the first and second silicon slices are brought into contact with each other and heated to a temperature of about 1100 degrees Centigrade for about 3 hours.
- 11. A method of manufacturing a silicon body having an n-type top layer and an adjoining, more highly doped n-type base layer consisting in that a first n-type silicon slice and a second, more highly doped n-type silicon slice are placed one on the other and then bonded together by heating, a boundary layer with a higher doping than the top layer being thus provided in the top layer adjoining the base layer, characterized in that the boundary layer is formed by diffusion of an n-type dopant into the first slice from the second slice during heating, the concentration of the diffused dopant in the boundary layer being higher than the concentration of boron which is present in the boundary layer as an impurity and in that a second slice is used which is obtained from a silicon rod drawn from a melt, which contains phosphorous as a first dopant and contains either antimony or arsenic as a second dopant, where the concentration of antimony or arsenic is larger than the concentration of phosphorous.
Priority Claims (1)
Number |
Date |
Country |
Kind |
9000972 |
Apr 1990 |
NLX |
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Parent Case Info
This is a continuation of application Ser. No. 07/679,978, filed Apr. 3, 1991, abandoned.
US Referenced Citations (10)
Non-Patent Literature Citations (1)
Entry |
Silicon Processing for the VLSI Era; vol. 1; Wolf et al pp. 12, 21-25; 1986. |
Continuations (1)
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Number |
Date |
Country |
Parent |
679978 |
Apr 1991 |
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