Method of fabricating metal-to-metal antifuse with improved diffusion barrier layer

Information

  • Patent Grant
  • 5753528
  • Patent Number
    5,753,528
  • Date Filed
    Tuesday, November 7, 1995
    29 years ago
  • Date Issued
    Tuesday, May 19, 1998
    26 years ago
Abstract
A metal-to-metal antifuse comprises a lower electrode comprising a first metal layer in an integrated circuit, a first barrier layer formed from a layer of TiW:N disposed over the lower electrode, a layer of antifuse material formed from amorphous silicon over the first barrier layer, a second barrier layer formed from a layer of TiW:N disposed over the layer of antifuse material, said second barrier layer, and an upper electrode over the second barrier layer, the upper electrode comprising a second metal layer in the integrated circuit.
Description

BACKGROUND OF THE INVENTION
1. Field Of The Invention
The present invention relates to user-programmable antifuse structures. More particularly, the present invention relates to a metal-to metal antifuse structure with improved immunity to electrode diffusion through a barrier layer interposed between the electrodes and the antifuse material. The present invention relates to processing methods, in general, and the selection of diffusion barrier materials, in particular, to ensure manufacturability of products containing metal/a-Si/metal antifuses.
2. The Prior Art
Antifuses employing amorphous silicon antifuse material are known in the prior art. Since such antifuses are often deployed between metal layers in an integrated circuit, they may employ materials such as aluminum as the antifuse electrodes. Traditionally, several methods have been employed to form barrier layers between the electrodes and the amorphous silicon antifuse material. A thin layer of deposited silicon dioxide has been used. If this layer is too thin, it will not be an effective barrier, and if it is too thick, it will appreciably raise the programming voltage of the antifuse. Control of the thickness of this layer is a difficult task. Alternatively, the lower electrode has been formed from TiW itself. However, this layer cannot be used as the bottom layer of the antifuse and as an interconnect layer. A silicon nitride layer has also been deposited over the TiW layer. If this layer is too thin, it will not be an effective barrier, and if it is too thick, it will appreciably raise the programming voltage of the antifuse.
While titanium-tungsten (TiW) has been used as diffusion barrier for fabrication of antifuses comprising an amorphous silicon antifuse material sandwiched between two metal layers, TiW is not an effective diffusion barrier; especially for use in process technologies which employ alloy temperatures of about 400.degree. C. to 450.degree. C. or higher, because aluminum diffuses through the barrier layer to the amorphous silicon and changes its conductive properties. In addition Ti or W atoms may also diffuse into the amorphous silicon antifuse layer, altering its conductive properties.
BRIEF DESCRIPTION OF THE INVENTION
According to the present invention, a metal-to-metal antifuse includes a diffusion barrier, comprising a layer of nitrided titanium tungsten (TiW:N), interposed between the metal layers and the amorphous silicon antifuse material. According to a presently preferred embodiment of the invention, the TiW:N layer may be formed in situ by reactive ion sputtering of TiW in the presence of nitrogen. Alternatively, the TiW layer may be first formed and then later exposed to an ambient of nitrogen under conditions which will form a nitrided layer at the surface of the TiW layer.





BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1a is a diagram of a cross section of a prior art antifuse incorporating a TiW diffusion barrier layer.
FIG. 1b is a schematic representation of a portion of the cross section of the prior art antifuse of FIG. 1a, showing the interdiffusion of silicon and aluminum through TiW grain boundaries.
FIG. 2 is a diagram of a cross section of an antifuse fabricated according to the present invention employing a TiW:N diffusion barrier layer.
FIGS. 3a and 3b are schematic representations of two variations of cross sections of an antifuse according to the present invention incorporating a TiW:N diffusion barrier layer, showing that TiW:N is an effective diffusion barrier.





DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT
Those of ordinary skill in the art will realize that the following description of the present invention is illustrative only and not in any way limiting. Other embodiments of the invention will readily suggest themselves to such skilled persons.
Metal-to-metal antifuses have been gaining in popularity for some time. Care must be taken to prevent the metal material from which the antifuse electrodes are fabricated from diffusing into the antifuse material in order to avoid reliability problems with antifuses which are to remain unprogrammed. This concern is especially acute when amorphous silicon is employed as the antifuse material.
FIG. 1a is a cross sectional view of a prior art metal-to-metal antifuse structure. The prior art metal-to-metal antifuse structure is shown comprising a lower electrode 10 formed from a metal layer in an integrated circuit disposed above and separated from the surface of a semiconductor substrate 12, which may include other structures, by a layer 14 which may be a barrier layer or an insulating layer. A lower TiW barrier layer 16 is interposed between lower electrode 10 and a layer of amorphous silicon antifuse material 18. An upper TiW barrier layer 20 is interposed between the antifuse material 18 and the upper electrode 22, formed from another metal layer in the integrated circuit.
The interdiffusion of Si and Al through TiW grain boundaries is a well-understood phenomenon and is presented schematically in FIG. 1b. The grain boundaries are represented by lines 24. The dotted arrows 26 represent the path of aluminum atoms to the amorphous silicon and the solid arrows 28 represent the path of silicon atoms to the aluminum through the TiW grain boundaries 24. Because of this diffusion characteristic, TiW is not an effective diffusion barrier for use in antifuse applications. In addition, Ti or W atoms may also diffuse into the amorphous silicon antifuse layer. This especially true in process technologies which employ alloy temperatures of about 400.degree. C. to 450.degree. C. or higher, because the high temperatures enhance aluminum diffusion through the barrier layer to the amorphous silicon.
According to the present invention, a metal-to-metal antifuse having an improved barrier layer to prevent metal diffusion into the antifuse material layer. Referring now to FIG. 2, a cross sectional view of a metal-to-metal antifuse fabricated according to the principles of the present invention is presented. The antifuse 30 of the present invention may be incorporated into an integrated circuit fabricated on a semiconductor substrate 32. Those of ordinary skill in the art will recognize that, for some applications, substrate 32 may be fabricated from a material other than a semiconductor material, such as a ceramic material or other insulator, or may be actually a layer formed over the base substrate material.
The lower electrode 34 of antifuse 30 preferably comprises a portion of a metal interconnect layer already employed in the integrated circuit, and may be formed from a metal such as aluminum or from other metals or combinations of metals and other materials commonly employed for integrated circuit interconnect layers and may typically have a thickness of about between 2,500 and 10,000 angstroms. Lower electrode 34 is shown disposed over an insulating layer 36, covering the substrate and any other intervening structures placed thereon (not shown). As in a conventional integrated circuit process, the layer comprising lower electrode 34 is formed on the top of insulating layer 36 and then appropriately patterned using conventional semiconductor processing techniques.
Next, a lower barrier layer 38 is formed over lower electrode 34. According to a presently preferred embodiment of the invention, lower barrier layer 38 comprises a layer of TiW:N having a thickness of about between 500 and 2,000 angstroms. According to the present invention, the TiW:N barrier films may be produced by a reactive sputtering process, in which N.sub.2 gas is introduced into the noble gas ambient in the reaction chamber during the TiW deposition. With a N.sub.2 /Ar gas flow ratio of about 1/3, i.e., 50 sccm N.sub.2 and 150 sccm Ar, a TiW:N film having a resistivity of about 240 .mu..OMEGA.-cm can be produced. As the gas flow ratio is increased, the resistivity of the resulting TiW:N film increases and its diffusion barrier properties improve. Nevertheless, for circuit considerations, it may not be desirable to produce TiW:N films with resistivities exceeding about 400 .mu..OMEGA.-cm.
Alternatively, an already-grown TiW film may be annealed in an atmosphere of pure N.sub.2 or forming gas (90% N.sub.2 and 10% H.sub.2) at a temperature of about between 300.degree. C. to 450.degree. C. for a period of about 30 minutes. This process results in formation of TiW:N barrier films having barrier and electrical characteristics similar to those produced by in situ formation of TiW:N.
Next, an antifuse material layer 40, comprising amorphous silicon or other suitable material or materials formed using conventional processing techniques, is placed over the lower barrier layer 38. The thickness chosen for antifuse material layer 40 will depend on the parameters desired for the finished antifuse, such as programming voltage, final resistance, and capacitance in the unprogrammed state. Those of ordinary skill in the art will recognize that tradeoffs between these parameters will need to be evaluated to choose a thickness for this layer. Making such tradeoffs are well within the level of ordinary skill in the art.
After the formation of antifuse layer 40, an upper barrier layer 42 is formed on its surface. Upper barrier layer 42 may be formed from the same material and in the same manner as lower barrier layer 38.
Finally, an upper electrode 44 is formed over the surface of upper barrier layer 42. Upper electrode 42 of antifuse 30 preferably comprises a portion of another metal interconnect layer already employed in the integrated circuit, and may be formed from a metal such as aluminum or from other metals or combinations of metals and other materials commonly employed for integrated circuit interconnect layers and may typically have a thickness of about between 2,500 and 10,000 angstroms.
TiW:N barrier layers produced according to the teachings of present invention possess the advantageous properties of TiW (including good adhesion promotion, and low sheet resistance), and, at the same time is a more effective diffusion barrier to protect the antifuse layer from interdiffusion of Si and Al. The effectiveness of Tiw:N as a diffusion barrier is due to the presence of TiWN precipitates at Tiw:N grain boundaries, which block interdiffusion of Si and Al through grain boundaries. This is shown schematically in FIGS. 3a and 3b, where the dark lines 46 represent TiWN precipitates which act to plug the grain boundaries of the TiW:N film, thus effectively blocking interdiffusion of metal into the amorphous silicon antifuse layer.
While embodiments and applications of this invention have been shown and described, it would be apparent to those skilled in the art that many more modifications than mentioned above are possible without departing from the inventive concepts herein. The invention, therefore, is not to be restricted except in the spirit of the appended claims.
Claims
  • 1. A method for fabricating an antifuse between a first metal layer and a second metal layer in an integrated circuit, comprising the steps of:
  • forming said first metal layer;
  • forming a lower barrier layer over said first metal layer comprising the step of forming a layer of TiW:N;
  • forming a layer of antifuse material over said lower barrier layer;
  • forming an upper barrier layer over said antifuse material comprising the step of forming a layer of TiW:N; and
  • forming said second metal layer over said upper barrier layer.
  • 2. The method of claim 1 wherein the steps of forming said lower and upper barrier layers comprise a reactive TiW sputtering process in the presence of Ar and N.sub.2 gas.
  • 3. The method of claim 2 in which a N.sub.2 /Ar gas flow ratio of about 1/3 is employed.
  • 4. The method of claim 1 wherein the steps of forming said lower and upper barrier layers comprise forming a TiW layer and annealing said TiW layer in the presence of N.sub.2 gas.
CROSS-REFERENCE TO RELATED APPLICATION

This is a divisional of patent application Ser. No. 008/247,243, filed Jun. 10, 1993, U.S. Pat. No. 5,510,646 which is a continuation of patent application Ser. No. 07/842,872, filed Feb. 26, 1992 now abandoned.

US Referenced Citations (55)
Number Name Date Kind
4651409 Ellsworth et al. Mar 1987
4748490 Hollingsworth May 1988
4796075 Whitten Jan 1989
4822753 Pintchovski et al. Apr 1989
4823181 Mohsen et al. Apr 1989
4899205 Hamdy et al. Feb 1990
4914055 Gordon et al. Apr 1990
4943538 Mohsen et al. Jul 1990
5070384 McCollum et al. Dec 1991
5093711 Hirakawa Mar 1992
5095362 Roesner Mar 1992
5100827 Lytle Mar 1992
5120679 Boardman et al. Jun 1992
5134457 Hamdy et al. Jul 1992
5166556 Hsu et al. Nov 1992
5171715 Husher et al. Dec 1992
5173449 Lorenzen et al. Dec 1992
5194759 El-Ayat et al. Mar 1993
5196724 Gordon et al. Mar 1993
5233206 Lee et al. Aug 1993
5233217 Dixit et al. Aug 1993
5241496 Lowrey et al. Aug 1993
5242851 Choi Sep 1993
5248632 Tung et al. Sep 1993
5266829 Hamdy et al. Nov 1993
5272101 Forouhi et al. Dec 1993
5272666 Tsang et al. Dec 1993
5284788 Spratt et al. Feb 1994
5286993 Lowrey et al. Feb 1994
5290734 Boardman et al. Mar 1994
5293133 Birkner et al. Mar 1994
5298784 Gambino et al. Mar 1994
5300456 Tigelaar et al. Apr 1994
5302546 Gordon et al. Apr 1994
5304508 Cohen Apr 1994
5308795 Hawley et al. May 1994
5318924 Lin et al. Jun 1994
5322812 Dixit et al. Jun 1994
5327024 Cox Jul 1994
5328865 Boardman et al. Jul 1994
5329153 Dixit Jul 1994
5332929 Chiang Jul 1994
5353246 Tsang et al. Oct 1994
5381035 Chen et al. Jan 1995
5387311 Hall et al. Feb 1995
5390141 Cohen et al. Feb 1995
5391513 Delgado et al. Feb 1995
5391518 Bhushan Feb 1995
5395797 Chen et al. Mar 1995
5403778 Kwok et al. Apr 1995
5404029 Husher et al. Apr 1995
5412245 Favreau May 1995
5412593 Magel et al. May 1995
5482884 McCollum et al. Jan 1996
5485031 Zhang et al. Jan 1996
Foreign Referenced Citations (1)
Number Date Country
0 414 361 Feb 1991 EPX
Divisions (1)
Number Date Country
Parent 247243 Jun 1993
Continuations (1)
Number Date Country
Parent 842872 Feb 1992