Claims
- 1. A method for fabricating an antifuse between a first metal layer and a second metal layer in an integrated circuit, comprising the steps of:
- forming said first metal layer;
- forming a lower barrier layer over said first metal layer comprising the step of forming a layer of TiW:N;
- forming a layer of antifuse material over said lower barrier layer;
- forming an upper barrier layer over said antifuse material comprising the step of forming a layer of TiW:N; and
- forming said second metal layer over said upper barrier layer.
- 2. The method of claim 1 wherein the steps of forming said lower and upper barrier layers comprise a reactive TiW sputtering process in the presence of Ar and N.sub.2 gas.
- 3. The method of claim 2 in which a N.sub.2 /Ar gas flow ratio of about 1/3 is employed.
- 4. The method of claim 1 wherein the steps of forming said lower and upper barrier layers comprise forming a TiW layer and annealing said TiW layer in the presence of N.sub.2 gas.
CROSS-REFERENCE TO RELATED APPLICATION
This is a divisional of patent application Ser. No. 008/247,243, filed Jun. 10, 1993, U.S. Pat. No. 5,510,646 which is a continuation of patent application Ser. No. 07/842,872, filed Feb. 26, 1992 now abandoned.
US Referenced Citations (55)
Foreign Referenced Citations (1)
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0 414 361 |
Feb 1991 |
EPX |
Divisions (1)
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247243 |
Jun 1993 |
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Continuations (1)
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842872 |
Feb 1992 |
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