Not applicable.
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Not applicable.
The treatment of some fluids involves an increasingly precise temperature regulation. In particular when chemical or biochemical reactions are involved precise temperature regulation is often required to minimize undesirable side reactions. And especially in biochemical application, the ability to use very small amounts of fluid is desirable due to the cost or scarcity of larger amounts of the fluids to be analyzed.
One example of a biochemical reaction where temperature regulation is important is the DNA amplification process, also called the Polymerase Chain Reaction process, or PCR. In PCR thermal cycles, various steps of the process are repeated many times to amplify the sample DNA to a detectable level. But there is a need to avoid as far as possible thermal gradients in the fluid reaction areas to provide a uniform reaction environment for the sample in order to obtain a good reaction efficiency or even to obtain the desired reaction product at all.
Other types of processes would also benefit from devices that are capable of fluid treatment and of handling small sample quantities and precisely heating the reaction zone through which the sample is passed. For example, chemical and/or pharmacological analyses, biological tests, and combinatorial chemical synthesis could each benefit from such devices.
Another feature that may aid the ability to control thermal gradients in a microchip reactor is the ability to provide a reaction environment that is substantially covered. Such structures may allow heat to be distributed over the top of the reaction area and also reduce contamination of the reaction fluid. Some microreactors are manufactured using standard photolithographic procedures on which surface channels are made. The channels are covered by thermally bonding a covering plate over the surface containing the exposed channels. But covering the entire surface of the device to seal the channels reduces the flexibility of the options for device designs and complicates the manufacturing process.
Embodiments of the inventions described herein provide devices having substantially covered channels by conventional semiconductor fabrication techniques. In one aspect embodiments of the invention provide a process for manufacturing a semiconductor device that includes filling at least one channel region of a substrate with a sacrificial material to form a filled channel; forming an encapsulating layer over the filled channel; forming at least one aperture in the encapsulating layer; selectively removing the sacrificial material in the channel region. In particular embodiments, the rate at which an etchant removes the sacrificial material is faster than the rate at which the etchant removes the metal oxide material.
In some embodiments, the substrate comprises silicon, including polysilicon, silicon dioxide or an organic polymer. Particular embodiments include a substrate that is formed over a primary support such as a silicon wafer. Some embodiments of the process described herein optionally include providing an etch stop layer, such as silicon, silicon nitride, silicon dioxide or titanium nitride located under the substrate and in particular embodiments interposing the substrate and the primary support.
In some embodiments, the sacrificial material that fills the trench formed in the substrate is a spin-on-glass (SOG). Some suitable spin-on-glasses include silica, organosilicate and doped silica compositions. In some embodiments of the invention the sacrificial layer has a faster etching rate than the metal oxide layer. In some embodiments, the sacrificial material is removed by using hydrofluoric acid (HF) or a solution thereof as the etchant. In a particular embodiment, the sacrificial material is a spin-on-glass and the etchant is a solution of HF. Where the sacrificial material is a SOG, it is preferable to perform a heating step to degas and cure the SOG after its deposition in the trench.
In still other embodiments, some processes described herein include forming an encapsulating layer comprising an insulating or conductive material. Some suitable insulating or conductive encapsulating materials include silicon dioxide, silicon, silicon nitride, silicon carbide, silicon oxide nitrides, silicon carbide nitrides, aluminum, aluminum nitride, titanium, titanium nitride, tantalum, tantalum nitride, tungsten, tungsten carbide, and tungsten nitride or combinations thereof.
In another aspect, embodiments of the invention provide an integrated device having a substrate, optionally formed on a primary support, where the substrate has a channel formed therein; an encapsulating layer located over the substrate and over at least a portion of the channel, the encapsulating layer having at least one aperture located over the channel.
In some embodiments, the substrate comprises a monolithic silicon substrate, polysilicon, silicon dioxide, or an organic polymer. In other embodiments, the integrated device comprises a primary support under the substrate. One suitable primary support is a silicon wafer. Optionally, the primary support can be an organic polymer such as polyethylene or polypropylene.
In some embodiments, the encapsulating layer comprises an insulating or conductive layer comprising silicon dioxide, silicon, or silicon nitride, silicon carbide, silicon oxide nitrides, silicon carbide nitrides, aluminum, aluminum nitride, titanium, titanium nitride, tantalum, tantalum nitride, tungsten, tungsten carbide, and tungsten nitride.
In particular embodiments, the integrated device includes a barrier layer formed over the base and the walls of the channel formed in the metal oxide layer. Suitable materials for the barrier layer include insulating or conductive materials that under the selected etching conditions are less susceptible to etching than the sacrificial material discussed below. Some suitable barrier materials include silicon dioxide, silicon, or silicon nitride, silicon carbide, silicon oxide nitrides, silicon carbide nitrides, aluminum, aluminum nitride, titanium, titanium nitride, tantalum, tantalum nitride, tungsten, tungsten carbide, and tungsten nitride and combinations thereof.
a-e show a schematic representation of one process for forming an integrated device having substantially buried channels formed therein.
a-f show a schematic representations of processes for forming an integrated device having substantially buried channels formed therein.
a-b illustrate schematic representation of integrated devices according to embodiments of the invention.
With reference to Figures la-e, one embodiment of a manufacturing process according to the present invention is described.
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In some embodiments, the sacrificial material outside the channels 140 is removed. The manner by which the sacrificial material is removed is not critical. One method of removing the sacrificial material is by surface planarization using chemical mechanical polishing (CMP). An isotropic dry or wet etching suitable for removing the sacrificial material can also be used to removed undesirable portions of the sacrificial layers 150.
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Another embodiment of the invention includes a substrate under the metal oxide layer. In some embodiments having a substrate under the metal oxide layer, the substrate comprises a monocrystalline semiconductor material, for example silicon. Any crystallographic orientation of the substrate is suitable depending on the design of the device. In some embodiments, a <110> or a <100> crystallographic orientation instead is used. In other embodiments, a wafer a having a <111> orientation is used. One of ordinary skill in the art understands how to select a suitable orientation of the substrate according to the layers to be formed thereon.
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In another aspect the invention provides an integrated device as schematically shown in
The choice of material for the substrate 310 of device 300 is not critical. Some suitable substrates include monolithic silicon wafers, polysilicon, silicon dioxide and organic polymers such as but not limited to poly-alpha-olefins homopolymers and copolymers. In particular, polyethylene and polypropylene homopolymer and copolymers can be used. Metal oxides can also be used as the substrate. Particularly useful metal oxides include those metal oxides containing at least one Group 3-15 and oxygen. In some embodiments, the substrate 310 comprises silicon dioxide, aluminum oxide, silicon aluminum oxide, titanium dioxide, one or more tantalum oxides such as tantalum pentoxide, or tungsten oxide. In a preferred embodiment the substrate 310 is a silicon dioxide layer.
The channels 320 extend in the surface of the metal oxide layer 310 in a desired configuration. In particular embodiments, the channels 320 extend substantially parallel to each other, in the lengthwise direction of the integrated device 300, at a desired distance from the surface of the integrated device 300. While they may have any desired dimension, the channels 320 may have a roughly circular or rectangular section, may be spaced 1-30 μm apart, and may be set at a depth of 5-10 μm from the surface of the integrated device 300.
The encapsulating layer 340 of the integrated device 300 is located over at least a portion of the substrate 310 and the one or more channels 320 formed therein. Any suitable material can be used as the encapsulating layer 340. In some embodiments, the encapsulating layer 340 comprises an insulating material. In other embodiments, the encapsulating layer 340 comprises a conductive material. Some embodiments include an encapsulating layer that comprises a two or more distinct layers. Typically, the encapsulating layer 340 ranges in thickness from about 50 nm to about 50 μm. Structures with an encapsulating layer 340 that is thinner or thicker are also used in certain embodiments since the thickness of the layer is not critical. Typically, where more than one layer forms the encapsulating layer 340 the individual layers have different compositions, but they may also have the same composition yet are formed in a separate step or in the same process step under a different set of conditions. Suitable materials for use as encapsulating layers include silicon dioxide, silicon, silicon nitride, silicon, carbide, silicon oxide nitrides, carbide nitrides, silicon oxide carbide, aluminum, aluminum nitride, titanium, titanium dioxide, titanium nitride, tantalum, tantalum nitride, tungsten, tungsten carbide, tungsten nitride, and combinations thereof.
The encapsulating layer 340, whether it comprises one or more individual layers, has at least one aperture located over the channel 320. In embodiments having two or more channels 320 in the substrate 310, the encapsulating layer 340 has at least one aperture 350 located over each channel 320. In some embodiments, the encapsulating layer 340 has a plurality of apertures formed therein. The one or more apertures 350 can be formed by any means. In some embodiments, the apertures 350 are formed by a wet etching process, such as etching with TMAH or HF. Depending on the selection of materials, the apertures can also be formed by a dry etching process. Appropriate etching times depend on the choice of etchant and the composition of the encapsulating layer 340. As is known in the art, forming the apertures 340 by etching also includes photolithographic process where a hard mask is formed over the encapsulating layer. The mask maybe either a positive mask or a negative mask.
Embodiments of the invention described herein can form a part of larger structures such as microreactor, preferably a DNA microreactor.
In detail, the channels extend parallel to each other, in the lengthwise direction of the body 405, at a preset distance from the surface 410. For example, the channels can have a roughly circular or rectangular section and can be spaced 50 μm, with a depth of 5-10 μm from the surface 410. In the case of channels with a rectangular section, the channels have a side of approximately 30×200 μm and occupy an area of 5×10 mm.
Preferably, the heating elements 430 are formed, as been mentioned, on the surface 410 of the body 405 and are insulated from the body 405 by an electrically insulating material layer 435, for example silicon dioxide.
Each of the heating elements 430 in the illustrated embodiment, comprise a rectangular region that extends transversely with respect to the extension of the channels, and the heating elements 430 are adjacent to each other so as to practically cover the entire portion of the surface 410 overlying the channels, except for intermediate strips 440 of the surface 410. Each of the heating elements 430 is connected by two electric connection regions 445 arranged on the opposite shorter sides of each of the heating elements 430.
In particular embodiments, sensor elements 450 extend above the intermediate strips 440 of the surface 410, and include for example coil-shaped metal regions that are represented schematically and are connected at their ends to contact regions 455. The sensing elements 460 are of a material having a resistance that varies with the temperature and are connected to a resistance sensing circuit of known type, for example of bridge type, not illustrated and preferably formed in the body 405.
In use, the liquid to be treated and/or to be made to react with a reagent is introduced from a reservoir located above the integrated device 400 through the inlet ports 420, is forced to flow through the channels, and is possibly mixed with appropriate reagents at a controlled temperature. The heating elements 430 maintain a controlled temperature throughout the channel area; in particular, because of its micrometric dimensions, the buried channel is evenly heated, and there is no temperature gradient along and across the channels themselves.
According to the treatment to be carried out, it is possible to perform a series of heat cycles, each time controlling the temperature with precision as desired for a preset time by virtue of the temperature sensors cooperating with a suitable control system of known type. The treated and/or reacted liquid exits the integrated device 400 through the outlet port or ports 425.
Finally, it is clear that numerous variations and modifications may be made to the device and to the manufacturing process described and illustrated herein, all falling within the scope of the invention, as defined in the attached claims. For example, the integrated device 100 may also include heating elements and/or sensor elements that extend above the encapsulating layer or along the channels 420 in any other suitable configuration, as described in U.S. Pat. No. 6,673,593 incorporated herein by reference in its entirety for the purposes of U.S. patent practice. In some embodiments, the integrated device 400 includes coil-shaped metal regions connected at their ends to contact regions. In some embodiments, sensing elements comprise a material having a resistance that varies with the temperature and are connected to a resistance sensing circuit of any desirable configuration, such as but not limited to bridge type resistance circuits that are formed in the integrated device 400. In a way which is not illustrated, the body 405 may integrate electronic components for controlling the temperature and/or for processing the signals picked up by the integrated device. For example, instead of having a plurality of channels that connect inlet ports 420 to outlet ports 425, the thermoregulation device 400 may comprise a single buried channel of a suitable width, and the channels may be set at a distance whereby, in the subsequent timed etching for forming the channels, the silicon between the channels themselves is removed completely.