Claims
- 1. A method of increasing the accuracy of an analog circuit employing floating gate memory devices which are programmed by transferring charge onto a floating gate member insulated from a substrate by a tunnel oxide and from a control gate by a dielectric layer comprising an oxide-nitride-oxide stack, a dipole being formed in said dielectric layer upon programming of said floating gate memory devices, said method comprising the steps of:
- (a) programming said floating gate memory devices with a predetermined charge;
- (b) baking said circuit to accelerate the redistribution of charge within said dielectric, said redistribution causing a shift in the voltage threshold of said floating gate memory devices; and
- (c) reprogramming said floating gate memory devices to effectively cancel out said shift and restore said predetermined charge to said floating gate memory devices.
- 2. The method of claim 1 further comprising the step of:
- (d) repeating steps (b) and (c) to further increase the accuracy of said circuit.
- 3. The method of claim 1 wherein said floating gate devices are both electrically programmable and electrical erasable memory devices.
Parent Case Info
This is a divisional of application Ser. No. 07/634,033, filed Dec. 26, 1990, U.S. Pat. No. 5,146,602.
US Referenced Citations (4)
Non-Patent Literature Citations (1)
Entry |
Goser et al., "VLSI Tech. for Artificial Neural Networks", IEEE Micro 1989. |
Divisions (1)
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Number |
Date |
Country |
Parent |
634033 |
Dec 1990 |
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