Claims
- 1. A method of forming a memory array that includes a plurality of bit lines formed in a substrate, a plurality of rows of memory cells arranged so that, in each row, one memory cell is formed between each pair of adjacent bit lines, and a plurality of rows of select cells arranged so that, in each row, one select cell is formed between each pair of adjacent bit lines, each row of select cells having alternating first and second select cells, the method comprising the steps of:
- forming a layer of sacrificial oxide on the substrate;
- forming an implant mask on the layer of sacrificial oxide, the implant mask defining a plurality of channel regions for the second select cells; and
- implanting the channel regions with a material that increases the threshold voltage of the second select cells so that when a first select cell in a row is biased to conduct a current, the second select cells in the row remain non-conductive.
- 2. A method of forming a memory array that includes a plurality of bit lines formed in a substrate, a plurality of rows of memory cells arranged so that, in each row, one memory cell is formed between each pair of adjacent bit lines, and a plurality of rows of select cells arranged so that, in each row, one select cell is formed between each pair of adjacent bit lines, each row of select cells having alternating first and second select cells, the method comprising the steps of:
- forming a layer of sacrificial oxide on the substrate;
- forming an implant mask on the layer of sacrificial oxide, the implant mask defining a portion of a channel region for each second select cell; and
- implanting the portion of the channel region of each second select cell with a material that increases the threshold voltage of the second select transistor cells so that when a first select cell in a row is biased to conduct a current, the second select cells in the row remain non-conductive.
- 3. The method of claim 1 wherein the substrate includes a P.sup.- -type substrate.
- 4. The method of claim 2 wherein the substrate includes a P.sup.- -type substrate.
- 5. The method of claim 1 wherein, in going down each column of the array, every other select cell is formed as a second select cell.
- 6. The method of claim 2 wherein, in going down each column of the array, every other select cell is formed as a second select cell.
- 7. The method of claim 1 wherein the material includes boron.
- 8. The method of claim 2 wherein the material includes boron.
- 9. The method of claim 1 wherein the material includes BF.sub.2.
- 10. The method of claim 1 wherein the material includes BF.sub.2.
RELATED CASES
This is a divisional of application Ser. No. 08/126,507, filed Sep. 24, 1993, now U.S. Pat. No. 5,422,824 which is a continuation in part of Ser. No. 07/994,120 filed Dec. 21, 1992, now U.S. Pat. No. 5,319,593.
US Referenced Citations (9)
Foreign Referenced Citations (3)
Number |
Date |
Country |
0488804A1 |
Jun 1992 |
EPX |
4028575A1 |
Mar 1991 |
DEX |
54-161853 |
Dec 1979 |
JPX |
Divisions (1)
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Number |
Date |
Country |
Parent |
126506 |
Sep 1993 |
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Continuation in Parts (1)
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Number |
Date |
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Parent |
994120 |
Dec 1992 |
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