1. Field of the Invention
The present invention relates to miniaturized microphones and more particularly, to a method of making silicon-based miniaturized microphone, which is practical for making high sensitivity and high reliability miniaturized thin type microphones through a mass production.
2. Description of the Related Art
It is the market tendency to provide compact and sophisticated mobile electronic devices such as MP3 players, cell phones, PDAs, etc. A microphone is an important part commonly seen in regular mobile electronic devices. It is important to provide a high-performance microphone having light, thin, short and small characteristics.
Therefore, it is desirable to provide a method of making microphone, which is practical for making miniaturized, high-performance microphones at a high yield rate.
The present invention has been accomplished under the circumstances in view. It is the primary objective of the present invention to provide a method of making silicon-based miniaturized microphone, which is practical for making high sensitivity and high reliability miniaturized microphones.
It is another objective of the present invention to provide a method of making silicon-based miniaturized microphone, which is practical for mass production of high sensitivity and high reliability miniaturized microphones to reduce the manufacturing cost.
To achieve these objectives of the present invention, the method of making a silicon-based miniaturized microphone comprising the steps of: a) preparing a silicon substrate having a dielectric layer respectively covered on top and bottom surfaces thereof and depositing a polysilicon material on the dielectric layer at the top surface of the silicon substrate to form a diaphragm, and then doping the diaphragm with baron ions or phosphor ions, and then annealing the diaphragm, and then etching the diaphragm by a photo lithographic process subject to a predetermined pattern; b) depositing a sacrificial layer on the diaphragm; c) depositing an insulative layer on the sacrificial layer; d) depositing a polysilicon film on the insulative layer and then doping the polysilicon film with baron ions or phosphor ions and then annealing the polysilicon film to form a backplate, and then etching the backplate subject to a predetermined pattern; e) depositing a passivation on the backplate and then etching the passivation to provide a contact window; f) using a sputtering coating technology or an evaporation coating technology to form two solder pads, which are respectively and electrically connected to the backplate and the diaphragm, within the contact window; g) etching the passivation, the backplate and the insulative layer, so as to form a plurality of sound holes; h) stripping off the dielectric layer at the bottom surface of the silicon substrate, and then etching the silicon substrate, and then stripping off a part of the dielectric layer at the top surface of the silicon layer so as to form a resonance cavity; and i) stripping off the sacrificial layer.
Referring to
As shown in
a) preparing a N type or P type silicon substrate 1a having the crystal orientation <100> and a dielectric layer 1b of silicon dioxide or silicon nitride respectively covered on the top and bottom surfaces, and depositing a polysilicon material in the dielectric layer 1b at the top side of the silicon substrate 1a by a low pressure CVD (Chemical Vapor Deposition) process to form a diaphragm 2, and then doping the diaphragm 2 with baron ions or phosphor ions, and then annealing the diaphragm 2 to form a P type or N type, low stress, semiconductor diaphragm of thickness about 0.1-0.4 μm, for enabling of processing the diaphragm with a photo lithographic process to have the designed pattern (see
b) growing a sacrificial layer 3 of LTO (Low Temperature Oxide), for example, PSG (phosphorous silicon glass) about 0.5-5.0 μm thick from the diaphragm 2 by a low pressure CVD or PECVD (Plasma Enhanced Chemical Vapor Deposition) process, and then employing a photo lithographic process (see
c) growing an insulative layer 41 of silicon nitride having a thickness about 0.1-2.0 μm from the sacrificial layer 3 by a low pressure CVD or PECVD (Plasma Enhanced Chemical Vapor Deposition) process (see
d) growing a polysilicon film having a thickness about 1.0-6.0 μm from the top surface of the insulative layer 41 by a low pressure CVD (Chemical Vapor Deposition) process, and then doping the polysilicon film with baron ions or phosphor irons and then annealing the film to form a backplate 4 having protruding structures 4a, and then etching the backplate 4 subject to the desired pattern (see
e) growing a passivation 42 of silicon nitride of thickness about 0.1-2.0 μm from the top surface of the backplate 4 by a low pressure CVD or PECVD (Plasma Enhanced Chemical Vapor Deposition) process to provide the effects of protection, electricity insulation and stiffness reinforcement, and then etching the passivation 42 by photo lithography to provide contact windows 50 (see
f) using a semiconductor sputtering or evaporation coating technology to cover the top side of the backplate 4 with a layer of metal material, for example, aluminum, gold, chrome, platinum, titanium, nickel, copper, silver, or the alloy thereof of thickness about 0.1-1.5 μm, and then using a semiconductor lift-off or wet etching technology to define the pattern of the metal coating, so as to form two solder pads 51 and 52 within the contact windows 50 that are respectively electrically connected to the backplate 4 and the diaphragm 2 (see
g) using a lithographic technology to define the pattern, and then using an etching technology to etch the passivation 42, the backplate 4 and the insulator layer 41 subject to the defined pattern, so as to form a plurality of sound holes 43 and etching holes 43a (see
h) using a photo lithographic technology to define an etching window 6 at the bottom side of the silicon substrate 1a (see
i) using HF (Hydrofluoric Acid), BOE (Buffered Oxide Etchant), or HF (Hydrofluoric Acid) vapor to strip off the sacrificial layer 3 (see
Referring to
Therefore, the backplate 4 and diaphragm 2 of the silicon-based miniaturized microphone 1 work as top and bottom electrodes such that vibration of the diaphragm 2 upon a sound pressure causes a variation of the capacitance value.
Further, the protruding structure 4a of the backplate 4 of the silicon-based miniaturized microphone 1 prevents stiction between the diaphragm 2 and the backplate 4, thereby improving the yield rate of the product.
Further, when employing another anti-stiction technology to strip off the sacrificial layer 3 during step i), for example, sacrificial layer dry etching, hydrofluoric acid vapor etching, or organic drying technology, the design of the protruding structure 4a can be eliminated, thereby obtaining another structure of silicon-based miniaturized microphone 10 as shown in
In the aforesaid first preferred embodiment of the present invention, an anisotropic chemical wet etching process is employed to etch the etching window 6 to form a resonance cavity 5 having the <111> orientation of the peripheral walls during step h). An ICP (Inductively Coupled Plasma) etching process may be employed instead of the anisotropic chemical wet etching process, thereby forming a resonance cavity 55 having vertical peripheral walls as shown in
Therefore, changing the aforesaid steps (h) and (i) can obtain another structure of silicon-based miniaturized microphone 20 as shown in
The silicon-based miniaturized microphone manufacturing process of the present invention is a combination of a semiconductor manufacturing process and a silicon micro-machining technology. Although particular embodiments of the invention have been described in detail for purposes of illustration, various modifications and enhancements may be made without departing from the spirit and scope of the invention. Accordingly, the invention is not to be limited except as by the appended claims.