Claims
- 1. A method for fabricating a semiconductor device, which comprises:providing a semiconductor substrate of a first conductivity type; implantating and diffusing a first well of a second conductivity type in the semiconductor substrate; implantating and diffusing a second well of the first conductivity type in the first well; implantating a third well of the second conductivity type in the second well; forming a MOS transistor in the third well; forming the MOS transistor with a source region of the first conductivity type and a drain region of the first conductivity type; providing a terminal for receiving a predetermined potential; connecting the terminal to the second well, the third well and a region selected from the group consisting of the source region and the drain region; providing a further terminal for receiving a further predetermined potential; and connecting the further terminal to the first well and the semiconductor substrate.
Priority Claims (1)
Number |
Date |
Country |
Kind |
197 52 848 |
Nov 1997 |
DE |
|
Parent Case Info
The present application is a divisional application of U.S. patent application Ser. No. 09/201,734, which is now issued U.S. Pat. No. 6,111,294.
US Referenced Citations (8)
Foreign Referenced Citations (1)
Number |
Date |
Country |
0 822 596 |
Feb 1998 |
EP |