Claims
- 1. A method of manufacturing a semiconductor device formed near a surface of a semiconductor substrate, and having an integrated circuit region surrounded by an insulation part and separated from other region, wherein an outer peripheral part of the integrated circuit region is defined as a dummy cell region and a center part except the outer peripheral part of the integrated circuit region is defined as an active cell region, the method comprising the steps of:
- forming a field oxide layer on the semiconductor substrate which is to be the insulation part and to be an isolation defining the integrated circuit region into a plurality of cell forming regions;
- introducing an impurity for forming a channel region near the surface of the semiconductor substrate;
- forming a gate on the semiconductor substrate and the field oxide layer;
- forming a photo-mask for covering at least a part of the dummy cell region;
- forming a source/drain region at each cell forming region of the active cell region by ion implantation of impurity having a conductive type inverse to that of the semiconductor substrate, using the photo-mask and the gate as a mask; and
- removing the photo-mask at the dummy cell region after the step of forming the source/drain region.
- 2. The method of manufacturing a semiconductor device according to claim 1, wherein at the step of forming the photo-mask, the photo-mask covering a region of the dummy cell region which excludes a part located in a direction conforming with a direction of tilted ion implantation to the active cell in the active cell region is formed.
- 3. The method of manufacturing a semiconductor device according to claim 1 or 2, further comprising the step of forming a punch-through stopper by impurity ion implantation deep to the semiconductor substrate before the step of forming the gate.
- 4. The method of manufacturing a semiconductor device according to claim 1 or 2, further comprising the step of forming a channel stopper by impurity ion implantation below the field oxide layer.
- 5. The method of manufacturing a semiconductor device according to claim 2, wherein DRAM memory cells are arranged at the active cell region in the semiconductor device, and at the step of forming the photo-mask, the photo-mask is provided with forming parts and open parts which are alternately arranged in a direction parallel with the gate.
Priority Claims (1)
Number |
Date |
Country |
Kind |
5-041600 |
Mar 1993 |
JPX |
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Parent Case Info
This is a divisional of application Ser. No. 08/203,627, filed Mar. 1, 1994, now U.S. Pat. No. 5,408,983.
US Referenced Citations (3)
Number |
Name |
Date |
Kind |
4264965 |
Onishi |
Apr 1981 |
|
4612565 |
Shimizu et al. |
Sep 1986 |
|
4830977 |
Katto et al. |
May 1989 |
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Divisions (1)
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Number |
Date |
Country |
Parent |
203627 |
Mar 1994 |
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