Claims
- 1. A manufacturing method of a semiconductor device comprising the steps of:
- forming a first insulating oxide film and a second insulating oxide film, which continues to said first insulating oxide film and has a thickness larger than that of said first insulating oxide film, on a semiconductor substrate;
- forming a polysilicon film, which covers said first and second insulating oxide film, on said semiconductor substrate;
- forming a silicon nitride layer in a lowermost layer portion of said polysilicon film by implanting nitrogen ions into said lowermost layer portion of said polysilicon film and then applying a heat treatment thereto;
- patterning said polysilicon film and said silicon nitride layer, for forming a first polysilicon resistance film and a second polysilicon resistance film on said first insulating oxide film and said second insulating oxide film, respectively;
- forming a first electrode connected to said first polysilicon resistance film and a second electrode connected to said second polysilicon resistance film; and
- forming an insulating protection film, which covers said first polysilicon resistance film, said second polysilicon resistance film, said first electrode and said second electrode, over said semiconductor substrate.
- 2. A method according to claim 1, wherein said step of forming said first polysilicon resistance film and said second polysilicon resistance film includes the steps of
- selectively etching said polysilicon film, using SF.sub.4 gas plasma or CCl.sub.4 gas plasma, and
- selectively etching said silicon nitride layer by mixed gas plasma using CF.sub.4 and O.sub.2.
- 3. A method of manufacturing a semiconductor device according to claim 1, wherein said silicon nitride layer is approximately 30-100 nm.
- 4. A method of manufacturing a semiconductor device according to claim 1, further comprising implanting impurities in the polysilicon film to control the resistance of the polysilicon film.
- 5. A method of manufacturing a semiconductor device according to claim 1, wherein said nitrogen ions are implanted at 500 keV to 5 MeV and said heat treatment is applied at between 500-850 degrees centigrade.
- 6. A method of manufacturing a semiconductor device according to claim 1, wherein a bond is formed at an interface between said polysilicon film and said silicon nitride layer without impurities disposed at said interface.
- 7. A manufacturing method of a semiconductor device comprising the steps of:
- forming a first insulating oxide film and a second insulating oxide film, which continues to said first insulating oxide film and has a thickness larger than that of said first insulating oxide film, on a semiconductor substrate;
- forming a pattern of a first silicon nitride film and a pattern of a second silicon nitride film on said first insulating oxide film and said second insulating oxide film, respectively;
- growing a polysilicon film on each of said pattern of said first silicon nitride film and said pattern of said second silicon nitride film, thereby forming a first polysilicon resistance film and a second polysilicon resistance film over said first insulating oxide film and said second insulating oxide film, respectively;
- forming a first electrode connected to said first polysilicon resistance film and a second electrode connected to said second polysilicon resistance film; and
- forming an insulating protection film, which covers said first polysilicon resistance film, said second polysilicon resistance film, said first electrode and said second electrode, over said semiconductor substrate.
- 8. A method of manufacturing a semiconductor device according to claim 7, wherein forming said pattern of said first silicon nitride film and said pattern of said second silicon nitride film includes the steps of subjecting said first and second silicon nitride films to photolithography, and etching said first and second silicon nitride films.
- 9. A method of manufacturing a semiconductor device according to claim 7, wherein polysilicon film is selectively grown using a silicon material containing a halogen element.
Priority Claims (1)
Number |
Date |
Country |
Kind |
4-127609 |
May 1992 |
JPX |
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Parent Case Info
This application is a division of application Ser. No. 07/960,650 filed Oct. 14, 1992, now U.S. Pat. No. 5,327,224.
US Referenced Citations (18)
Foreign Referenced Citations (5)
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Date |
Country |
0463174A1 |
Jan 1992 |
EPX |
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Nov 1989 |
JPX |
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Jan 1991 |
JPX |
3070170 |
Mar 1991 |
JPX |
2103880A |
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GBX |
Non-Patent Literature Citations (3)
Entry |
Copy of German Office Action (with English Translation) citing references in corresponding German divisional application. |
IBM Technical Disclosure Bulletin, vol. 22, No. 12, May 1980. |
M. K. Lee, C. Y. Lu, "On the Semi-Insulating Polycrystalline Silicon Resistor", Solid State Electronics, vol. 27, No. 11, pp. 995-1001, 1984. |
Divisions (1)
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Number |
Date |
Country |
Parent |
960650 |
Oct 1992 |
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