The invention relates to a method of manufacturing an ink jet print head that comprises a number of aligned modules, wherein a plurality of said modules are formed on a wafer.
U.S. Pat. No. 6,692,113 B2 discloses an ink jet print head wherein semiconductor modules are formed by micro-electromechanical systems (MEMS) each of which forms a plurality of droplet ejecting nozzles and associated drop generating equipment such as ink chambers, actuators and the like. Since the entire nozzle array of the print head is composed of a plurality of such modules, it is necessary for achieving a high quality of the printed images that the modules and hence the nozzles formed thereon are aligned relative to one another with high accuracy.
The MEMS can be formed by means of photo-lithographic techniques from a large wafer which will then be diced to form the individual modules that will then be mounted and aligned on a carrier when the print head is assembled. The modules typically have a rectangular shape, so that their edges can serve as reference in the alignment procedure. This means that the modules will be arranged such that their edges will have a well defined positional relationship.
WO 03/070471 A describes a method of manufacturing an ink jet print head, wherein alignment marks are used for aligning semiconductor chips on a common plate which will then be diced to form print head modules. The nozzles are formed in a separate nozzle plate which is bonded onto the chip and covers the alignment mark formed thereon.
U.S. Pat. No. 5,719,605 describes a method where alignment marks are formed on a metal nozzle plate covering the semiconductor chip.
It is an object of the invention to improve the accuracy, with which the modules can be aligned.
In order to achieve this object, the method according to the invention comprises the steps of:
The use of alignment marks is, as such, known in the art of manufacturing and packaging semiconductor devices. There, the alignment marks are used for example for aligning different areas on a wafer with an optical system that is used for projecting a desired pattern of the device onto the wafer. Furthermore the use of alignment marks is known in the art for visually aligning a semiconductor module with a base support. The visual alignment marks are positioned on the outer surface of the module and away from the edge of the module.
In the separating step the wafer is separated into separate modules. The separation step may comprise dicing, cutting, laser cutting or any other way of separating the wafer into separate modules.
In the present invention the alignment mark is positioned on a boundary between the first and the second adjacent module along which the wafer is to be separated. In the separating step the alignment mark is divided over said first and second adjacent module. The part of the divided alignment mark, which remains on the module, is arranged near the edge of the module and may facilitate the alignment of the module. In particular the alignment mark may comprise smooth edges. The edges of the alignment mark may provide reference edges for aligning the module after the separating step of the module. In particular the module may be aligned by physically contacting an edge of the divided alignment mark.
US 2003/0060024 A1 describes a method of manufacturing semiconductor devices, wherein the dicing process is facilitated by etching a grid-like pattern of grooves into the wafer. These grooves will then define the lines along which the wafer is to be diced.
In the present invention, alignment marks are not used in the process of manufacturing or packaging the modules, but they are applied on the individual modules specifically for the purpose of facilitating the alignment of these modules when they are assembled to form an ink jet print head. The divided alignment marks may be used to facilitate a physically alignment of these modules with respect to a physical reference on the print head. The physical reference on the print head may be, for example, a notch.
When the modules are aligned relative to one another by reference to the alignment marks formed on the individual modules, it is possible to achieve an alignment accuracy that is significantly higher than the accuracy achievable with the conventional technique wherein the edges of the modules are used as alignment references. The reason is that the edges of the modules formed by dicing the wafer are not very accurate because the dicing blade is flexible and is subject to wear and to deformations resulting from wear, mechanical strains and thermal influences of a cooling fluid, and the like. All these factors have the effect that the position and shape of the edges of the modules relative to the structures forming the MEMS are not well defined and limit the alignment accuracy. In contrast, when alignment is based on specific alignment marks that may easily be formed on the wafer along with forming the module structures (e.g. by photolithographic techniques), such sources of alignment errors can be avoided, so that the alignment accuracy is improved significantly.
More specific optional features of the invention are indicated in the dependent claims.
An embodiment example will now be described by reference to the drawings, wherein:
As is shown in
A number of distribution tiles 18 are mounted on one side of the carrier 12 so as to straddle the heating device 16 and to communicate with each of the ink ducts. On the side opposite to the carrier 12, each distribution tile 18 carries a number of ink discharge modules 20 and electronic drivers 22 for controlling the same.
The ink discharge modules 20 are micro-electromechanical systems (MEMS) and have the form of rectangular chips of, e. g., a semiconductor material such as silicon. Each module 20 has electronic and mechanical micro-structures forming a plurality of nozzles 24. Although not shown in the drawing, each nozzle is connected to an ink chamber by an ink passage, and this ink passage is again connected to a corresponding ink supply line of the distribution title 18. Further, the module forms or accommodates actuators associated with the ink chambers for pressurizing the ink contained therein so as to expel ink droplets from the nozzles 24.
As is known per-se, all these structures are formed in the modules 20 by photo-lithographic techniques in a state, where the modules 20 still form part of a larger silicon wafer.
In the example shown in
The micro-electromechanical structures formed on and in each module 20 are largely invisible in
Boundaries 28, 30 delimiting the individual modules have been shown as dashed lines in
As is further shown in
It will be understood that, in the wafer stage shown in
An individual module 20 with its four alignment marks 32 has been shown on a larger scale in
As a result, when the true edges of the module 20 were used for aligning the modules relative to one another, as shown in
In the alignment process, as is symbolized by a dot-dashed line 34, the shorter sides of the alignment marks 32 are aligned with one another, which assures that the four rows of nozzles 24 of the various modules 20 are exactly aligned with one another.
Moreover, as has been symbolized by another dot-dashed line 36 in
Some extra modules 20 have been shown in
Detailed embodiments of the present invention are disclosed herein; however, it is to be understood that the disclosed embodiments are merely exemplary of the invention, which may be embodied in various forms. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a basis for the claims and as a representative basis for teaching one skilled in the art to variously employ the present invention in virtually any appropriately detailed structure. In particular, features presented and described in separate dependent claims may be applied in combination and any combination of such claims are herewith disclosed.
Further, the terms and phrases used herein are not intended to be limiting; but rather, to provide an understandable description of the invention. The terms βaβ or βanβ, as used herein, are defined as one or more than one. The term plurality, as used herein, is defined as two or more than two. The term another, as used herein, is defined as at least a second or more. The terms including and/or having, as used herein, are defined as comprising (i.e., open language). The term coupled, as used herein, is defined as connected, although not necessarily directly.
Number | Date | Country | Kind |
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08170469 | Dec 2008 | EP | regional |
This application is a Continuation of PCT International Application No. PCT/EP2009/066200 filed on Dec. 2, 2009, which claims priority of Application No. 08170469.4 filed in the European Patent Office on Dec. 2, 2008, all of which are hereby expressly incorporated by reference into the present application.
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Number | Date | Country | |
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20110217797 A1 | Sep 2011 | US |
Number | Date | Country | |
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Parent | PCT/EP2009/066200 | Dec 2009 | US |
Child | 13110577 | US |