Patent Grant
10312396
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2015-193233, filed on Sep. 30, 2015, the entire contents of which are incorporated herein by reference.
The disclosure relates to a method of manufacturing a solar cell and particularly to a method of manufacturing a back surface junction type solar cell.
Solar cells having high power generation efficiency include back surface junction type solar cells with an n-type semiconductor layer and a p-type semiconductor layer formed on a back surface thereof, which is opposite to a light-receiving surface on which light becomes incident. The n-type electrode formed on the n-type semiconductor layer and the p-type electrode formed on the p-type semiconductor layer need be insulated so that they do not come into contact with each other. For insulation, the n-type semiconductor layer and the p-type semiconductor layer, which are joined temporarily in a solar cell manufacturing step, need be isolated by laser irradiation or lithography using a photomask.
[patent document 1] WO2010/104098
The related art method of isolating the n-side electrode and the p-side electrode using, for example, a photoresist has a benefit of a small isolation width. On the other hand, the related-art method has a problem in that the cost of a resist material and a resist stripping material is high. The n-side electrode and the p-side electrode may be isolated by screen-printing an etching paste. However, the printing precision is not sufficient and the isolation width cannot be sufficiently small. Laser isolation of the n-side electrode and the p-side electrode has a limitation in that a channel narrower than the width of laser irradiation cannot be formed.
In this background, a purpose of the present invention is to provide solar cells in which the manufacturing cost is reduced and the photoelectric conversion efficiency is improved.
A method of manufacturing a solar cell includes: forming a conductive thin film layer on a semiconductor substrate; forming an insulating film on the conductive thin film layer; forming a conductive thin film layer exposed portion by removing a part of the insulating film; forming a plating film in the conductive thin film layer exposed portion; and removing the insulating film and the conductive thin film layer in an area not overlapping the plating film, wherein the plating film formed in the forming of a plating film is formed to cover the insulating film.
The figures depict one or more implementations in accordance with the present teaching, by way of example only, not by way of limitations. In the figures, like reference numerals refer to the same or similar elements.
The invention will now be described by reference to the preferred embodiments. This does not intend to limit the scope of the present invention, but to exemplify the invention.
A description will be given of an embodiment with reference to the drawings. In the explanations of the figures, the same elements shall be denoted by the same reference numerals, and duplicative explanations will be omitted appropriately. The drawings are schematic and it should be noted that the dimensional ratio is different from the actual ratio. Accordingly, the precise dimensions should be determined in light of the following description. It should of course be noted that the drawings include portions mutually different from one drawing to another in terms of the relative dimensions and proportions. A description will first be given of the structure of a solar cell formed according to the embodiment and a description will then be given of a method of manufacturing the solar cell.
(Structure of Solar Cell)
The solar cell 70 includes an n-side electrode 14 and a p-side electrode 15 provided on the back surface. The n-side electrode 14 is formed in a comb-tooth shape including a bus bar electrode extending in the y direction and a plurality of finger electrodes extending in the x direction. Similarly, the p-side electrode 15 is also formed in a comb-tooth shape including a bus bar electrode extending in the y direction and a plurality of finger electrodes extending in the x direction. The n-side electrode 14 and the p-side electrode 15 are formed such that the comb teeth of the electrodes are engaged with each other and inserted into each another. Each of the n-side electrode 14 and the p-side electrode 15 may be a bulbar-less electrode consisting only of a plurality of fingers and having no busbars.
(Method of Manufacturing the Solar Cell 70)
A description will now be given of a method of manufacturing the solar cell 70 according to the embodiment. A description will now be given of formation of a photoelectric conversion part of the solar cell 70 with reference to
(Method of Manufacturing Photoelectric Conversion Part)
First, the semiconductor substrate 10 is prepared. In this embodiment, the semiconductor substrate 10 made of n-type monocrystalline silicon having a thickness of about 200 μm is used, but the type of material is not particularly limited. The conductivity type may be n-type or p-type, and either a monocrystalline semiconductor substrate or a polycrystalline semiconductor substrate may be used. The thickness of the semiconductor substrate 10 is also arbitrary.
Subsequently, semiconductor layers are built on the back surface of the semiconductor substrate 10, as shown in
Subsequently, the first insulating layer 16 and the first stack 12 are patterned, as shown in
The first stack 12 may be patterned by chemical etching as described below. The first insulating layer 16 patterned by laser as described above is used as a mask to etch the first stack 12. Provided that the first insulating layer 16 is formed of silicon oxide, silicon nitride, or silicon oxynitride, the first stack 12 may be etched by using an alkali etchant.
Subsequently, as shown in
Subsequently, as shown in
First, the second stack 13 is patterned by laser. In this step, too, the laser beam conditioned similarly to the case of patterning the first stack 12 may be used for patterning. More specifically, the third harmonic (wavelength: 355 nm) of Nd:YAG laser (wavelength: 1064 nm) is used as a laser light source and the target is irradiated with an intensity of about 0.1˜0.5 J/cm2 per one pulse.
Subsequently, the first insulating layer 16 is etched to expose the first stack 12. The step is performed by using an acid etchant such as an aqueous solution of hydrofluoric acid so as to prevent the second stack 13 from being removed. As a result of performing this step, the first conductivity type layer 12n included in the first stack 12 is exposed.
Subsequently, a third stack 17 comprised of a third i-type layer 17i and a first conductivity type layer 17n is formed on a surface opposite to the back surface of the semiconductor substrate 10 on which the first stack 12 and the second stack 13 are formed, i.e., on the light receiving surface. The third i-type layer 17i is made of an i-type amorphous silicon containing hydrogen and has a thickness of, for example, about several nm˜25 nm. A first conductivity type layer 17n is provided on the third i-type layer 17i. The first conductivity type layer 17n is formed of an amorphous semiconductor layer doped with a dopant of the same conductivity type as that of the semiconductor substrate 10. The first conductivity type layer 17n of the embodiment is formed of an n-type amorphous silicon containing hydrogen and has a thickness of, for example, about 2 nm˜50 nm. The method of stacking the third i-type layer 17i and the first conductivity type layer 17n is the same as the method of forming the first i-type layer 12i and the first conductivity type layer 12n.
A second insulating layer 18 having a function of an antireflection film and a protection film is provided on the first conductivity type layer 17n. The second insulating layer 18 is formed of, for example, silicon oxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiNO), or the like. The thickness of the second insulating layer 18 is set as appropriate in accordance with the antireflection property required of an antireflection film. For example, the thickness is set to about 80 nm˜1000 nm.
The sequence of forming the first stack 12, the second stack 13, and the third stack 17 in the manufacturing method described so far is not particularly limited. The stacks may be formed in an arbitrary sequence so that the cross sectional structure of the photoelectric conversion part as shown in
(Method of Forming Electrode of Solar Cell 70)
A description will be given of a method of forming an electrode for retrieving electric power provided on the surface of the semiconductor substrate 10 formed with the first stack 12 and the second stack 13, i.e., on the back surface where the sunlight does not directly enter, breaking down the method into five steps.
The five steps include (S1) the first step of forming a conductive thin film layer 20 formed of a metal such as copper on the back surface of the photoelectric conversion part; (S2) the second step of providing a third insulating layer 22 formed of silicon nitride (SiN) or the like on the conductive thin film layer 20; (S3) the third step of forming a seed layer first exposed portion by removing a portion of the third insulating layer 22; (S4) the fourth step of forming a copper electrode 24 on the seed layer first exposed portion; and (S5) the step of removing the third insulating layer 22 and the conductive thin film layer 20 exposed in the opening of the copper electrode 24 and isolating the p-side electrode 15 and the n-side electrode 14.
(S1)
A solar cell in which the photoelectric conversion part having the cross section of
The transparent conductive oxide layer 20t is formed of, for example, a transparent conductive oxide such as a tin oxide (SnO2), a zinc oxide (ZnO), an indium tin oxide (ITO), or the like. The transparent conductive oxide layer 20t according to this embodiment has a thickness of about 50 nm˜100 nm. The transparent conductive oxide layer 20t is evenly formed on the back surface of the photoelectric conversion part by a thin film formation method such as sputtering and vapor deposition.
The metal thin film layer 20m is formed of a metal material such as copper (Cu), tin (Sn), gold (Au), silver (Ag), nickel (Ni), and titanium (Ti). In this embodiment, the metal thin film layer 20m made of copper (Cu) is formed. The metal thin film layer 20m is formed to have a thickness of, for example, about 50 nm˜300 nm. Therefore, the thickness of the conductive thin film layer 20 formed in S1 step is about 100 nm˜400 nm in total.
(S2)
S2 is a step to provide the third insulating layer 22 on the conductive thin film layer 20 formed in S1 step, as shown in
(S3)
S3 is a step of patterning the third insulating layer 22 formed in S2 to remove a part thereof so as to form a conductive thin film layer exposed portion, as shown in
In this embodiment, the third insulating layer 22 is patterned by laser scan so that the third insulating layer 22 formed of silicon nitride (SiN) remains in a width of about 100 μm in a front view corresponding to
(S4)
S4 is a step of forming the copper electrode 24 in the conductive thin film layer exposed portion formed in S3. In this embodiment, the copper electrode 24 comprised of a copper plating film of a thickness of about 10˜30 μm is formed by electrolytic plating on the plating seed layer comprised of the conductive thin film layer 20 of a two-layer structure including the transparent conductive oxide layer 20t and the metal thin film layer 20m.
It should be noted here that the thickness of the third insulating layer 22 formed of silicon nitride (SiN) is about 100 nm and the copper electrode 24 is formed to be thicker than the third insulating layer 22 formed in S2. It is common in an electrolytic plating step that, when the thickness of the plating film exceeds the thickness of a wall formed of an insulating film, the plating film not only expands in the height direction (z direction in the figure) but also expands in the horizontal direction (y direction). Thus, in the case of the embodiment, the end of the third insulating layer 22 invades into the copper electrode 24 so that the cross section occurring when the formation of the copper electrode 24 is completed is as shown in
(S5)
S4 is an electrode removal step of electrically isolating adjacent copper electrodes 24 formed in S4 to form the p-side electrode 15 and the n-side electrode 14. The solar cell 70 undergoing the process as far as step S4 and presenting the cross sectional structure shown in
Subsequently, the conductive thin film layer 20 exposed in the opening of the third insulating layer 22 is removed so as to isolate adjacent copper electrodes 24 electrically. For isolation between copper electrodes 24, chemical etching using an etchant such as sulfuric acid hydrogen peroxide mixture solution (mixed aqueous solution of sulfuric acid aqueous solution and hydrogen peroxide solution), hydrochloric acid and hydrogen peroxide solution (mixed aqueous solution of hydrogen chloride aqueous solution and hydrogen peroxide solution), or the like is applied. In this embodiment, a chemical etchant is used to form a channel in the conductive thin film layer 20. Alternatively, laser may be used to form a channel. In this process, the laser output is changed to a level capable of removing the conductive thin film layer 20 to form a channel. In this way, adjacent copper electrodes 24 are electrically isolated to produce the p-side electrode 15 and the n-side electrode 14. In this process, the width of the channel formed for electrode isolation may be about 50 μm. In other words, the width of the gap between the p-side electrode 15 and the n-side electrode 14 can be about 50 μm.
The position and width of laser irradiation may be as shown in
By employing the manufacturing method of the embodiment, the p-side electrode and the n-side electrode can be isolated by forming a channel of a small width without using an etching paste or photoresist. In this way, a channel of a width smaller than the width of laser irradiation can be formed. The minimum value of the width of a channel that can be formed by laser processing is dependent on the device for laser oscillation. Reduction in the minimum size of the width of a channel requires an expensive device. According to this embodiment, a channel of a small width can be formed by using a laser device regardless of the minimum value of the width of a channel. Further, since the p-side electrode 15 and the n-side electrode 14 can be isolated by working a channel having a narrower width than the related art, the filling rate of the p-side electrode 15 and the n-side electrode 14 on the solar cell surface can be improved so that, given the same area, a larger number of electrodes can be formed on the solar cell surface. To describe it in further details, the conductive thin film layer 20 covered by the third insulating layer 22 is not removed by laser irradiation or chemical etching. Therefore, the areas of the p-side electrode 15 and the n-side electrode 14 that collect carriers during photoelectric conversion is enlarged. Consequently, the efficiency of collecting carriers generated during phot conversion can be increased and the property of the solar cell can be improved.
(Application of Solar Cell to Bus Bar Part)
The detailed description of the manufacturing method above relates to the finger electrode portions of the electrodes of a back surface junction type solar cell. However, the method can of course be applied to isolation of the end of the finger of the n-side electrode 14 and the bus bar part of the p-side electrode 15.
As shown in
The present invention has been described with reference to the embodiment but the invention is not limited to the embodiment described. Modifications can be made to the extent that they do not depart from the intent of the invention. For example, in (S1), the transparent conductive oxide layer 20t and the metal thin film layer 20m are built on one another to form the conductive thin film layer 20, but the conductive thin film layer 20 is comprised solely of the transparent conductive oxide layer 20t. In (S5) of the embodiment, the third insulating layer 22 invading into an area beneath the copper electrode 24 is not removed, but the third insulating layer 22 may be removed by wet etching, etc.
While the foregoing has described what are considered to be the best mode and/or other examples, it is understood that various modifications may be made therein and that the subject matter disclosed herein may be implemented in various forms and examples, and that they may be applied in numerous applications, only some of which have been described herein. It is intended by the following claims to claim any and all modifications and variations that fall within the true scope of the present teachings.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2015-193233 | Sep 2015 | JP | national |
| Number | Name | Date | Kind |
|---|---|---|---|
| 20120037227 | Takahama et al. | Feb 2012 | A1 |
| 20130137211 | Mishima | May 2013 | A1 |
| Number | Date | Country |
|---|---|---|
| 2010104098 | Sep 2010 | WO |
| Number | Date | Country | |
|---|---|---|---|
| 20180219119 A1 | Aug 2018 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2016/003838 | Aug 2016 | US |
| Child | 15938864 | US |
